[coreboot] BIOS RAM in AMD SB7XX southbridges ?

Darmawan Salihun darmawan.salihun at gmail.com
Wed Oct 28 05:55:29 CET 2009

On 10/28/09, Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
> On 27.10.2009 14:06, Darmawan Salihun wrote:
>> What is the BIOS RAM in AMD SB7XX used for?
>> Is it to buffer the BIOS contents from SPI flash chip prior to
>> execution of the very first instruction?
> No.
>> I recall that it's impossible to execute code directly in an SPI chip.
> Yes, but the chipset takes care of the SPI command interface and
> presents the contents of the SPI chip nicely memory mapped to the CPU,
> so the CPU can execute the ROM contents directly.

I see. So, there must be some sort of independent
microcontroller/microprocessor in the southbridge that "fetches" the
contents of the SPI chip and "present" it in a "memory-mapped way"
to the CPU. Probably this is how the BIOS RAM is used by the
internal microcontroller/microprocessor in the southbridge.

I suspect this because an ex-intel engineer that I spoke to, told me that
back then he was using ARM7TDMI to do the job of "presenting the BIOS
contents in a memory-mapped way" to the CPU. These days, the function
must've been integrated in the southbridge as you said.
I suspect AMD do the same.


Darmawan Salihun
-= Human knowledge belongs to the world =-

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