[coreboot] GPIOs on CS5536 based boards

[Myles Watson]

> I traced a little further and implemented a cs5536_set_resources() which
> simply wraps the call to pci_set_resources(). GPIO registers are
> accessed ok before pci_set_resources() but fail after.
Sounds like the address where you access the resource is changing after
resource allocation.  You have a couple of options:
1. Use the new address after pci_set_resources
2. Don't use pci_set_resources to allocate that resource
	(Set up that resource as fixed)

I think #1 is the best, unless you have to have that address at a specific
location.

> This is the output of print_resource_tree() of the device used:

I don't know enough about it to know which of these resources is the one
you're looking for, but you can look through the code to see where the GPIO
registers are set up.

> (CB)  PCI: 00:0f.0 links 0 child on link 0 NULL
> (CB)  PCI: 00:0f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags
> e0000100 index 0
> (CB)  PCI: 00:0f.0 resource base 20b0 size 8 align 3 gran 3 limit ffff
> flags 40000100 index 10
> (CB)  PCI: 00:0f.0 resource base 1800 size 100 align 8 gran 8 limit ffff
> flags 40000100 index 14
> (CB)  PCI: 00:0f.0 resource base 2000 size 40 align 6 gran 6 limit ffff
> flags 40000100 index 18
> (CB)  PCI: 00:0f.0 resource base 2080 size 20 align 5 gran 5 limit ffff
> flags 40000100 index 1c
> (CB)  PCI: 00:0f.0 resource base 1c00 size 80 align 7 gran 7 limit ffff
> flags 40000100 index 20
> (CB)  PCI: 00:0f.0 resource base 2040 size 40 align 6 gran 6 limit ffff
> flags 40000100 index 24

Good luck,
Myles