[coreboot] [commit] r5477 - in trunk/src: mainboard/asus/m2v-mx_se mainboard/bcom/winnetp680 mainboard/jetway/j7f24 mainboard/via/epia-cn mainboard/via/pc2500e northbridge/amd/amdk8 southbridge/via/k8t890 sou...
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Thu Apr 22 15:18:10 CEST 2010
Author: stepan
Date: Thu Apr 22 15:18:09 2010
New Revision: 5477
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5477
Log:
zero warnings days...
Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Stefan Reinauer <stepan at coresystems.de>
Modified:
trunk/src/mainboard/asus/m2v-mx_se/romstage.c
trunk/src/mainboard/bcom/winnetp680/romstage.c
trunk/src/mainboard/jetway/j7f24/romstage.c
trunk/src/mainboard/via/epia-cn/romstage.c
trunk/src/mainboard/via/pc2500e/romstage.c
trunk/src/northbridge/amd/amdk8/raminit_f_dqs.c
trunk/src/southbridge/via/k8t890/k8t890.h
trunk/src/southbridge/via/k8t890/k8t890_early_car.c
trunk/src/southbridge/via/vt8237r/vt8237r.h
Modified: trunk/src/mainboard/asus/m2v-mx_se/romstage.c
==============================================================================
--- trunk/src/mainboard/asus/m2v-mx_se/romstage.c Thu Apr 22 12:44:08 2010 (r5476)
+++ trunk/src/mainboard/asus/m2v-mx_se/romstage.c Thu Apr 22 15:18:09 2010 (r5477)
@@ -57,7 +57,6 @@
#include "northbridge/amd/amdk8/raminit.h"
#include "cpu/amd/model_fxx/apic_timer.c"
#include "lib/delay.c"
-#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/early_ht.c"
@@ -83,10 +82,11 @@
{
}
-#define K8_4RANK_DIMM_SUPPORT 1
-
+// defines S3_NVRAM_EARLY:
#include "southbridge/via/k8t890/k8t890_early_car.c"
+#define K8_4RANK_DIMM_SUPPORT 1
+
#include "northbridge/amd/amdk8/amdk8.h"
#include "northbridge/amd/amdk8/incoherent_ht.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
@@ -164,7 +164,7 @@
console_init();
enable_rom_decode();
- print_info("now booting... real_main\n");
+ printk(BIOS_INFO, "now booting... \n");
if (bist == 0)
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
@@ -175,7 +175,7 @@
setup_coherent_ht_domain();
wait_all_core0_started();
- print_info("now booting... Core0 started\n");
+ printk(BIOS_INFO, "now booting... All core 0 started\n");
#if CONFIG_LOGICAL_CPUS==1
/* It is said that we should start core1 after all core0 launched. */
@@ -196,12 +196,9 @@
vt8237_early_spi_init();
if (needs_reset) {
- print_debug_hex8(needs_reset);
-
- print_debug("Xht reset -\n");
+ printk(BIOS_DEBUG, "ht reset -\n");
soft_reset();
- print_debug("NO reset\n");
-
+ printk(BIOS_DEBUG, "FAILED!\n");
}
/* the HT settings needs to be OK, because link freq chnage may cause HT disconnect */
Modified: trunk/src/mainboard/bcom/winnetp680/romstage.c
==============================================================================
--- trunk/src/mainboard/bcom/winnetp680/romstage.c Thu Apr 22 12:44:08 2010 (r5476)
+++ trunk/src/mainboard/bcom/winnetp680/romstage.c Thu Apr 22 15:18:09 2010 (r5477)
@@ -34,7 +34,6 @@
#include "cpu/x86/bist.h"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
-#include "cpu/x86/lapic/boot_cpu.c"
#include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
#include "superio/winbond/w83697hf/w83697hf_early_serial.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1)
Modified: trunk/src/mainboard/jetway/j7f24/romstage.c
==============================================================================
--- trunk/src/mainboard/jetway/j7f24/romstage.c Thu Apr 22 12:44:08 2010 (r5476)
+++ trunk/src/mainboard/jetway/j7f24/romstage.c Thu Apr 22 15:18:09 2010 (r5477)
@@ -34,7 +34,6 @@
#include "cpu/x86/bist.h"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
-#include "cpu/x86/lapic/boot_cpu.c"
#include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
#include "superio/fintek/f71805f/f71805f_early_serial.c"
Modified: trunk/src/mainboard/via/epia-cn/romstage.c
==============================================================================
--- trunk/src/mainboard/via/epia-cn/romstage.c Thu Apr 22 12:44:08 2010 (r5476)
+++ trunk/src/mainboard/via/epia-cn/romstage.c Thu Apr 22 15:18:09 2010 (r5477)
@@ -34,7 +34,6 @@
#include "cpu/x86/bist.h"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
-#include "cpu/x86/lapic/boot_cpu.c"
#include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
#include "southbridge/via/vt8235/vt8235_early_serial.c"
Modified: trunk/src/mainboard/via/pc2500e/romstage.c
==============================================================================
--- trunk/src/mainboard/via/pc2500e/romstage.c Thu Apr 22 12:44:08 2010 (r5476)
+++ trunk/src/mainboard/via/pc2500e/romstage.c Thu Apr 22 15:18:09 2010 (r5477)
@@ -35,7 +35,6 @@
#include "cpu/x86/bist.h"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
-#include "cpu/x86/lapic/boot_cpu.c"
#include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
#include "superio/ite/it8716f/it8716f_early_serial.c"
Modified: trunk/src/northbridge/amd/amdk8/raminit_f_dqs.c
==============================================================================
--- trunk/src/northbridge/amd/amdk8/raminit_f_dqs.c Thu Apr 22 12:44:08 2010 (r5476)
+++ trunk/src/northbridge/amd/amdk8/raminit_f_dqs.c Thu Apr 22 15:18:09 2010 (r5477)
@@ -1823,8 +1823,11 @@
}
#ifdef S3_NVRAM_EARLY
-int s3_save_nvram_early(u32 dword, int size, int nvram_pos);
-int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
+// Don't define these prototypes as the real functions are already included
+// at this point.
+//
+//int s3_save_nvram_early(u32 dword, int size, int nvram_pos);
+//int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
#else
static int s3_save_nvram_early(u32 dword, int size, int nvram_pos)
{
Modified: trunk/src/southbridge/via/k8t890/k8t890.h
==============================================================================
--- trunk/src/southbridge/via/k8t890/k8t890.h Thu Apr 22 12:44:08 2010 (r5476)
+++ trunk/src/southbridge/via/k8t890/k8t890.h Thu Apr 22 15:18:09 2010 (r5477)
@@ -38,14 +38,17 @@
/* the FB size in MB (min is 8MB max is 512MB) */
#define K8M890_FBSIZEMB 64
+#ifdef __PRE_RAM__
+u8 k8t890_early_setup_ht(void);
+#else
#include <device/device.h>
-
#if 0
extern void writeback(struct device *dev, u16 where, u8 what);
extern void dump_south(device_t dev);
#endif
-#include <southbridge/via/vt8237r/vt8237r.h>
+#endif
+#include <southbridge/via/vt8237r/vt8237r.h>
int k8m890_host_fb_size_get(void);
//void k8m890_host_fb_direct_set(uint32_t fb_address);
Modified: trunk/src/southbridge/via/k8t890/k8t890_early_car.c
==============================================================================
--- trunk/src/southbridge/via/k8t890/k8t890_early_car.c Thu Apr 22 12:44:08 2010 (r5476)
+++ trunk/src/southbridge/via/k8t890/k8t890_early_car.c Thu Apr 22 15:18:09 2010 (r5477)
@@ -23,12 +23,12 @@
*/
#include <stdlib.h>
-//include "k8t890.h"
-#warning hack the right header here
+#include "k8t890.h"
/* The 256 bytes of NVRAM for S3 storage, 256B aligned */
#define K8T890_NVRAM_IO_BASE 0xf00
#define K8T890_MULTIPLE_FN_EN 0x4f
+
/* we provide S3 NVRAM to system */
#define S3_NVRAM_EARLY 1
@@ -113,7 +113,7 @@
return 1;
}
-int s3_save_nvram_early(u32 dword, int size, int nvram_pos)
+static int s3_save_nvram_early(u32 dword, int size, int nvram_pos)
{
printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n", dword, size, nvram_pos);
@@ -134,7 +134,7 @@
return nvram_pos;
}
-int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
+static int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
{
switch (size) {
case 1:
Modified: trunk/src/southbridge/via/vt8237r/vt8237r.h
==============================================================================
--- trunk/src/southbridge/via/vt8237r/vt8237r.h Thu Apr 22 12:44:08 2010 (r5476)
+++ trunk/src/southbridge/via/vt8237r/vt8237r.h Thu Apr 22 15:18:09 2010 (r5477)
@@ -103,7 +103,18 @@
#endif
;
-#ifndef __PRE_RAM__
+#ifdef __PRE_RAM__
+#ifndef __ROMCC__
+u8 smbus_read_byte(u8 dimm, u8 offset);
+void enable_smbus(void);
+void smbus_fixup(const struct mem_controller *ctrl);
+// these are in vt8237_early_smbus.c - do they really belong there?
+void vt8237_sb_enable_fid_vid(void);
+void enable_rom_decode(void);
+void vt8237_early_spi_init(void);
+int vt8237_early_network_init(struct vt8237_network_rom *rom);
+#endif
+#else
#include <device/device.h>
void writeback(struct device *dev, u16 where, u8 what);
void dump_south(device_t dev);
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