[coreboot] [commit] r5507 - in trunk: . documentation documentation/RFC payloads/bayou payloads/bayou/util/pbuilder/lzma payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress payloads/coreinfo payloads/coreinfo...

repository service svn at coreboot.org
Tue Apr 27 08:56:49 CEST 2010


Author: stepan
Date: Tue Apr 27 08:56:47 2010
New Revision: 5507
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5507

Log:
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)

Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Stefan Reinauer <stepan at coresystems.de>

Modified:
   trunk/Makefile
   trunk/documentation/Kconfig.tex
   trunk/documentation/LinuxBIOS-AMD64.tex
   trunk/documentation/Makefile
   trunk/documentation/RFC/chip.tex
   trunk/documentation/RFC/config.tex
   trunk/documentation/cbfs.txt
   trunk/documentation/codeflow.svg
   trunk/payloads/bayou/bayou.xml.example
   trunk/payloads/bayou/lzmadecode.c
   trunk/payloads/bayou/lzmadecode.h
   trunk/payloads/bayou/nrv2b.c
   trunk/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.c
   trunk/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.h
   trunk/payloads/bayou/util/pbuilder/lzma/minilzma.cc
   trunk/payloads/coreinfo/cpuid.S
   trunk/payloads/coreinfo/pci_module.c
   trunk/payloads/coreinfo/util/kconfig/lex.zconf.c_shipped
   trunk/payloads/coreinfo/util/kconfig/lxdialog/BIG.FAT.WARNING
   trunk/payloads/coreinfo/util/kconfig/lxdialog/menubox.c
   trunk/payloads/coreinfo/util/kconfig/zconf.tab.c_shipped
   trunk/payloads/external/tint/libpayload_tint.patch
   trunk/payloads/libpayload/Config.in
   trunk/payloads/libpayload/Doxyfile
   trunk/payloads/libpayload/LICENSES
   trunk/payloads/libpayload/Makefile
   trunk/payloads/libpayload/bin/lpgcc
   trunk/payloads/libpayload/curses/keyboard.c
   trunk/payloads/libpayload/curses/tinycurses.c
   trunk/payloads/libpayload/drivers/keyboard.c
   trunk/payloads/libpayload/drivers/nvram.c
   trunk/payloads/libpayload/drivers/options.c
   trunk/payloads/libpayload/drivers/usb/TODO
   trunk/payloads/libpayload/drivers/usb/quirks.c
   trunk/payloads/libpayload/drivers/usb/usb.c
   trunk/payloads/libpayload/drivers/usb/usbhid.c
   trunk/payloads/libpayload/drivers/usb/usbmsc.c
   trunk/payloads/libpayload/drivers/video/corebootfb.c
   trunk/payloads/libpayload/include/curses.priv.h
   trunk/payloads/libpayload/include/getopt.h
   trunk/payloads/libpayload/include/i386/arch/endian.h
   trunk/payloads/libpayload/include/libpayload.h
   trunk/payloads/libpayload/libc/args.c
   trunk/payloads/libpayload/libc/malloc.c
   trunk/payloads/libpayload/libc/memory.c
   trunk/payloads/libpayload/libc/printf.c
   trunk/payloads/libpayload/util/kconfig/confdata.c
   trunk/payloads/libpayload/util/kconfig/lex.zconf.c_shipped
   trunk/payloads/libpayload/util/kconfig/lxdialog/BIG.FAT.WARNING
   trunk/payloads/libpayload/util/kconfig/lxdialog/menubox.c
   trunk/payloads/libpayload/util/kconfig/regex.c
   trunk/payloads/libpayload/util/kconfig/regex.h
   trunk/payloads/libpayload/util/kconfig/zconf.tab.c_shipped
   trunk/src/Kconfig
   trunk/src/arch/i386/boot/acpi.c
   trunk/src/arch/i386/boot/acpigen.c
   trunk/src/arch/i386/boot/boot.c
   trunk/src/arch/i386/boot/coreboot_table.c
   trunk/src/arch/i386/boot/mpspec.c
   trunk/src/arch/i386/boot/pirq_routing.c
   trunk/src/arch/i386/boot/tables.c
   trunk/src/arch/i386/boot/wakeup.S
   trunk/src/arch/i386/coreboot_ram.ld
   trunk/src/arch/i386/include/arch/acpi.h
   trunk/src/arch/i386/include/arch/coreboot_tables.h
   trunk/src/arch/i386/include/arch/cpu.h
   trunk/src/arch/i386/include/arch/io.h
   trunk/src/arch/i386/include/arch/pciconf.h
   trunk/src/arch/i386/include/arch/registers.h
   trunk/src/arch/i386/include/arch/romcc_io.h
   trunk/src/arch/i386/include/arch/smp/atomic.h
   trunk/src/arch/i386/include/arch/smp/mpspec.h
   trunk/src/arch/i386/include/bitops.h
   trunk/src/arch/i386/include/stdint.h
   trunk/src/arch/i386/init/bootblock_prologue.c
   trunk/src/arch/i386/init/crt0_prologue.inc
   trunk/src/arch/i386/init/crt0_romcc_epilogue.inc
   trunk/src/arch/i386/init/ldscript.ld
   trunk/src/arch/i386/lib/cbfs_and_run.c
   trunk/src/arch/i386/lib/cpu.c
   trunk/src/arch/i386/lib/exception.c
   trunk/src/arch/i386/lib/id.inc
   trunk/src/arch/i386/lib/ioapic.c
   trunk/src/arch/i386/lib/pci_ops_auto.c
   trunk/src/arch/i386/lib/printk_init.c
   trunk/src/arch/i386/lib/stages.c
   trunk/src/arch/i386/llshell/console.inc
   trunk/src/arch/i386/llshell/llshell.inc
   trunk/src/arch/i386/llshell/pci.inc
   trunk/src/arch/i386/llshell/ramtest.inc
   trunk/src/boot/hardwaremain.c
   trunk/src/console/Kconfig
   trunk/src/console/btext_console.c
   trunk/src/console/console.c
   trunk/src/console/logbuf_console.c
   trunk/src/console/uart8250_console.c
   trunk/src/console/vsprintf.c
   trunk/src/console/vtxprintf.c
   trunk/src/cpu/amd/dualcore/Makefile.inc
   trunk/src/cpu/amd/dualcore/amd_sibling.c
   trunk/src/cpu/amd/dualcore/dualcore_id.c
   trunk/src/cpu/amd/model_10xxx/Makefile.inc
   trunk/src/cpu/amd/model_10xxx/mc_patch_01000095.h
   trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c
   trunk/src/cpu/amd/model_fxx/Makefile.inc
   trunk/src/cpu/amd/model_fxx/apic_timer.c
   trunk/src/cpu/amd/model_fxx/fidvid.c
   trunk/src/cpu/amd/model_fxx/microcode_rev_c.h
   trunk/src/cpu/amd/model_fxx/microcode_rev_d.h
   trunk/src/cpu/amd/model_fxx/microcode_rev_e.h
   trunk/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
   trunk/src/cpu/amd/model_fxx/processor_name.c
   trunk/src/cpu/amd/model_gx2/cpubug.c
   trunk/src/cpu/amd/model_gx2/cpureginit.c
   trunk/src/cpu/amd/model_lx/cpubug.c
   trunk/src/cpu/amd/model_lx/cpureginit.c
   trunk/src/cpu/amd/model_lx/msrinit.c
   trunk/src/cpu/amd/mtrr/amd_mtrr.c
   trunk/src/cpu/amd/sc520/raminit.c
   trunk/src/cpu/amd/sc520/sc520.c
   trunk/src/cpu/intel/Makefile.inc
   trunk/src/cpu/intel/car/cache_as_ram.inc
   trunk/src/cpu/intel/hyperthreading/intel_sibling.c
   trunk/src/cpu/intel/microcode/microcode.c
   trunk/src/cpu/intel/model_1067x/model_1067x_init.c
   trunk/src/cpu/intel/model_106cx/cache_as_ram.inc
   trunk/src/cpu/intel/model_106cx/model_106cx_init.c
   trunk/src/cpu/intel/model_69x/model_69x_init.c
   trunk/src/cpu/intel/model_6bx/model_6bx_init.c
   trunk/src/cpu/intel/model_6dx/model_6dx_init.c
   trunk/src/cpu/intel/model_6ex/cache_as_ram.inc
   trunk/src/cpu/intel/model_6ex/model_6ex_init.c
   trunk/src/cpu/intel/model_6fx/cache_as_ram.inc
   trunk/src/cpu/intel/model_6fx/model_6fx_init.c
   trunk/src/cpu/intel/model_6xx/microcode_MU16810d.h
   trunk/src/cpu/intel/model_6xx/microcode_MU16830c.h
   trunk/src/cpu/intel/model_6xx/model_6xx_init.c
   trunk/src/cpu/intel/model_f0x/model_f0x_init.c
   trunk/src/cpu/intel/model_f0x/multiplier.h
   trunk/src/cpu/intel/model_f1x/model_f1x_init.c
   trunk/src/cpu/intel/model_f1x/multiplier.h
   trunk/src/cpu/intel/model_f2x/model_f2x_init.c
   trunk/src/cpu/intel/model_f3x/microcode_M1DF340E.h
   trunk/src/cpu/intel/model_f3x/microcode_M1DF3413.h
   trunk/src/cpu/intel/model_f3x/model_f3x_init.c
   trunk/src/cpu/intel/model_f4x/model_f4x_init.c
   trunk/src/cpu/intel/socket_mPGA604/Kconfig
   trunk/src/cpu/intel/speedstep/acpi.c
   trunk/src/cpu/via/car/cache_as_ram.inc
   trunk/src/cpu/via/model_c3/model_c3_init.c
   trunk/src/cpu/via/model_c7/model_c7_init.c
   trunk/src/cpu/x86/16bit/entry16.inc
   trunk/src/cpu/x86/16bit/reset16.lds
   trunk/src/cpu/x86/32bit/entry32.inc
   trunk/src/cpu/x86/lapic/lapic.c
   trunk/src/cpu/x86/lapic/secondary.S
   trunk/src/cpu/x86/mtrr/earlymtrr.c
   trunk/src/cpu/x86/mtrr/mtrr.c
   trunk/src/cpu/x86/pae/pgtbl.c
   trunk/src/cpu/x86/smm/smiutil.c
   trunk/src/cpu/x86/smm/smm.ld
   trunk/src/cpu/x86/smm/smmhandler.S
   trunk/src/cpu/x86/smm/smmrelocate.S
   trunk/src/cpu/x86/sse_disable.inc
   trunk/src/cpu/x86/tsc/delay_tsc.c
   trunk/src/devices/cardbus_device.c
   trunk/src/devices/device_util.c
   trunk/src/devices/hypertransport.c
   trunk/src/devices/oprom/include/x86emu/regs.h
   trunk/src/devices/oprom/include/x86emu/x86emu.h
   trunk/src/devices/oprom/x86.c
   trunk/src/devices/oprom/x86_asm.S
   trunk/src/devices/oprom/x86_interrupts.c
   trunk/src/devices/oprom/x86emu/decode.c
   trunk/src/devices/oprom/x86emu/ops2.c
   trunk/src/devices/oprom/x86emu/sys.c
   trunk/src/devices/oprom/x86emu/x86emui.h
   trunk/src/devices/oprom/yabel/biosemu.c
   trunk/src/devices/oprom/yabel/biosemu.h
   trunk/src/devices/oprom/yabel/compat/functions.c
   trunk/src/devices/oprom/yabel/compat/of.h
   trunk/src/devices/oprom/yabel/compat/time.h
   trunk/src/devices/oprom/yabel/debug.h
   trunk/src/devices/oprom/yabel/interrupt.c
   trunk/src/devices/oprom/yabel/pmm.c
   trunk/src/devices/oprom/yabel/pmm.h
   trunk/src/devices/oprom/yabel/vbe.c
   trunk/src/devices/pci_device.c
   trunk/src/devices/pci_rom.c
   trunk/src/devices/pciexp_device.c
   trunk/src/devices/pcix_device.c
   trunk/src/devices/pnp_device.c
   trunk/src/devices/root_device.c
   trunk/src/drivers/ati/ragexl/atyfb.h
   trunk/src/drivers/ati/ragexl/fb.h
   trunk/src/drivers/ati/ragexl/fbcon.h
   trunk/src/drivers/ati/ragexl/mach64.h
   trunk/src/drivers/ati/ragexl/mach64_ct.c
   trunk/src/drivers/ati/ragexl/xlinit.c
   trunk/src/drivers/emulation/qemu/fb.h
   trunk/src/drivers/emulation/qemu/fbcon.h
   trunk/src/drivers/emulation/qemu/init.c
   trunk/src/drivers/generic/debug/debug_dev.c
   trunk/src/drivers/i2c/adm1026/adm1026.c
   trunk/src/drivers/i2c/adm1027/adm1027.c
   trunk/src/drivers/i2c/i2cmux/i2cmux.c
   trunk/src/drivers/i2c/i2cmux2/i2cmux2.c
   trunk/src/drivers/i2c/lm63/lm63.c
   trunk/src/drivers/si/3114/si_sata.c
   trunk/src/drivers/trident/blade3d/blade3d.c
   trunk/src/include/boot/coreboot_tables.h
   trunk/src/include/boot/elf_boot.h
   trunk/src/include/cbfs.h
   trunk/src/include/console/btext.h
   trunk/src/include/console/console.h
   trunk/src/include/console/vtxprintf.h
   trunk/src/include/cpu/amd/amdk8_sysconf.h
   trunk/src/include/cpu/amd/gx2def.h
   trunk/src/include/cpu/amd/lxdef.h
   trunk/src/include/cpu/amd/sc520.h
   trunk/src/include/cpu/amd/vr.h
   trunk/src/include/cpu/x86/cache.h
   trunk/src/include/cpu/x86/msr.h
   trunk/src/include/cpu/x86/pae.h
   trunk/src/include/cpu/x86/smm.h
   trunk/src/include/cpu/x86/stack.h
   trunk/src/include/device/agp.h
   trunk/src/include/device/cardbus.h
   trunk/src/include/device/device.h
   trunk/src/include/device/hypertransport.h
   trunk/src/include/device/hypertransport_def.h
   trunk/src/include/device/pci.h
   trunk/src/include/device/pci_def.h
   trunk/src/include/device/pciexp.h
   trunk/src/include/device/pcix.h
   trunk/src/include/smp/atomic.h
   trunk/src/include/string.h
   trunk/src/lib/cbfs.c
   trunk/src/lib/cbmem.c
   trunk/src/lib/compute_ip_checksum.c
   trunk/src/lib/generic_dump_spd.c
   trunk/src/lib/generic_sdram.c
   trunk/src/lib/jpeg.c
   trunk/src/lib/lzma.c
   trunk/src/lib/lzmadecode.c
   trunk/src/lib/lzmadecode.h
   trunk/src/lib/nrv2b.c
   trunk/src/lib/ramtest.c
   trunk/src/lib/uart8250.c
   trunk/src/lib/usbdebug_direct.c
   trunk/src/lib/xmodem.c
   trunk/src/mainboard/a-trend/Kconfig
   trunk/src/mainboard/abit/Kconfig
   trunk/src/mainboard/amd/rumba/devicetree.cb
   trunk/src/mainboard/amd/rumba/irq_tables.c
   trunk/src/mainboard/amd/rumba/mainboard.c
   trunk/src/mainboard/amd/rumba/romstage.c
   trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8111.asl
   trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl
   trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8131.asl
   trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8131_2.asl
   trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8132_2.asl
   trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8151.asl
   trunk/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
   trunk/src/mainboard/amd/serengeti_cheetah/devicetree.cb
   trunk/src/mainboard/amd/serengeti_cheetah/dsdt.asl
   trunk/src/mainboard/amd/serengeti_cheetah/fadt.c
   trunk/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c
   trunk/src/mainboard/amd/serengeti_cheetah/irq_tables.c
   trunk/src/mainboard/amd/serengeti_cheetah/mptable.c
   trunk/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt
   trunk/src/mainboard/amd/serengeti_cheetah/resourcemap.c
   trunk/src/mainboard/amd/serengeti_cheetah/romstage.c
   trunk/src/mainboard/amd/serengeti_cheetah/ssdt2.asl
   trunk/src/mainboard/amd/serengeti_cheetah/ssdt3.asl
   trunk/src/mainboard/amd/serengeti_cheetah/ssdt4.asl
   trunk/src/mainboard/arima/Kconfig
   trunk/src/mainboard/arima/hdama/debug.c
   trunk/src/mainboard/arima/hdama/devicetree.cb
   trunk/src/mainboard/arima/hdama/irq_tables.c
   trunk/src/mainboard/arima/hdama/mptable.c
   trunk/src/mainboard/artecgroup/Kconfig
   trunk/src/mainboard/artecgroup/dbe61/spd_table.h
   trunk/src/mainboard/asus/a8n_e/irq_tables.c
   trunk/src/mainboard/asus/a8v-e_se/acpi_tables.c
   trunk/src/mainboard/asus/a8v-e_se/romstage.c
   trunk/src/mainboard/asus/m2v-mx_se/acpi_tables.c
   trunk/src/mainboard/asus/m2v-mx_se/dsdt.asl
   trunk/src/mainboard/asus/m2v-mx_se/romstage.c
   trunk/src/mainboard/asus/mew-vm/devicetree.cb
   trunk/src/mainboard/asus/mew-vm/irq_tables.c
   trunk/src/mainboard/azza/Kconfig
   trunk/src/mainboard/biostar/Kconfig
   trunk/src/mainboard/broadcom/Kconfig
   trunk/src/mainboard/broadcom/blast/devicetree.cb
   trunk/src/mainboard/broadcom/blast/get_bus_conf.c
   trunk/src/mainboard/broadcom/blast/irq_tables.c
   trunk/src/mainboard/broadcom/blast/mptable.c
   trunk/src/mainboard/broadcom/blast/resourcemap.c
   trunk/src/mainboard/broadcom/blast/romstage.c
   trunk/src/mainboard/compaq/Kconfig
   trunk/src/mainboard/dell/s1850/debug.c
   trunk/src/mainboard/dell/s1850/devicetree.cb
   trunk/src/mainboard/dell/s1850/irq_tables.c
   trunk/src/mainboard/dell/s1850/mptable.c
   trunk/src/mainboard/dell/s1850/romstage.c
   trunk/src/mainboard/dell/s1850/s1850_fixups.c
   trunk/src/mainboard/dell/s1850/watchdog.c
   trunk/src/mainboard/digitallogic/Kconfig
   trunk/src/mainboard/digitallogic/adl855pc/devicetree.cb
   trunk/src/mainboard/digitallogic/adl855pc/irq_tables.c
   trunk/src/mainboard/digitallogic/adl855pc/romstage.c
   trunk/src/mainboard/digitallogic/msm586seg/devicetree.cb
   trunk/src/mainboard/digitallogic/msm586seg/irq_tables.c
   trunk/src/mainboard/digitallogic/msm586seg/mainboard.c
   trunk/src/mainboard/digitallogic/msm586seg/romstage.c
   trunk/src/mainboard/digitallogic/msm800sev/devicetree.cb
   trunk/src/mainboard/digitallogic/msm800sev/romstage.c
   trunk/src/mainboard/eaglelion/5bcm/devicetree.cb
   trunk/src/mainboard/eaglelion/5bcm/irq_tables.c
   trunk/src/mainboard/eaglelion/5bcm/romstage.c
   trunk/src/mainboard/emulation/qemu-x86/devicetree.cb
   trunk/src/mainboard/emulation/qemu-x86/irq_tables.c
   trunk/src/mainboard/emulation/qemu-x86/mainboard.c
   trunk/src/mainboard/emulation/qemu-x86/romstage.c
   trunk/src/mainboard/gigabyte/Kconfig
   trunk/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
   trunk/src/mainboard/gigabyte/m57sli/Kconfig
   trunk/src/mainboard/gigabyte/m57sli/Makefile.inc
   trunk/src/mainboard/gigabyte/m57sli/acpi_tables.c
   trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c
   trunk/src/mainboard/gigabyte/m57sli/cmos.layout
   trunk/src/mainboard/gigabyte/m57sli/dsdt.asl
   trunk/src/mainboard/gigabyte/m57sli/get_bus_conf.c
   trunk/src/mainboard/gigabyte/m57sli/irq_tables.c
   trunk/src/mainboard/gigabyte/m57sli/mptable.c
   trunk/src/mainboard/gigabyte/m57sli/resourcemap.c
   trunk/src/mainboard/gigabyte/m57sli/romstage.c
   trunk/src/mainboard/hp/Kconfig
   trunk/src/mainboard/hp/dl145_g3/romstage.c
   trunk/src/mainboard/ibm/Kconfig
   trunk/src/mainboard/ibm/e325/devicetree.cb
   trunk/src/mainboard/ibm/e325/irq_tables.c
   trunk/src/mainboard/ibm/e325/resourcemap.c
   trunk/src/mainboard/ibm/e325/romstage.c
   trunk/src/mainboard/ibm/e326/devicetree.cb
   trunk/src/mainboard/ibm/e326/irq_tables.c
   trunk/src/mainboard/ibm/e326/resourcemap.c
   trunk/src/mainboard/ibm/e326/romstage.c
   trunk/src/mainboard/iei/nova4899r/irq_tables.c
   trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
   trunk/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl
   trunk/src/mainboard/intel/d945gclf/acpi/ich7_pci_irqs.asl
   trunk/src/mainboard/intel/d945gclf/acpi/mainboard.asl
   trunk/src/mainboard/intel/d945gclf/acpi/platform.asl
   trunk/src/mainboard/intel/d945gclf/acpi/thermal.asl
   trunk/src/mainboard/intel/d945gclf/acpi_tables.c
   trunk/src/mainboard/intel/d945gclf/chip.h
   trunk/src/mainboard/intel/d945gclf/cmos.layout
   trunk/src/mainboard/intel/d945gclf/devicetree.cb
   trunk/src/mainboard/intel/d945gclf/dsdt.asl
   trunk/src/mainboard/intel/d945gclf/mainboard_smi.c
   trunk/src/mainboard/intel/d945gclf/mptable.c
   trunk/src/mainboard/intel/d945gclf/romstage.c
   trunk/src/mainboard/intel/d945gclf/rtl8168.c
   trunk/src/mainboard/intel/eagleheights/Kconfig
   trunk/src/mainboard/intel/jarrell/debug.c
   trunk/src/mainboard/intel/jarrell/devicetree.cb
   trunk/src/mainboard/intel/jarrell/jarrell_fixups.c
   trunk/src/mainboard/intel/jarrell/mptable.c
   trunk/src/mainboard/intel/jarrell/romstage.c
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   trunk/src/northbridge/via/vx800/uma_ram_setting.c
   trunk/src/northbridge/via/vx800/vga.c
   trunk/src/northbridge/via/vx800/vx800_early_serial.c
   trunk/src/northbridge/via/vx800/vx800_early_smbus.c
   trunk/src/northbridge/via/vx800/vx800_lpc.c
   trunk/src/pc80/Makefile.inc
   trunk/src/pc80/i8259.c
   trunk/src/pc80/mc146818rtc.c
   trunk/src/pc80/mc146818rtc_early.c
   trunk/src/pc80/serial.c
   trunk/src/southbridge/amd/amd8111/amd8111.c
   trunk/src/southbridge/amd/amd8111/amd8111_ac97.c
   trunk/src/southbridge/amd/amd8111/amd8111_acpi.c
   trunk/src/southbridge/amd/amd8111/amd8111_ide.c
   trunk/src/southbridge/amd/amd8111/amd8111_lpc.c
   trunk/src/southbridge/amd/amd8111/amd8111_nic.c
   trunk/src/southbridge/amd/amd8111/amd8111_reset.c
   trunk/src/southbridge/amd/amd8111/amd8111_smbus.c
   trunk/src/southbridge/amd/amd8111/amd8111_smbus.h
   trunk/src/southbridge/amd/amd8111/amd8111_usb.c
   trunk/src/southbridge/amd/amd8111/amd8111_usb2.c
   trunk/src/southbridge/amd/amd8111/chip.h
   trunk/src/southbridge/amd/amd8131-disable/amd8131_bridge.c
   trunk/src/southbridge/amd/amd8131/amd8131_bridge.c
   trunk/src/southbridge/amd/amd8132/amd8132_bridge.c
   trunk/src/southbridge/amd/amd8151/amd8151_agp3.c
   trunk/src/southbridge/amd/cs5535/cs5535.c
   trunk/src/southbridge/amd/cs5535/cs5535_early_setup.c
   trunk/src/southbridge/amd/cs5535/cs5535_early_smbus.c
   trunk/src/southbridge/amd/cs5535/cs5535_smbus.h
   trunk/src/southbridge/amd/cs5536/Kconfig
   trunk/src/southbridge/amd/cs5536/cs5536.c
   trunk/src/southbridge/amd/cs5536/cs5536.h
   trunk/src/southbridge/amd/cs5536/cs5536_smbus2.h
   trunk/src/southbridge/broadcom/bcm5780/bcm5780_pcix.c
   trunk/src/southbridge/broadcom/bcm5785/bcm5785.c
   trunk/src/southbridge/broadcom/bcm5785/bcm5785_early_setup.c
   trunk/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c
   trunk/src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
   trunk/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
   trunk/src/southbridge/broadcom/bcm5785/bcm5785_sb_pci_main.c
   trunk/src/southbridge/broadcom/bcm5785/bcm5785_smbus.h
   trunk/src/southbridge/broadcom/bcm5785/bcm5785_usb.c
   trunk/src/southbridge/broadcom/bcm5785/chip.h
   trunk/src/southbridge/intel/esb6300/chip.h
   trunk/src/southbridge/intel/esb6300/esb6300.c
   trunk/src/southbridge/intel/esb6300/esb6300_ac97.c
   trunk/src/southbridge/intel/esb6300/esb6300_early_smbus.c
   trunk/src/southbridge/intel/esb6300/esb6300_ehci.c
   trunk/src/southbridge/intel/esb6300/esb6300_ide.c
   trunk/src/southbridge/intel/esb6300/esb6300_lpc.c
   trunk/src/southbridge/intel/esb6300/esb6300_pic.c
   trunk/src/southbridge/intel/esb6300/esb6300_sata.c
   trunk/src/southbridge/intel/esb6300/esb6300_smbus.h
   trunk/src/southbridge/intel/esb6300/esb6300_uhci.c
   trunk/src/southbridge/intel/i3100/i3100_lpc.c
   trunk/src/southbridge/intel/i3100/i3100_sata.c
   trunk/src/southbridge/intel/i82371eb/i82371eb_smbus.h
   trunk/src/southbridge/intel/i82801ax/i82801ax_ide.c
   trunk/src/southbridge/intel/i82801ax/i82801ax_lpc.c
   trunk/src/southbridge/intel/i82801bx/i82801bx_ide.c
   trunk/src/southbridge/intel/i82801bx/i82801bx_lpc.c
   trunk/src/southbridge/intel/i82801bx/i82801bx_smbus.h
   trunk/src/southbridge/intel/i82801cx/chip.h
   trunk/src/southbridge/intel/i82801cx/i82801cx.c
   trunk/src/southbridge/intel/i82801cx/i82801cx.h
   trunk/src/southbridge/intel/i82801cx/i82801cx_early_smbus.c
   trunk/src/southbridge/intel/i82801cx/i82801cx_lpc.c
   trunk/src/southbridge/intel/i82801cx/i82801cx_smbus.c
   trunk/src/southbridge/intel/i82801cx/i82801cx_usb.c
   trunk/src/southbridge/intel/i82801dx/i82801dx.c
   trunk/src/southbridge/intel/i82801dx/i82801dx.h
   trunk/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
   trunk/src/southbridge/intel/i82801ex/chip.h
   trunk/src/southbridge/intel/i82801ex/i82801ex.c
   trunk/src/southbridge/intel/i82801ex/i82801ex_ac97.c
   trunk/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c
   trunk/src/southbridge/intel/i82801ex/i82801ex_ehci.c
   trunk/src/southbridge/intel/i82801ex/i82801ex_ide.c
   trunk/src/southbridge/intel/i82801ex/i82801ex_lpc.c
   trunk/src/southbridge/intel/i82801ex/i82801ex_pci.c
   trunk/src/southbridge/intel/i82801ex/i82801ex_sata.c
   trunk/src/southbridge/intel/i82801ex/i82801ex_smbus.h
   trunk/src/southbridge/intel/i82801ex/i82801ex_uhci.c
   trunk/src/southbridge/intel/i82801gx/i82801gx_azalia.c
   trunk/src/southbridge/intel/i82870/p64h2_ioapic.c
   trunk/src/southbridge/intel/i82870/p64h2_pcibridge.c
   trunk/src/southbridge/intel/pxhd/pxhd_bridge.c
   trunk/src/southbridge/nvidia/mcp55/mcp55_fadt.c
   trunk/src/southbridge/nvidia/mcp55/mcp55_lpc.c
   trunk/src/southbridge/ricoh/rl5c476/rl5c476.c
   trunk/src/southbridge/ricoh/rl5c476/rl5c476.h
   trunk/src/southbridge/sis/sis966/sis966_lpc.c
   trunk/src/southbridge/via/k8t890/k8t890_bridge.c
   trunk/src/southbridge/via/k8t890/k8t890_ctrl.c
   trunk/src/southbridge/via/k8t890/k8t890_early_car.c
   trunk/src/southbridge/via/k8t890/k8t890_host_ctrl.c
   trunk/src/southbridge/via/k8t890/romstrap.inc
   trunk/src/southbridge/via/vt8231/vt8231.c
   trunk/src/southbridge/via/vt8231/vt8231_acpi.c
   trunk/src/southbridge/via/vt8231/vt8231_early_serial.c
   trunk/src/southbridge/via/vt8231/vt8231_early_smbus.c
   trunk/src/southbridge/via/vt8231/vt8231_ide.c
   trunk/src/southbridge/via/vt8231/vt8231_lpc.c
   trunk/src/southbridge/via/vt8231/vt8231_nic.c
   trunk/src/southbridge/via/vt8231/vt8231_usb.c
   trunk/src/southbridge/via/vt8235/vt8235.c
   trunk/src/southbridge/via/vt8235/vt8235_early_serial.c
   trunk/src/southbridge/via/vt8235/vt8235_early_smbus.c
   trunk/src/southbridge/via/vt8235/vt8235_ide.c
   trunk/src/southbridge/via/vt8235/vt8235_lpc.c
   trunk/src/southbridge/via/vt8235/vt8235_nic.c
   trunk/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
   trunk/src/southbridge/via/vt8237r/vt8237r_lpc.c
   trunk/src/superio/Makefile.inc
   trunk/src/superio/smsc/lpc47n227/lpc47n227_early_serial.c
   trunk/src/superio/smsc/lpc47n227/superio.c
   trunk/src/superio/winbond/w83627hf/superio.c
   trunk/util/abuild/abuild
   trunk/util/abuild/abuild.1
   trunk/util/amdtools/README
   trunk/util/amdtools/k8-compare-pci-space.pl
   trunk/util/amdtools/k8-interpret-extended-memory-settings.pl
   trunk/util/amdtools/parse-bkdg.pl
   trunk/util/cbfstool/EXAMPLE
   trunk/util/cbfstool/Makefile
   trunk/util/cbfstool/cbfs.h
   trunk/util/cbfstool/common.c
   trunk/util/cbfstool/lzma/C/7zip/Common/InBuffer.h
   trunk/util/cbfstool/lzma/C/7zip/Common/OutBuffer.cpp
   trunk/util/cbfstool/lzma/C/7zip/Common/OutBuffer.h
   trunk/util/cbfstool/lzma/C/7zip/Common/StdAfx.h
   trunk/util/cbfstool/lzma/C/7zip/Common/StreamUtils.cpp
   trunk/util/cbfstool/lzma/C/7zip/Compress/LZ/BinTree/BinTree.h
   trunk/util/cbfstool/lzma/C/7zip/Compress/LZ/BinTree/BinTreeMain.h
   trunk/util/cbfstool/lzma/C/7zip/Compress/LZ/IMatchFinder.h
   trunk/util/cbfstool/lzma/C/7zip/Compress/LZ/LZInWindow.cpp
   trunk/util/cbfstool/lzma/C/7zip/Compress/LZ/LZInWindow.h
   trunk/util/cbfstool/lzma/C/7zip/Compress/LZ/StdAfx.h
   trunk/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMA.h
   trunk/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMAEncoder.cpp
   trunk/util/cbfstool/lzma/C/7zip/Compress/LZMA/LZMAEncoder.h
   trunk/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoder.h
   trunk/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderBit.cpp
   trunk/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderBitTree.h
   trunk/util/cbfstool/lzma/C/7zip/Compress/RangeCoder/RangeCoderOpt.h
   trunk/util/cbfstool/lzma/C/7zip/Decompress/LzmaDecode.c
   trunk/util/cbfstool/lzma/C/7zip/Decompress/LzmaDecode.h
   trunk/util/cbfstool/lzma/C/7zip/ICoder.h
   trunk/util/cbfstool/lzma/C/7zip/IStream.h
   trunk/util/cbfstool/lzma/C/Common/Alloc.cpp
   trunk/util/cbfstool/lzma/C/Common/CRC.cpp
   trunk/util/cbfstool/lzma/C/Common/CRC.h
   trunk/util/cbfstool/lzma/C/Common/MyCom.h
   trunk/util/cbfstool/lzma/C/Common/MyGuidDef.h
   trunk/util/cbfstool/lzma/C/Common/MyUnknown.h
   trunk/util/cbfstool/lzma/C/Common/MyWindows.h
   trunk/util/cbfstool/lzma/C/Common/NewHandler.h
   trunk/util/cbfstool/lzma/C/Common/StdAfx.h
   trunk/util/cbfstool/lzma/C/LGPL.txt
   trunk/util/cbfstool/lzma/minilzma.cc
   trunk/util/crossgcc/buildgcc
   trunk/util/crossgcc/patches/gcc-4.3.2_use-gnu-style-comments-in-assembly.patch
   trunk/util/crossgcc/patches/gcc-4.3.3_use-gnu-style-comments-in-assembly.patch
   trunk/util/crossgcc/patches/gcc-4.4.1_less-junk-in-crtbegin.patch
   trunk/util/crossgcc/patches/gcc-4.4.2_less-junk-in-crtbegin.patch
   trunk/util/dump_mmcr/dumpmmcr.c
   trunk/util/ectool/ec.c
   trunk/util/getpir/README
   trunk/util/inteltool/Makefile
   trunk/util/inteltool/cpu.c
   trunk/util/inteltool/gpio.c
   trunk/util/inteltool/inteltool.c
   trunk/util/inteltool/inteltool.h
   trunk/util/inteltool/memory.c
   trunk/util/inteltool/pcie.c
   trunk/util/inteltool/powermgt.c
   trunk/util/inteltool/rootcmplx.c
   trunk/util/k8resdump/Makefile
   trunk/util/kconfig/confdata.c
   trunk/util/kconfig/lex.zconf.c_shipped
   trunk/util/kconfig/lxdialog/BIG.FAT.WARNING
   trunk/util/kconfig/lxdialog/menubox.c
   trunk/util/kconfig/mconf.c
   trunk/util/kconfig/regex.c
   trunk/util/kconfig/regex.h
   trunk/util/kconfig/zconf.tab.c_shipped
   trunk/util/lbtdump/Makefile
   trunk/util/lbtdump/lbtdump.c
   trunk/util/mkelfImage/Makefile
   trunk/util/mkelfImage/News
   trunk/util/mkelfImage/config/config.guess
   trunk/util/mkelfImage/config/install-sh
   trunk/util/mkelfImage/configure.ac
   trunk/util/mkelfImage/include/elf_boot.h
   trunk/util/mkelfImage/include/linuxbios_tables.h
   trunk/util/mkelfImage/include/mkelfImage.h
   trunk/util/mkelfImage/kunzip_src/arch/alpha/include/stdint.h
   trunk/util/mkelfImage/kunzip_src/arch/alpha/lib/divide.S
   trunk/util/mkelfImage/kunzip_src/arch/alpha/lib/kunzip.lds
   trunk/util/mkelfImage/kunzip_src/arch/i386/include/stdint.h
   trunk/util/mkelfImage/kunzip_src/arch/i386/lib/kunzip.lds
   trunk/util/mkelfImage/kunzip_src/arch/i386/lib/start.S
   trunk/util/mkelfImage/kunzip_src/include/stdarg.h
   trunk/util/mkelfImage/kunzip_src/include/string.h
   trunk/util/mkelfImage/kunzip_src/lib/inflate.c
   trunk/util/mkelfImage/kunzip_src/lib/kunzip.c
   trunk/util/mkelfImage/linux-i386/convert.lds
   trunk/util/mkelfImage/linux-i386/convert_params.c
   trunk/util/mkelfImage/linux-i386/head.S
   trunk/util/mkelfImage/linux-i386/mkelf-linux-i386.c
   trunk/util/mkelfImage/linux-i386/uniform_boot.h
   trunk/util/mkelfImage/linux-i386/x86-linux.h
   trunk/util/mkelfImage/linux-ia64/convert_params.c
   trunk/util/mkelfImage/linux-ia64/head.S
   trunk/util/mkelfImage/linux-ia64/mkelf-linux-ia64.c
   trunk/util/mkelfImage/main/mkelfImage.c
   trunk/util/mkelfImage/main/mkelfImage.man
   trunk/util/mkelfImage/mkelfImage.spec.in
   trunk/util/mptable/mptable.c
   trunk/util/msrtool/configure
   trunk/util/msrtool/geodegx2.c
   trunk/util/msrtool/msrtool.c
   trunk/util/nrv2b/nrv2b.c
   trunk/util/nvramtool/Makefile
   trunk/util/nvramtool/cmos_lowlevel.c
   trunk/util/nvramtool/cmos_ops.c
   trunk/util/nvramtool/common.c
   trunk/util/nvramtool/coreboot_tables.h
   trunk/util/nvramtool/hexdump.c
   trunk/util/nvramtool/ip_checksum.h
   trunk/util/nvramtool/nvramtool.8
   trunk/util/optionlist/Makefile
   trunk/util/optionlist/kconfig2wiki
   trunk/util/options/build_opt_tbl.c
   trunk/util/resetcf/resetcf.c
   trunk/util/romcc/Makefile
   trunk/util/romcc/do_tests.sh
   trunk/util/romcc/romcc.c
   trunk/util/romcc/tests.sh
   trunk/util/romcc/tests/fail_test10.c
   trunk/util/romcc/tests/fail_test2.c
   trunk/util/romcc/tests/hello_world.c
   trunk/util/romcc/tests/hello_world1.c
   trunk/util/romcc/tests/hello_world2.c
   trunk/util/romcc/tests/include/linux_console.h
   trunk/util/romcc/tests/include/linuxi386_syscall.h
   trunk/util/romcc/tests/linux_console.h
   trunk/util/romcc/tests/linux_test13.c
   trunk/util/romcc/tests/linux_test2.c
   trunk/util/romcc/tests/linux_test3.c
   trunk/util/romcc/tests/linux_test4.c
   trunk/util/romcc/tests/linux_test5.c
   trunk/util/romcc/tests/linuxi386_syscall.h
   trunk/util/romcc/tests/raminit_test.c
   trunk/util/romcc/tests/raminit_test1.c
   trunk/util/romcc/tests/raminit_test2.c
   trunk/util/romcc/tests/raminit_test6.c
   trunk/util/romcc/tests/raminit_test7.c
   trunk/util/romcc/tests/simple_test.c
   trunk/util/romcc/tests/simple_test1.c
   trunk/util/romcc/tests/simple_test10.c
   trunk/util/romcc/tests/simple_test19.c
   trunk/util/romcc/tests/simple_test2.c
   trunk/util/romcc/tests/simple_test20.c
   trunk/util/romcc/tests/simple_test22.c
   trunk/util/romcc/tests/simple_test27.c
   trunk/util/romcc/tests/simple_test3.c
   trunk/util/romcc/tests/simple_test30.c
   trunk/util/romcc/tests/simple_test32.c
   trunk/util/romcc/tests/simple_test36.c
   trunk/util/romcc/tests/simple_test37.c
   trunk/util/romcc/tests/simple_test38.c
   trunk/util/romcc/tests/simple_test39.c
   trunk/util/romcc/tests/simple_test4.c
   trunk/util/romcc/tests/simple_test43.c
   trunk/util/romcc/tests/simple_test45.c
   trunk/util/romcc/tests/simple_test46.c
   trunk/util/romcc/tests/simple_test47.c
   trunk/util/romcc/tests/simple_test48.c
   trunk/util/romcc/tests/simple_test49.c
   trunk/util/romcc/tests/simple_test5.c
   trunk/util/romcc/tests/simple_test50.c
   trunk/util/romcc/tests/simple_test54.c
   trunk/util/romcc/tests/simple_test56.c
   trunk/util/romcc/tests/simple_test59.c
   trunk/util/romcc/tests/simple_test6.c
   trunk/util/romcc/tests/simple_test61.c
   trunk/util/romcc/tests/simple_test65.c
   trunk/util/romcc/tests/simple_test66.c
   trunk/util/romcc/tests/simple_test67.c
   trunk/util/romcc/tests/simple_test7.c
   trunk/util/romcc/tests/simple_test72.c
   trunk/util/romcc/tests/simple_test73.c
   trunk/util/romcc/tests/simple_test74.c
   trunk/util/romcc/tests/simple_test75.c
   trunk/util/romcc/tests/simple_test76.c
   trunk/util/romcc/tests/simple_test81.c
   trunk/util/sconfig/lex.yy.c_shipped
   trunk/util/sconfig/sconfig.tab.c_shipped
   trunk/util/sconfig/sconfig.tab.h_shipped
   trunk/util/superiotool/smsc.c
   trunk/util/superiotool/superiotool.8
   trunk/util/vgabios/Makefile
   trunk/util/vgabios/testbios.c

Modified: trunk/Makefile
==============================================================================
--- trunk/Makefile	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/Makefile	Tue Apr 27 08:56:47 2010	(r5507)
@@ -161,7 +161,7 @@
 
 CBFSTOOL:=$(objutil)/cbfstool/cbfstool
 
-# needed objects that every mainboard uses 
+# needed objects that every mainboard uses
 # Creation of these is architecture and mainboard independent
 $(obj)/mainboard/$(MAINBOARDDIR)/static.c: $(src)/mainboard/$(MAINBOARDDIR)/devicetree.cb  $(objutil)/sconfig/sconfig
 	@printf "    SCONFIG    $(subst $(src)/,,$(<))\n"
@@ -282,14 +282,14 @@
 	@echo ldscripts=$(ldscripts)
 
 OBJS     := $(patsubst %,$(obj)/%,$(TARGETS-y))
-INCLUDES := -Isrc -Isrc/include -I$(obj) -Isrc/arch/$(ARCHDIR-y)/include 
+INCLUDES := -Isrc -Isrc/include -I$(obj) -Isrc/arch/$(ARCHDIR-y)/include
 INCLUDES += -Isrc/devices/oprom/include
 # abspath is a workaround for romcc
 INCLUDES += -include $(abspath $(obj)/config.h)
 
 CFLAGS = $(INCLUDES) -Os -nostdinc -pipe
 CFLAGS += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes
-CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs 
+CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs
 CFLAGS += -Wstrict-aliasing -Wshadow
 ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y)
 CFLAGS += -Werror

Modified: trunk/documentation/Kconfig.tex
==============================================================================
--- trunk/documentation/Kconfig.tex	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/documentation/Kconfig.tex	Tue Apr 27 08:56:47 2010	(r5507)
@@ -120,7 +120,7 @@
   iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/
   perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex
   mv pci3.hex ssdt3.c
-  
+
 $(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
   iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl
   perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
@@ -470,7 +470,7 @@
 can therefore test other variables (which is part of the reason
 we set up conditional inclusion of this file, instead
 of unconditionally including it). Here is an example from AMD 8111.
-No conditionals in this one yet. 
+No conditionals in this one yet.
 \begin{verbatim}
 driver-y += amd8111.o
 driver-y += amd8111_usb.o

Modified: trunk/documentation/LinuxBIOS-AMD64.tex
==============================================================================
--- trunk/documentation/LinuxBIOS-AMD64.tex	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/documentation/LinuxBIOS-AMD64.tex	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 %
 % This document is released under the GPL
 % Initially written by Stefan Reinauer, <stepan at coresystems.de>
-% 
+%
 
 \documentclass[titlepage,12pt]{article}
 \usepackage{a4}
@@ -38,7 +38,7 @@
 
 \maketitle
 
-\thispagestyle{empty}                                                           
+\thispagestyle{empty}
 
 \tableofcontents
 
@@ -67,7 +67,7 @@
  \item 2009/04/19 replace LinuxBIOS with coreboot
  \item 2004/06/02 url and language fixes from Ken Fuchs $<$kfuchs at winternet.com$>$
  \item 2004/02/10 acpi and option rom updates
- \item 2003/11/18 initial release 
+ \item 2003/11/18 initial release
  \end{itemize}
 
 
@@ -78,7 +78,7 @@
 
 \section{What is coreboot?}
 
-coreboot aims to replace the normal BIOS found on x86, AMD64, PPC, 
+coreboot aims to replace the normal BIOS found on x86, AMD64, PPC,
 Alpha, and other machines with a Linux kernel that can boot Linux from a cold
 start. The startup code of an average coreboot port is about 500 lines of
 assembly and 5000 lines of C. It executes 16 instructions to get into 32bit
@@ -131,7 +131,7 @@
 
 You can get the entire source tree via SVN:
 
-{ \small 
+{ \small
 \begin{verbatim}
 $ svn co svn://coreboot.org/repos/trunk/coreboot-v2
 \end{verbatim}
@@ -151,7 +151,7 @@
 Due to major structural enhancements to \hbox{coreboot}, AMD64 support
 is only available in the \texttt{coreboot-v2} tree. This tree reflects (as
 of November 2003) coreboot version 1.1.5 and will lead to coreboot 2.0
-when finished.  Most x86 hardware is currently only supported by the 
+when finished.  Most x86 hardware is currently only supported by the
 coreboot 1.0 tree.
 
 %
@@ -163,7 +163,7 @@
 lot of configuration options that can be tweaked in several ways:
 
 \begin{itemize}
-\item 
+\item
 Firmware image specific configuration options can be set in the image
 configuration file which is usually found in
 \texttt{coreboot-v2/targets/$<$vendor$>$/$<$mainboard$>$/}.  Such
@@ -217,7 +217,7 @@
 This will create a directory containing a Makefile and other software
 components needed for this build. The directory name is defined in the
 firmware image specific configuration file. In the case of AMD's Solo
-mainboard the default directory resides in 
+mainboard the default directory resides in
 \texttt{coreboot-v2/targets/amd/solo/solo}. To build the coreboot image, do
 
 \begin{verbatim}
@@ -257,7 +257,7 @@
 \begin{itemize}
 \item
 The default configuration file name in coreboot is \texttt{Config.lb}.
-\item 
+\item
 All variables used in a configuration file have to be declared in this
 file with \texttt{uses VARNAME} before usage.
 \item
@@ -267,13 +267,13 @@
 coreboot distinguishes between statements and options. Statements cause
 the coreboot configuration mechanism to act, whereas options set
 variables that are used by the build scripts or source code.
-\item 
+\item
 Default configuration values can be set in the mainboard configuration
 files (keyword default)
-\item 
+\item
 Option overrides to the default configuration can only be specified in
 the build target configuration file
-\texttt{coreboot-v2/targets/$<$vendor$>$/$<$mainboard$>$/Config.lb} 
+\texttt{coreboot-v2/targets/$<$vendor$>$/$<$mainboard$>$/Config.lb}
 (keyword option)
 \end{itemize}
 
@@ -290,7 +290,7 @@
 \end{verbatim}
 
 \textbf{NOTE:} Only configuration variables known to the configuration
-system can be used in configuration files. coreboot checks 
+system can be used in configuration files. coreboot checks
 \texttt{coreboot-v2/src/config/Options.lb} to see whether a configuration
 variable is known.
 
@@ -298,7 +298,7 @@
 
 The \texttt{default} statement is used to set a configuration variable
 with an overridable default value. It is commonly used in mainboard
-configuration files.  
+configuration files.
 
 Example:
 
@@ -320,7 +320,7 @@
 \end{verbatim}
 
 If an option contains a string, this string has to be protected with
-quotation marks: 
+quotation marks:
 
 \begin{verbatim}
         default CC="gcc -m32"
@@ -400,7 +400,7 @@
 \item \begin{verbatim}CC\end{verbatim}
 
 Target C Compiler. Default is \texttt{\$(CROSS\_COMPILE)gcc}. Set to
-\texttt{gcc -m32} for compiling AMD64 coreboot images on an AMD64 
+\texttt{gcc -m32} for compiling AMD64 coreboot images on an AMD64
 machine.
 
 \item \begin{verbatim}CONFIG_CHIP_CONFIGURE \end{verbatim}
@@ -415,7 +415,7 @@
 
 \item \begin{verbatim}CONFIG_DEFAULT_CONSOLE_LOGLEVEL\end{verbatim}
 
-Console will log at this level unless changed. Default is \texttt{7}, 
+Console will log at this level unless changed. Default is \texttt{7},
 minimum is \texttt{0}, maximum is \texttt{10}.
 
 \item \begin{verbatim}CONFIG_CONSOLE_SERIAL8250\end{verbatim}
@@ -430,7 +430,7 @@
 
 \item \begin{verbatim}CONFIG_FALLBACK_SIZE\end{verbatim}
 
-Fallback image size. Defaults to \texttt{65536} bytes. \textbf{NOTE:} 
+Fallback image size. Defaults to \texttt{65536} bytes. \textbf{NOTE:}
 This does not include the fallback payload.
 
 \item \begin{verbatim}CONFIG_HAVE_OPTION_TABLE\end{verbatim}
@@ -482,9 +482,9 @@
 registers, early mtrr settings, fallback mechanisms, dram init and
 possibly more.
 
-\textbf{NOTE:} The \texttt{option} keyword can not be used in mainboard 
-specific configuration files.  Options shall instead be set using the 
-\texttt{default} keyword so that they can be overridden by the image 
+\textbf{NOTE:} The \texttt{option} keyword can not be used in mainboard
+specific configuration files.  Options shall instead be set using the
+\texttt{default} keyword so that they can be overridden by the image
 specific configuration files if needed.
 
 \subsubsection{Mainboard specific keywords}
@@ -539,7 +539,7 @@
 be used for the build. coreboot on AMD64 uses romcc for it's early
 startup code placed in auto.c.
 
-To tell the configuration mechanism how to build \texttt{romcc} files, 
+To tell the configuration mechanism how to build \texttt{romcc} files,
 do:
 
 \begin{verbatim}
@@ -556,7 +556,7 @@
 \end{verbatim}
 
 Each \texttt{makerule} section contains file dependencies (using the
-texttt{depends} keyword) and an action that is taken when the dependencies 
+texttt{depends} keyword) and an action that is taken when the dependencies
 are satisfied (using the \texttt{action} keyword).
 
 \item \begin{verbatim}mainboardinit\end{verbatim}
@@ -668,7 +668,7 @@
 The first occurrence of the \texttt{pci} keyword tells coreboot where
 the bridge devices start, relative to the PCI configuration space used
 by the bridge. The following occurences of the \texttt{pci} keyword
-describe the provided devices. 
+describe the provided devices.
 
 Adding the option \texttt{on} or \texttt{off} to a PCI device will
 enable or disable this device. This feature can be used if some bridge
@@ -820,7 +820,7 @@
 
 %
 % 10. Tweaking the source code
-% 
+%
 
 \section{Tweaking the source code}
 Besides configuring the existing code it is sometimes necessary or
@@ -1083,7 +1083,7 @@
 \texttt{coreboot-v2/src/mainboard/<vendor>/<mainboard>/irq\_tables.c} which
 contains the source code definition of the IRQ table. coreboot corrects
 small inconsistencies in the IRQ table during startup (checksum and
-number of entries), but it is not yet writing IRQ tables in a completely 
+number of entries), but it is not yet writing IRQ tables in a completely
 dynamic way.
 
 \textbf{NOTE:} To get Linux to understand and actually use the IRQ
@@ -1125,7 +1125,7 @@
 
 There is initial ACPI support in coreboot now. Currently the only gain with
 this is the ability to use HPET timers in Linux. To achieve this, there is a
-framework that can generate the following tables: 
+framework that can generate the following tables:
 \begin{itemize}
 \item RSDP
 \item RSDT
@@ -1143,7 +1143,7 @@
 
 To keep Linux doing it's pci ressource allocation based on IRQ tables and MP
 tables, you have to specify the kernel parameter \texttt{pci=noacpi} otherwise
-your PCI devices won't get interrupts. 
+your PCI devices won't get interrupts.
 It's likely that more ACPI support will follow, when there is need for certain
 features.
 
@@ -1162,7 +1162,7 @@
 80 POST allows simple debugging without any other output method
 available (serial interface or VGA display)
 \item
-\emph{Serial POST}. 
+\emph{Serial POST}.
 This option allows to push POST messages to the serial interface instead
 of using IO ports. \textbf{NOTE:} The serial interface has to be
 initialized before serial POST can work. To use serial POST, set the
@@ -1244,7 +1244,7 @@
 \end{verbatim}
 
 The C source file \texttt{reset.c} (resulting in \texttt{reset.o}
-during compilation) shall define the following function to take care 
+during compilation) shall define the following function to take care
 of the system reset:
 
 \begin{verbatim}
@@ -1337,7 +1337,7 @@
     [..]
            392      3      e        5    baud_rate
     [..]
-    
+
     # configid value human readable description
       5        0     115200
       5        1      57600
@@ -1347,7 +1347,7 @@
       5        5       4800
       5        6       2400
       5        7       1200
-    
+
 \end{verbatim}
 
 To change CMOS values from a running Linux system, use the
@@ -1388,9 +1388,9 @@
             range 192.168.1.0 192.168.1.31;
             option broadcastaddress 192.168.1.255;
     }
-    
+
     ddnsupdatestyle adhoc;
-    
+
     host hammer12 {
             hardware ethernet 00:04:76:EA:64:31;
             fixedaddress 192.168.1.24;
@@ -1522,11 +1522,11 @@
 %
 
 \section{Image types}
-There used to be one image type for coreboot, as described above. Since this paper was written (2004) there have been many changes. First, the name 
+There used to be one image type for coreboot, as described above. Since this paper was written (2004) there have been many changes. First, the name
 was changed to coreboot, for many reasons. Second, Cache As Ram support (CAR)
-was added for many AMD CPUs, which both simplified and complicated things. Simplification came with the removal of romcc; complication came with the addition of new ways to build. 
+was added for many AMD CPUs, which both simplified and complicated things. Simplification came with the removal of romcc; complication came with the addition of new ways to build.
 
-There are two big additions to the build process and, furthermore, more than two new CONFIG variables to control them. 
+There are two big additions to the build process and, furthermore, more than two new CONFIG variables to control them.
 
 \begin{itemize}
 \item \begin{verbatim}CONFIG_USE_DCACHE_RAM\end{verbatim}
@@ -1544,19 +1544,19 @@
 \end{itemize}
 
 Before going over the new image types, derived from v3, we will quickly review the standard v2 image types. We are hoping this review will
-aid comprehension. 
+aid comprehension.
 
-A coreboot rom file consists of one or more \textit{images}. All images consist of a part that runs in ROM, and a part that runs in RAM. The RAM can be in  compressed form and is decompressed when needed by the ROM code. The main function of the ROM code is to get memory working. Both ROM and RAM consist of a very small amount of assembly code and mostly C code. 
+A coreboot rom file consists of one or more \textit{images}. All images consist of a part that runs in ROM, and a part that runs in RAM. The RAM can be in  compressed form and is decompressed when needed by the ROM code. The main function of the ROM code is to get memory working. Both ROM and RAM consist of a very small amount of assembly code and mostly C code.
 
 \subsection{romcc images (from emulation/qemu)}
-ROMCC images are so-called because C code for the ROM part is compiled with romcc. romcc is an optimizing C compiler which compiles one, and only 
-one file; to get more than one file, one must include the C code via include statements. The main ROM code .c file is usually called auto.c. 
+ROMCC images are so-called because C code for the ROM part is compiled with romcc. romcc is an optimizing C compiler which compiles one, and only
+one file; to get more than one file, one must include the C code via include statements. The main ROM code .c file is usually called auto.c.
 \subsubsection{How it is built}
-Romcc compiles auto.c to produce auto.inc. auto.inc is included in the main crt0.S, which is then preprocessed to produce crt0.s. The inclusion of files into crt0.S is controlled by the CONFIG\_CRT0\_INCLUDES variable. crt0.s is then assembled. 
+Romcc compiles auto.c to produce auto.inc. auto.inc is included in the main crt0.S, which is then preprocessed to produce crt0.s. The inclusion of files into crt0.S is controlled by the CONFIG\_CRT0\_INCLUDES variable. crt0.s is then assembled.
 
-File for the ram part are compiled in a conventional manner. 
+File for the ram part are compiled in a conventional manner.
 
-The final step is linking. The use of named sections is used very heavily in coreboot to control where different bits of code go. The reset vector must go in the top 16 bytes. The start portion of the ROM code must go in the top 64K bytes, since most chipsets only enable this much ROM at startup time. Here is a quick look at a typical image: 
+The final step is linking. The use of named sections is used very heavily in coreboot to control where different bits of code go. The reset vector must go in the top 16 bytes. The start portion of the ROM code must go in the top 64K bytes, since most chipsets only enable this much ROM at startup time. Here is a quick look at a typical image:
 \begin{verbatim}
   [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
   [ 0]                   NULL            00000000 000000 000000 00      0   0  0
@@ -1569,30 +1569,30 @@
   [ 7] .strtab           STRTAB          00000000 007da0 000bfd 00      0   0  1
 \end{verbatim}
 
-The only sections that get loaded into a ROM are the Allocated ones. We can see the .ram, .rom, .reset and .id sections. 
+The only sections that get loaded into a ROM are the Allocated ones. We can see the .ram, .rom, .reset and .id sections.
 \subsubsection{layout}
-As we mentioned, the ROM file consists of multiple images. In the basic file, there are two full coreboot rom images. The build sequence for each is the same, and in fact the ldscript.ld files are almost identical. The only difference is in a few makefile variables, generated by the config tool. 
+As we mentioned, the ROM file consists of multiple images. In the basic file, there are two full coreboot rom images. The build sequence for each is the same, and in fact the ldscript.ld files are almost identical. The only difference is in a few makefile variables, generated by the config tool.
 
 \begin{itemize}
-\item CONFIG\_PAYLOAD\_SIZE. Each image may have a different payload size. 
-\item CONFIG\_ROMBASE Each image must have a different base in rom. 
-\item CONFIG\_RESET Unclear what this is used for. 
+\item CONFIG\_PAYLOAD\_SIZE. Each image may have a different payload size.
+\item CONFIG\_ROMBASE Each image must have a different base in rom.
+\item CONFIG\_RESET Unclear what this is used for.
 \item CONFIG\_EXCEPTION\_VECTORS where an optional IDT might go.
-\item CONFIG\_USE\_OPTION\_TABLE if set, an option table section will be linked in. 
-\item CONFIG\_ROM\_PAYLOAD\_START This is the soon-to-be-deprecated way of locating a payload. cbfs eliminates this. 
+\item CONFIG\_USE\_OPTION\_TABLE if set, an option table section will be linked in.
+\item CONFIG\_ROM\_PAYLOAD\_START This is the soon-to-be-deprecated way of locating a payload. cbfs eliminates this.
 \item CONFIG\_USE\_FALLBACK\_IMAGE Whether this is a fallback or normal image
-\item CONFIG\_ROM\_SECTION\_SIZE Essentially, the payload size. Soon to be deprecated. 
+\item CONFIG\_ROM\_SECTION\_SIZE Essentially, the payload size. Soon to be deprecated.
 \item CONFIG\_ROM\_IMAGE\_SIZE Size of this image (i.e. fallback or normal image)
 \item CONFIG\_ROM\_SIZE Total size of the ROM
-\item CONFIG\_XIP\_RAM\_BASE The start of eXecute In Place code. XIP allows for not copying code to ram, but just running it from ROM. 
+\item CONFIG\_XIP\_RAM\_BASE The start of eXecute In Place code. XIP allows for not copying code to ram, but just running it from ROM.
 \end{itemize}
 
-Each image (normal or fallback) is built completely independently and does not get linked to the other. They are assembled into one ROM image by the (soon to be deprecated) buildrom tool, or by the cbfs tool. 
+Each image (normal or fallback) is built completely independently and does not get linked to the other. They are assembled into one ROM image by the (soon to be deprecated) buildrom tool, or by the cbfs tool.
 
 \subsubsection{boot sequence}
-We boot and start at fffffff0. We then jump to the entry point at \_start.  \_start does some machine init and an lgdt and jumps to \_\_protected\_start, at which point we are in protected mode. The code does a bit more machine setup and then starts executing the romcc code. 
+We boot and start at fffffff0. We then jump to the entry point at \_start.  \_start does some machine init and an lgdt and jumps to \_\_protected\_start, at which point we are in protected mode. The code does a bit more machine setup and then starts executing the romcc code.
 
-If fallback has been built in, some setup needs to be done. On some machines, it is extensive. Full rom decoding must be enabled. This may in turn require additional PCI setup to enable decoding to be enabled (!). To decided which image to use, hardware registers (cold boot on the Opteron) or CMOS are checked. Finally, once the image to use has been decided, a jmp is performed, viz: 
+If fallback has been built in, some setup needs to be done. On some machines, it is extensive. Full rom decoding must be enabled. This may in turn require additional PCI setup to enable decoding to be enabled (!). To decided which image to use, hardware registers (cold boot on the Opteron) or CMOS are checked. Finally, once the image to use has been decided, a jmp is performed, viz:
 \begin{verbatim}
         /* This is the primary cpu how should I boot? */
         else if (do_normal_boot()) {
@@ -1616,8 +1616,8 @@
 #endif
         ;
 \end{verbatim}
-How does the fallback image get the symbol for normal entry? Via magic in the ldscript.ld -- remember, the images are not linked to each other. 
-Finally, we can see this in the Config.lb for most mainboards: 
+How does the fallback image get the symbol for normal entry? Via magic in the ldscript.ld -- remember, the images are not linked to each other.
+Finally, we can see this in the Config.lb for most mainboards:
 \begin{verbatim}
 if CONFIG_USE_FALLBACK_IMAGE
         mainboardinit cpu/x86/16bit/reset16.inc
@@ -1627,27 +1627,27 @@
         ldscript /cpu/x86/32bit/reset32.lds
 end
 \end{verbatim}
-What does this mean? the non-fallback image has a 32-bit entry point; fallback has a 16-bit entry point. The reason for this is that some code from fallback always runs, so as to pick fallback or normal; but the normal is always called from 32-bit code. 
+What does this mean? the non-fallback image has a 32-bit entry point; fallback has a 16-bit entry point. The reason for this is that some code from fallback always runs, so as to pick fallback or normal; but the normal is always called from 32-bit code.
 \subsection{car images (from lippert/roadrunner-lx)}
-CAR images in their simplest form are modified romcc images. The file is usually cache\_as\_ram\_auto.c. C inclusion is still used. The main difference is in the build sequence. The compiler command line is a very slight changed: instead of using romcc to generate an auto.inc include file, gcc us used. Then, two perl scripts are used to rename the .text and .data sections to .rom.text and .rom.data respectively. 
+CAR images in their simplest form are modified romcc images. The file is usually cache\_as\_ram\_auto.c. C inclusion is still used. The main difference is in the build sequence. The compiler command line is a very slight changed: instead of using romcc to generate an auto.inc include file, gcc us used. Then, two perl scripts are used to rename the .text and .data sections to .rom.text and .rom.data respectively.
 \subsubsection{How it is built}
-The build is almost identical to the romcc build. Since the auto.inc file exists, it can be included as before. The crt0\_includes.h file has one addition: a file that enables CAR, in this case it is \textit{src/cpu/amd/model\_lx/cache\_as\_ram.inc}. 
+The build is almost identical to the romcc build. Since the auto.inc file exists, it can be included as before. The crt0\_includes.h file has one addition: a file that enables CAR, in this case it is \textit{src/cpu/amd/model\_lx/cache\_as\_ram.inc}.
 \subsubsection{layout}
-No significant change from romcc code. 
+No significant change from romcc code.
 \subsubsection{boot sequence}
-No significant change from romcc code, except that the CAR code has to set up a stack. 
+No significant change from romcc code, except that the CAR code has to set up a stack.
 
 \subsection{car + CONFIG\_USE\_INIT images (new emulation/qemu}
-This type of image makes more use of the C compiler. In this type of image, in fact, 
-seperate compilation is possible but is not always used. Oddly enough, this option is only used in PPC boards. That said, we need to move to this way of building. Including C code is poor style. 
+This type of image makes more use of the C compiler. In this type of image, in fact,
+seperate compilation is possible but is not always used. Oddly enough, this option is only used in PPC boards. That said, we need to move to this way of building. Including C code is poor style.
 \subsubsection{How it is built}
 There is a make variable, INIT-OBJECTS, that for all our other targets is empty. In this type of build, INIT-OBJECTS is a list of C files that are created from the config tool initobject command. Again, with INIT-OBJECTS we can finally stop including .c files and go with seperate compilation.
 \subsubsection{layout}
-No significant change from romcc code. 
+No significant change from romcc code.
 \subsubsection{boot sequence}
-No significant change from romcc code, except that the CAR code has to set up a stack. 
+No significant change from romcc code, except that the CAR code has to set up a stack.
 \subsection{car + CONFIG\_USE\_PRINTK\_IN\_CAR images}
-When CONFIG\_USE\_PRINTK\_IN\_CAR is set, the CAR code can use printk instead of the primitive print functions. This config variable is used in one of two ways. If CONFIG\_USE\_INIT is 0, then different .c files just include other .c files, as in console.c: 
+When CONFIG\_USE\_PRINTK\_IN\_CAR is set, the CAR code can use printk instead of the primitive print functions. This config variable is used in one of two ways. If CONFIG\_USE\_INIT is 0, then different .c files just include other .c files, as in console.c:
 \begin{verbatim}
 #if CONFIG_USE_PRINTK_IN_CAR == 0
 static void __console_tx_byte(unsigned char byte)
@@ -1670,9 +1670,9 @@
 
 #endif /* CONFIG_USE_PRINTK_IN_CAR */
 
-\end{verbatim}\footnote{yuck!} 
+\end{verbatim}\footnote{yuck!}
 
-If CONFIG\_USE\_INIT is 1, then the Config.lb is configured differently: 
+If CONFIG\_USE\_INIT is 1, then the Config.lb is configured differently:
 \begin{verbatim}
 if CONFIG_USE_INIT
         if CONFIG_USE_PRINTK_IN_CAR
@@ -1680,14 +1680,14 @@
         end
 end
 
-\end{verbatim}\footnote{see previous footnote} 
+\end{verbatim}\footnote{see previous footnote}
 
 \subsubsection{layout}
-No significant change from romcc code. 
+No significant change from romcc code.
 \subsubsection{boot sequence}
-No significant change from romcc code, except that the CAR code has to set up a stack. 
+No significant change from romcc code, except that the CAR code has to set up a stack.
 \subsection{failover}
-Failover is the newest way to lay out a ROM. The choice of which image to run is removed from the fallback image and moved into a small, standalone piece of code. The code is simple enough to show here: 
+Failover is the newest way to lay out a ROM. The choice of which image to run is removed from the fallback image and moved into a small, standalone piece of code. The code is simple enough to show here:
 \begin{verbatim}
 static unsigned long main(unsigned long bist)
 {
@@ -1707,7 +1707,7 @@
 }
 
 \end{verbatim}
-Some motherboards have a more complex bus structure (e.g. Opteron). In those cases, the failover can be more complex, as it requires some hardware initialization to work correctly. As of this writing (April 2009), these boards have their own failover: 
+Some motherboards have a more complex bus structure (e.g. Opteron). In those cases, the failover can be more complex, as it requires some hardware initialization to work correctly. As of this writing (April 2009), these boards have their own failover:
 \begin{quote}
 ./src/mainboard/iei/nova4899r/failover.c
 ./src/mainboard/emulation/qemu-x86/failover.c
@@ -1723,7 +1723,7 @@
 ./src/mainboard/olpc/rev\_a/failover.c
 ./src/mainboard/via/epia-m/failover.c
 \end{quote}
-Here is one of the more complicated ones: 
+Here is one of the more complicated ones:
 \begin{verbatim}
 static unsigned long main(unsigned long bist)
 {
@@ -1760,15 +1760,15 @@
 }
 
 \end{verbatim}
-They're not that different, in fact. So why are there different copies all over the tree? Simple: code inclusion. Most of the failover.c are different because they include different bits of code. Here is a key reason for killing C code inclusion in the tree. 
+They're not that different, in fact. So why are there different copies all over the tree? Simple: code inclusion. Most of the failover.c are different because they include different bits of code. Here is a key reason for killing C code inclusion in the tree.
 \subsubsection{How it is built}
-There two additional config variables: 
+There two additional config variables:
 \begin{itemize}
-\item HAVE\_FAILOVER\_IMAGE Has to be defined when certain files are included. 
+\item HAVE\_FAILOVER\_IMAGE Has to be defined when certain files are included.
 \item USE\_FAILOVER\_IMAGE Enables the use of the failover image
 \end{itemize}
-Confusingly enough, almost all the uses of these two variables are either nested or both required to be set, e.g. 
-The fallback and normal builds are the same. The target config has a new clause that looks like this: 
+Confusingly enough, almost all the uses of these two variables are either nested or both required to be set, e.g.
+The fallback and normal builds are the same. The target config has a new clause that looks like this:
 \begin{verbatim}
 romimage "failover"
         option CONFIG_USE_FAILOVER_IMAGE=1
@@ -1778,36 +1778,36 @@
         option COREBOOT_EXTRA_VERSION="\$(shell cat ../../VERSION)\_Failover"
 end
 \end{verbatim}
-This new section uses some constructs not yet discussed in detail. XIP\_ROM\_SIZE just refers to the 
-fact that the failover code is eXecute In Place, i.e. not copied to RAM. Of course, the ROM part of normal/fallback is as well, so the usage of XIP here is somewhat confusing. Finally, the USE\_FAILOVER\_IMAGE variable is set, which changes code compilation in a few places. If we just consider non-mainbard files, there are: 
+This new section uses some constructs not yet discussed in detail. XIP\_ROM\_SIZE just refers to the
+fact that the failover code is eXecute In Place, i.e. not copied to RAM. Of course, the ROM part of normal/fallback is as well, so the usage of XIP here is somewhat confusing. Finally, the USE\_FAILOVER\_IMAGE variable is set, which changes code compilation in a few places. If we just consider non-mainbard files, there are:
 \begin{verbatim}
 src/cpu/amd/car/cache_as_ram.inc
 src/arch/i386/Config.lb
 \end{verbatim}
 For the cache\_as\_ram.inc file, the changes relate to the fact that failover code sets up CAR, so that fallback code need not.
 
-For the Config.lb, several aspects of build change. 
-When USE\_FAILOVER\_IMAGE, entry into both normal and fallback bios images is via a 32-bit entry point (when not defined, entry into fallback is a 16-entry point at the power-on reset vector). 
+For the Config.lb, several aspects of build change.
+When USE\_FAILOVER\_IMAGE, entry into both normal and fallback bios images is via a 32-bit entry point (when not defined, entry into fallback is a 16-entry point at the power-on reset vector).
 \subsubsection{layout}
-Failover.c becomes the new bootblock at the top of memory. It calls either normal or fallback. The address of normal and fallback is determined by ldscript magic. 
+Failover.c becomes the new bootblock at the top of memory. It calls either normal or fallback. The address of normal and fallback is determined by ldscript magic.
 \subsubsection{boot sequence}
-failover.c tests a few variables and the calls the normal or fallback payload depending on those variables; usually they are CMOS settings. 
+failover.c tests a few variables and the calls the normal or fallback payload depending on those variables; usually they are CMOS settings.
 \subsection{Proposed new image forat}
-The new image format will use seperate compilation -- no C code included! -- on all files. 
+The new image format will use seperate compilation -- no C code included! -- on all files.
 
-The new design has a few key goals: 
+The new design has a few key goals:
 \begin{itemize}
-\item Always use a bootblock (currently called failover). 
-The name failover.c, being utterly obscure, will not be used; instead, we will name the file bootblock.c. Instead of having a different copy for each mainboard, we can have just one copy. 
+\item Always use a bootblock (currently called failover).
+The name failover.c, being utterly obscure, will not be used; instead, we will name the file bootblock.c. Instead of having a different copy for each mainboard, we can have just one copy.
 \item Always use seperate compilation
 \item Always use printk etc. in the ROM code
-\item (longer term) from the bootblock, always use cbfs to locate the normal/fallback etc. code. This code will be XIP. 
+\item (longer term) from the bootblock, always use cbfs to locate the normal/fallback etc. code. This code will be XIP.
 \end{itemize}
 
 \subsubsection{How it is built}
-For now, since we are still using the config tool, we'll need a new command: bootblockobject, which creates a list of files to be included in the bootblock.   Not a lot else will have to change. We are going to move to using the v3 CAR code assembly code (one or two files at most, instead of many) and, instead of the thicket of little ldscript files, one ldscript file. This strategy is subject to modification as events dictate. 
+For now, since we are still using the config tool, we'll need a new command: bootblockobject, which creates a list of files to be included in the bootblock.   Not a lot else will have to change. We are going to move to using the v3 CAR code assembly code (one or two files at most, instead of many) and, instead of the thicket of little ldscript files, one ldscript file. This strategy is subject to modification as events dictate.
 \subsubsection{layout}
-Almost the same, for now, as the current failover code. 
+Almost the same, for now, as the current failover code.
 \subsubsection{boot sequence}
 %
 % 14 Glossary
@@ -1839,11 +1839,11 @@
 \subsection{Additional Papers on coreboot}
 
 \begin{itemize}
- \item 
+ \item
  \textit{\url{http://www.coreboot.org/Documentation}}
- \item 
+ \item
  \textit{\url{http://www.lysator.liu.se/upplysning/fa/linuxbios.pdf}}
- \item 
+ \item
  \textit{\url{http://portal.acm.org/citation.cfm?id=512627}}
 \end{itemize}
 

Modified: trunk/documentation/Makefile
==============================================================================
--- trunk/documentation/Makefile	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/documentation/Makefile	Tue Apr 27 08:56:47 2010	(r5507)
@@ -31,7 +31,7 @@
 	convert $< $@
 endif
 
-LinuxBIOS-AMD64.toc: $(FIGS) LinuxBIOS-AMD64.tex 
+LinuxBIOS-AMD64.toc: $(FIGS) LinuxBIOS-AMD64.tex
 	# 2 times to make sure we have a current toc.
 	$(PDFLATEX) LinuxBIOS-AMD64.tex
 	$(PDFLATEX) LinuxBIOS-AMD64.tex

Modified: trunk/documentation/RFC/chip.tex
==============================================================================
--- trunk/documentation/RFC/chip.tex	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/documentation/RFC/chip.tex	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,17 +2,17 @@
 
 \begin{abstract}
 At the end of this document is the original message that motivated the
-change. 
+change.
 \end{abstract}
 
 \section{Scope}
 This document defines how LinuxBIOS programmers can specify chips that
-are used, specified, and initalized. The current scope is for superio 
-chips, but the architecture should allow for specification of other chips such 
-as southbridges. Multiple chips of same or different type are supported. 
+are used, specified, and initalized. The current scope is for superio
+chips, but the architecture should allow for specification of other chips such
+as southbridges. Multiple chips of same or different type are supported.
 
 \section{Goals}
-The goals of the new chip architecture are these: 
+The goals of the new chip architecture are these:
 \begin{itemize}
 \item seperate implementation details from specification in the Config file
 (translation: no more C code in Config files)
@@ -27,33 +27,33 @@
 \begin{verbatim}
 chip <name> [path=<path>] ["<configuration>"]
 \end{verbatim}
-The name is in the standard LinuxBIOS form of type/vendor/name, e.g. 
-"southbridge/intel/piix4e" or "superio/ite/it8671f". The class of the 
-chip is derived from the first pathname component of the name, and the chip 
-configuration is derived from the following components. 
+The name is in the standard LinuxBIOS form of type/vendor/name, e.g.
+"southbridge/intel/piix4e" or "superio/ite/it8671f". The class of the
+chip is derived from the first pathname component of the name, and the chip
+configuration is derived from the following components.
 
-The path defines the access mechanism to the chip. 
-It is optional. If present, it overrides the default path to the chip. 
+The path defines the access mechanism to the chip.
+It is optional. If present, it overrides the default path to the chip.
 
 The configuration defines chip-specific configuration details, and is also
-optional. Note that an empty configuration will leave the chip with 
-no enabled resources. This may be desirable in some cases. 
+optional. Note that an empty configuration will leave the chip with
+no enabled resources. This may be desirable in some cases.
 
 \section{Results of specifying a chip}
 
 When one or more chips are specified, the data about the chips
 is saved until the entire file is parsed. At this point, the config tool
 creates a file in the build directory called chip.c This file contains
-a common struct containing information about 
-each individual chip and an array of pointers to these structures. 
+a common struct containing information about
+each individual chip and an array of pointers to these structures.
 
-For each chip, there are two structures. The structures contain control 
-information for the chip, and register initialization information. The 
-names of the structures are derived by ``flattening'' the chip name, 
-as in the current linuxbios. For example, superio/ite/xyz uses 
+For each chip, there are two structures. The structures contain control
+information for the chip, and register initialization information. The
+names of the structures are derived by ``flattening'' the chip name,
+as in the current linuxbios. For example, superio/ite/xyz uses
 two structs, one called superio_ite_xyz_control and one called
-superio_ite_xyz_init. The control struct is initialized from the 
-chip name and path information, and has a pointer to the 
+superio_ite_xyz_init. The control struct is initialized from the
+chip name and path information, and has a pointer to the
 config struct. The config struct is initialized from the quote string
 
 \begin{verbatim}
@@ -64,29 +64,29 @@
 Subject: RFC:new superio proposal
 
 Abstract:
-	The superio architecture for linuxbios has worked for the last 2 
-years but is being stretched to the limit by the changes in superio chips. 
-The architecture depended on superio resources being relatively constant 
-between chips, but this assumption no longer holds. In this document we 
-propose several alternatives and solicit comments. 
+	The superio architecture for linuxbios has worked for the last 2
+years but is being stretched to the limit by the changes in superio chips.
+The architecture depended on superio resources being relatively constant
+between chips, but this assumption no longer holds. In this document we
+propose several alternatives and solicit comments.
 
 Overview:
-The superio architecture in linuxbios was developed over time, and 
-modified as circumstances required. In the beginning it was relatively 
-simple and assumed only one superio per mainboard. The latest version 
+The superio architecture in linuxbios was developed over time, and
+modified as circumstances required. In the beginning it was relatively
+simple and assumed only one superio per mainboard. The latest version
 allows an arbitrary number of superios per mainboard, and allows complete
 specification of the superio base I/O address along with the specification
-of reasonable default valures for both the base I/O address and the 
-superio parameters such as serial enable, baud rate, and so on. 
+of reasonable default valures for both the base I/O address and the
+superio parameters such as serial enable, baud rate, and so on.
 
-Specification of superio control parameters is done by a configuration 
+Specification of superio control parameters is done by a configuration
 line such as:
 
 nsuperio sis/950 com1={1} floppy=1  lpt=1
 
-This fragment sets the superio type to sis/950; sets com1, floppy, and lpt 
-to enabled; and leaves the defaults to com1 (baud rate, etc.) to the 
-default values. 
+This fragment sets the superio type to sis/950; sets com1, floppy, and lpt
+to enabled; and leaves the defaults to com1 (baud rate, etc.) to the
+default values.
 
 While it is not obvious, these configuration parameters are fragments of a
 C initializer. The initializers are used to build a statically initialized
@@ -96,7 +96,7 @@
         struct superio_control *super; // the ops for the device.
         unsigned int port; // if non-zero, overrides the default port
         // com ports. This is not done as an array (yet).
-        // We think it's easier to set up from python if it is not an 
+        // We think it's easier to set up from python if it is not an
 	// array.
         struct com_ports com1, com2, com3, com4;
         // DMA, if it exists.
@@ -114,14 +114,14 @@
 
 These structures are, in turn, created and statically initialized by a
 config-tool-generated structure that defines all the superios. This file
-is called nsuperio.c, is created for each mainboard you build, only 
+is called nsuperio.c, is created for each mainboard you build, only
 appears in the build directory, and looks like this:
 
 ===
-extern struct superio_control superio_winbond_w83627hf_control; 
+extern struct superio_control superio_winbond_w83627hf_control;
 
-struct superio superio_winbond_w83627hf= { 
-  &superio_winbond_w83627hf_control, 
+struct superio superio_winbond_w83627hf= {
+  &superio_winbond_w83627hf_control,
   .com1={1}, .com2={1}, .floppy=1, .lpt=1, .keyboard=1, .hwmonitor=1};
 
 struct superio *all_superio[] = {&superio_winbond_w83627hf,
@@ -131,12 +131,12 @@
 ===
 
 This example shows a board with one superio (nsuperio). The superio
-consists of a winbond w83627hf, with com1, com2, floppy, lpt, keyboard, 
-and hwmonitor enabled. Note that this structure also allows for 
-over-riding the default superio base, although that capability is rarely 
-used. 
+consists of a winbond w83627hf, with com1, com2, floppy, lpt, keyboard,
+and hwmonitor enabled. Note that this structure also allows for
+over-riding the default superio base, although that capability is rarely
+used.
 
-The control structure is used to define how to access the superio for 
+The control structure is used to define how to access the superio for
 purposes of control. It looks like this:
 ===
 struct superio_control {
@@ -151,13 +151,13 @@
 };
 ===
 
-There are three methods for stages of hardwaremain. First is pre_pci_init 
-(for chips like the acer southbridge that require you to enable some 
-resources BEFORE pci scan); init, called during the 'middle' phase of 
-hardwaremain; and finishup, called before the payload is loaded. 
+There are three methods for stages of hardwaremain. First is pre_pci_init
+(for chips like the acer southbridge that require you to enable some
+resources BEFORE pci scan); init, called during the 'middle' phase of
+hardwaremain; and finishup, called before the payload is loaded.
 
-This approach was inspired by and borrows heavily on the Plan 9 kernel 
-configuration tools. 
+This approach was inspired by and borrows heavily on the Plan 9 kernel
+configuration tools.
 
 The problem:
 
@@ -166,22 +166,22 @@
 possibly superio chips. Obviously, in the long term, this is not
 practical: we can not anticipate all possible superio chips for all time.
 
-The common PC BIOS solution to this type of problem is to continue with 
-binary structures but add version numbers to them, so that all code that 
-uses a given structure has to check the version number. Personally, I find 
-this grotesque and would rather not work this way. 
-
-Using textual strings for configuration is something I find far more 
-attractive. Plan 9 has shown that this approach has no real limits and 
-suffices for configuration tasks. The Linux kernel does more limited use 
-of strings for configuration, but still depends on them. Strings are 
-easier to read and work with than binary structures, and more important, a 
-lot easier to deal with when things start going wrong. 
+The common PC BIOS solution to this type of problem is to continue with
+binary structures but add version numbers to them, so that all code that
+uses a given structure has to check the version number. Personally, I find
+this grotesque and would rather not work this way.
+
+Using textual strings for configuration is something I find far more
+attractive. Plan 9 has shown that this approach has no real limits and
+suffices for configuration tasks. The Linux kernel does more limited use
+of strings for configuration, but still depends on them. Strings are
+easier to read and work with than binary structures, and more important, a
+lot easier to deal with when things start going wrong.
 
 The proposed solution:
 
-What follows are three possible ideas for specifying superio resources and 
-their settings. 
+What follows are three possible ideas for specifying superio resources and
+their settings.
 
 A common part of the new idea is to eliminate the common superio
 structure, due to the many variations in chips, and make it invisible
@@ -203,9 +203,9 @@
   char *name;
 };
 
-I.e. we add a new function for creating the superio. 
+I.e. we add a new function for creating the superio.
 
-Communication of superio settings from linuxbios to the superio would be 
+Communication of superio settings from linuxbios to the superio would be
 via textual strings. The superio structure becomes this:
 
 struct superio {
@@ -215,7 +215,7 @@
 };
 
 
-So now the question becomes, what is the configuration structure? 
+So now the question becomes, what is the configuration structure?
 There are several choices. The simplest, from my point of view, are
 keyword-value pairs:
 struct configuration {
@@ -223,11 +223,11 @@
 	const char *value;
 };
 
-These get filled in by the config tool as before. The linuxbios libary can 
-then provide a generic parsing function for the superios to use. 
+These get filled in by the config tool as before. The linuxbios libary can
+then provide a generic parsing function for the superios to use.
 
-The remaining question is how should the superio command look in 
-freebios2? 
+The remaining question is how should the superio command look in
+freebios2?
 
 superio sis/950 "com1=115200,8n1 lpt=1 com2=9600"
 
@@ -242,22 +242,22 @@
 So,  my questions:
 
 1. Does this new scheme look workable. If not, what needs to change?
-2. What should the 'struct configuration' be? does keyword/value work? 
-3. what should the superio command look like? 
+2. What should the 'struct configuration' be? does keyword/value work?
+3. what should the superio command look like?
 
 Comments welcome.
 
-I'd like to adopt this "RFC" approach for freebios2 as much as we can.  
+I'd like to adopt this "RFC" approach for freebios2 as much as we can.
 There was a lot of give-and-take in the early days of linuxbios about
 structure and it proved useful. There's a lot that will start happening in
 freebios2 now, and we need to try to make sure it will work for everyone.
 
 Those of you who are doing mainboards, please look at freebios2 and see
 how it looks for you. There's a lot of good work that has been done (not
-by me so far, thanks Eric and Stefan), and more that needs to be done. 
-Consider trying out romcc as an "assembly code killer". See how it fits 
-together and if you can work with it or need changes. Bring comments back 
-to this list. 
+by me so far, thanks Eric and Stefan), and more that needs to be done.
+Consider trying out romcc as an "assembly code killer". See how it fits
+together and if you can work with it or need changes. Bring comments back
+to this list.
 
 thanks
 

Modified: trunk/documentation/RFC/config.tex
==============================================================================
--- trunk/documentation/RFC/config.tex	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/documentation/RFC/config.tex	Tue Apr 27 08:56:47 2010	(r5507)
@@ -8,7 +8,7 @@
 This document defines the new configuration language for LinuxBIOS.
 
 \section{Goals}
-The goals of the new language are these: 
+The goals of the new language are these:
 \begin{itemize}
 \item Simplified Makefiles so people can see what is set
 \item Move from the regular-expression-based language to something
@@ -16,22 +16,22 @@
 \item make the specification easier for people to use and understand
 \item allow unique register-set-specifiers for each chip
 \item allow generic register-set-specifiers for each chip
-\item generate static initialization code, as needed, for the 
-specifiers. 
+\item generate static initialization code, as needed, for the
+specifiers.
 \end{itemize}
 
 \section{Language}
 Here is the new language. It is very similar to the old one, differing
-in only a few respects. It borrows heavily from Greg Watson's suggestions. 
+in only a few respects. It borrows heavily from Greg Watson's suggestions.
 
-I am presenting it in a pseudo-BNF in the hopes it will be easier. Things 
-in '' are keywords; things in ``'' are strings in the actual text. 
+I am presenting it in a pseudo-BNF in the hopes it will be easier. Things
+in '' are keywords; things in ``'' are strings in the actual text.
 \begin{verbatim}
 #exprs are composed of factor or factor + factor etc.
 expr ::= factor ( ``+'' factor | ``-'' factor | )*
 #factors are term or term * term or term / term or ...
 factor ::=  term ( ``*'' term | ``/'' term | ... )*
-# 
+#
 unary-op ::= ``!'' ID
 # term is a number, hexnumber, ID, unary-op, or a full-blown expression
 term ::= NUM | XNUM | ID | unary-op | ``(`` expr ``)''
@@ -39,27 +39,27 @@
 # Option command. Can be an expression or quote-string.
 # Options are used in the config tool itself (in expressions and 'if')
 # and are also passed to the C compiler when building linuxbios.
-# It is an error to have two option commands in a file. 
+# It is an error to have two option commands in a file.
 # It is an error to have an option command after the ID has been used
 #   in an expression (i.e. 'set after used' is an error)
 option ::= 'option' ID '=' (``value'' | term)
 
 # Default command. The ID is set to this value if no option command
-# is scanned. 
-# Multiple defaults for an ID will produce warning, but not errors. 
+# is scanned.
+# Multiple defaults for an ID will produce warning, but not errors.
 # It is OK to scan a default command after use of an ID.
 # Options always over-ride defaults.
 default ::= 'default' ID '=' (``value'' | term)
 
 # the mainboard, southbridge, northbridge commands
 # cause sourcing of Config.lb files as in the old config tool
-# as parts are sourced, a device tree is built. The structure 
+# as parts are sourced, a device tree is built. The structure
 # of the tree is determined by the structure of the components
 # as they are specified. To attach a superio to a southbridge, for
 # example, one would do this:
-# southbridge acer/5432 
-#   superio nsc/123 
-#   end 
+# southbridge acer/5432
+#   superio nsc/123
+#   end
 # end
 # the tool generates static initializers for this hierarchy.
 
@@ -79,17 +79,17 @@
 mainboard ::= 'mainboard' PATH (statements)* 'end'
 
 # standard linuxbios commands
-southbridge ::= 'southbridge' PATH (statemnts)* 'end'			
-northbridge ::= 'northbridge' PATH (statemnts)* 'end'			
-superio ::= 'superio PATH (statemnts)* 'end'			
-cpu ::= 'cpu' PATH (statemnts)* 'end'			
-arch ::= 'arch' PATH (statemnts)* 'end'			
+southbridge ::= 'southbridge' PATH (statemnts)* 'end'
+northbridge ::= 'northbridge' PATH (statemnts)* 'end'
+superio ::= 'superio PATH (statemnts)* 'end'
+cpu ::= 'cpu' PATH (statemnts)* 'end'
+arch ::= 'arch' PATH (statemnts)* 'end'
 
 # files for building linuxbios
-# include a file in crt0.S 
-mainboardinit ::= 'mainboardinit' PATH 
+# include a file in crt0.S
+mainboardinit ::= 'mainboardinit' PATH
 
-# object file 
+# object file
 object ::= 'object' PATH
 # driver objects are just built into the image in a different way
 driver ::= 'driver' PATH
@@ -116,7 +116,7 @@
 addaction ::= 'addaction' PATH ``ACTION''
 
 # statements
-statement ::= 
+statement ::=
 		  option
 		| default
         	| cpu
@@ -204,12 +204,12 @@
 ###
 ### Build our reset vector (This is where linuxBIOS is entered)
 ###
-if CONFIG_USE_FALLBACK_IMAGE 
-	mainboardinit cpu/i386/reset16.inc 
-	ldscript cpu/i386/reset16.lds 
+if CONFIG_USE_FALLBACK_IMAGE
+	mainboardinit cpu/i386/reset16.inc
+	ldscript cpu/i386/reset16.lds
 else
-	mainboardinit cpu/i386/reset32.inc 
-	ldscript cpu/i386/reset32.lds 
+	mainboardinit cpu/i386/reset32.inc
+	ldscript cpu/i386/reset32.lds
 end
 .
 .
@@ -227,7 +227,7 @@
 mainboardinit ./auto.inc
 #
 ###
-### Include the secondary Configuration files 
+### Include the secondary Configuration files
 ###
 northbridge amd/amdk8
 end
@@ -286,6 +286,6 @@
 
 \end{verbatim}
 
-In other words, instead of expressions, we see the values. It's easier to 
-deal with. 
+In other words, instead of expressions, we see the values. It's easier to
+deal with.
 

Modified: trunk/documentation/cbfs.txt
==============================================================================
--- trunk/documentation/cbfs.txt	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/documentation/cbfs.txt	Tue Apr 27 08:56:47 2010	(r5507)
@@ -4,71 +4,71 @@
 From: Jordan Crouse <jordan at cosmicpenguin.net>
 
 
-Greetings.  I apologize for the incompleteness of what I am about to 
-discuss.  I was planning on working on it leisurely, but my employment 
-circumstances changed and I've been trying to get it completed in a 
+Greetings.  I apologize for the incompleteness of what I am about to
+discuss.  I was planning on working on it leisurely, but my employment
+circumstances changed and I've been trying to get it completed in a
 hurry before I had to leave it behind.
 
-I've been thinking a lot about LAR lately, and ways to make it more 
-extensible and robust.  Marc and I have been trading ideas back and 
-forth for a number of months, and over time a clear idea of what I 
+I've been thinking a lot about LAR lately, and ways to make it more
+extensible and robust.  Marc and I have been trading ideas back and
+forth for a number of months, and over time a clear idea of what I
 wanted to do started to take shape.
 
-My goal was to add small things to LAR while retaining the overall 
-scheme.  Over time, the scheme evolved slightly, but I think you'll find 
-that it remains true to the original idea.  Below is the beginnings of 
-an architecture document - I did it in text form, but if met with 
-aclaim, it should be wikified.  This presents what I call CBFS - the 
-next generation LAR for next generation Coreboot.  Its easier to 
+My goal was to add small things to LAR while retaining the overall
+scheme.  Over time, the scheme evolved slightly, but I think you'll find
+that it remains true to the original idea.  Below is the beginnings of
+an architecture document - I did it in text form, but if met with
+aclaim, it should be wikified.  This presents what I call CBFS - the
+next generation LAR for next generation Coreboot.  Its easier to
 describe what it is by describing what changed:
 
-A header has been added somewhere in the bootblock similar to Carl 
-Daniel's scheme.  In addition to the coreboot information, the header 
-reports the size of the ROM, the alignment of the blocks, and the offset 
-of the first component in the CBFS.   The master header provides all 
+A header has been added somewhere in the bootblock similar to Carl
+Daniel's scheme.  In addition to the coreboot information, the header
+reports the size of the ROM, the alignment of the blocks, and the offset
+of the first component in the CBFS.   The master header provides all
 the information LAR needs plus the magic number information flashrom needs.
 
-Each "file" (or component, as I style them) now has a type associated 
-with it. The type is used by coreboot to identify the type of file that 
-it is loading, and it can also be used by payloads to group items in the 
+Each "file" (or component, as I style them) now has a type associated
+with it. The type is used by coreboot to identify the type of file that
+it is loading, and it can also be used by payloads to group items in the
 CBFS by type (i.e - bayou can ask for all components that are payloads).
 
-The header on each "file" (or component, as I like to style them) has 
-been simplified - We now only store the length, the type, the checksum, 
-and the offset to the data.  The name scheme remains the same.  The 
-addtional information, which is component specific, has been moved to 
+The header on each "file" (or component, as I like to style them) has
+been simplified - We now only store the length, the type, the checksum,
+and the offset to the data.  The name scheme remains the same.  The
+addtional information, which is component specific, has been moved to
 the component itself (see below).
 
-The components are arranged in the ROM aligned along the specified 
+The components are arranged in the ROM aligned along the specified
 alignment from the master header - this is to facilitate partial re-write.
 
 Other then that, the LAR ideas remain pretty much the same.
 
-The plan for moving the metadata to the components is to allow many 
-different kinds of components, not all of which are groked by coreboot. 
-  However, there are three essential component types that are groked by 
+The plan for moving the metadata to the components is to allow many
+different kinds of components, not all of which are groked by coreboot.
+  However, there are three essential component types that are groked by
 coreboot, and they are defined:
 
-stage - the stage is being parsed from the original ELF, and stored in 
-the ROM as a single blob of binary data.  The load address, start 
+stage - the stage is being parsed from the original ELF, and stored in
+the ROM as a single blob of binary data.  The load address, start
 address, compression type and length are stored in the component sub-header.
 
-payload - this is essentially SELF in different clothing - same idea as 
+payload - this is essentially SELF in different clothing - same idea as
 SELF, with the sub-header as above.
 
-optionrom - This is in flux - right now, the optionrom is stored 
+optionrom - This is in flux - right now, the optionrom is stored
 unadulterated and uncompressed, but that is likely to be changed.
 
-Following this email are two replies containing the v3 code and a new 
-ROM tool to implement this respectively.  I told you that I was trying 
-to get this out before I disappear, and I'm not kidding - the code is 
-compile tested and not run-tested.  I hope that somebody will embrace 
-this code and take it the rest of the way, otherwise it will die a 
+Following this email are two replies containing the v3 code and a new
+ROM tool to implement this respectively.  I told you that I was trying
+to get this out before I disappear, and I'm not kidding - the code is
+compile tested and not run-tested.  I hope that somebody will embrace
+this code and take it the rest of the way, otherwise it will die a
 pretty short death.
 
-I realize that this will start an awesome flamewar, and I'm looking 
-forward to it.  Thanks for listening to me over the years - and good 
-luck with coreboot.  When you all make a million dollars, send me a few 
+I realize that this will start an awesome flamewar, and I'm looking
+forward to it.  Thanks for listening to me over the years - and good
+luck with coreboot.  When you all make a million dollars, send me a few
 bucks, will you?
 
 Jordan
@@ -152,7 +152,7 @@
 
 The meaning of each member is as follows:
 
-'magic' is a 32 bit number that identifies the ROM as a CBFS type.  The 
+'magic' is a 32 bit number that identifies the ROM as a CBFS type.  The
 magic
 number is 0x4F524243, which is 'ORBC' in ASCII.
 
@@ -160,7 +160,7 @@
 0xFFFFFFFF to locate the beginning of the ROM in memory.
 
 'align' is the number of bytes that each component is aligned to within the
-ROM.  This is used to make sure that each component is aligned correctly 
+ROM.  This is used to make sure that each component is aligned correctly
 with
 regards to the erase block sizes on the ROM - allowing one to replace a
 component at runtime without disturbing the others.
@@ -170,7 +170,7 @@
 of the ROM for things like embedded controller firmware.
 
 = Bootblock =
-The bootblock is a mandatory component in the ROM.  It is located in the 
+The bootblock is a mandatory component in the ROM.  It is located in the
 last
 20k of the ROM space, and contains, among other things, the location of the
 master header and the entry point for the loader firmware.  The bootblock
@@ -179,11 +179,11 @@
 = Components =
 
 CBFS components are placed in the ROM starting at 'offset' specified in
-the master header and ending at the bootblock.  Thus the total size 
+the master header and ending at the bootblock.  Thus the total size
 available
 for components in the ROM is (ROM size - 20k - 'offset').  Each CBFS
 component is to be aligned according to the 'align' value in the header.
-Thus, if a component of size 1052 is located at offset 0 with an 'align' 
+Thus, if a component of size 1052 is located at offset 0 with an 'align'
 value
 of 1024, the next component will be located at offset 2048.
 
@@ -214,12 +214,12 @@
 'checksum' is a 32bit checksum of the entire component, including the
 header and name.
 
-'offset' is the start of the component data, based off the start of the 
+'offset' is the start of the component data, based off the start of the
 header.
 The difference between the size of the header and offset is the size of the
 component name.
 
-Immediately following the header will be the name of the component, 
+Immediately following the header will be the name of the component,
 which will
 null terminated and 16 byte aligned.   The following picture shows the
 structure of the header:
@@ -248,7 +248,7 @@
 Upon recognizing a component, the software then has to search for the
 specific name of the component.  This is accomplished by comparing the
 desired name with the string on the component located at
-offset + sizeof(struct cbfs_file).  If the string matches, then the 
+offset + sizeof(struct cbfs_file).  If the string matches, then the
 component
 has been located, otherwise the software should add 'offset' + 'len' to
 the offset and resume the search for the magic value.

Modified: trunk/documentation/codeflow.svg
==============================================================================
--- trunk/documentation/codeflow.svg	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/documentation/codeflow.svg	Tue Apr 27 08:56:47 2010	(r5507)
@@ -97,7 +97,7 @@
 					<g>
 						<g>
 							<g>
-								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,31.246 130.359,46.62 132.854,44.7 
+								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,31.246 130.359,46.62 132.854,44.7
 									132.027,51.206 131.201,57.711 124.701,56.845 118.201,55.98 120.608,54.127 110.178,33.439 								"/>
 							</g>
 							<polygon fill="#231F20" points="131.101,57.636 132.228,59.101 133.828,45.178 133.062,44.181 							"/>
@@ -117,7 +117,7 @@
 					<g>
 						<g>
 							<g>
-								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,81.246 130.359,96.62 132.854,94.7 
+								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,81.246 130.359,96.62 132.854,94.7
 									132.027,101.206 131.201,107.711 124.701,106.845 118.201,105.98 120.608,104.127 110.178,83.439 								"/>
 							</g>
 							<polygon fill="#231F20" points="131.101,107.636 132.228,109.101 133.828,95.178 133.062,94.181 							"/>
@@ -137,7 +137,7 @@
 					<g>
 						<g>
 							<g>
-								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,151.586 130.359,166.961 132.854,165.041 
+								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,151.586 130.359,166.961 132.854,165.041
 									132.027,171.546 131.201,178.052 124.701,177.186 118.201,176.321 120.608,174.468 110.178,153.78 								"/>
 							</g>
 							<polygon fill="#231F20" points="131.101,177.977 132.228,179.442 133.828,165.519 133.062,164.522 							"/>
@@ -157,7 +157,7 @@
 					<g>
 						<g>
 							<g>
-								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,227.013 130.359,242.387 132.854,240.467 
+								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,227.013 130.359,242.387 132.854,240.467
 									132.027,246.973 131.201,253.478 124.701,252.612 118.201,251.747 120.608,249.894 110.178,229.207 								"/>
 							</g>
 							<polygon fill="#231F20" points="131.101,253.403 132.228,254.868 133.828,240.945 133.062,239.948 							"/>
@@ -177,7 +177,7 @@
 					<g>
 						<g>
 							<g>
-								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,303.013 130.359,318.388 132.854,316.468 
+								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,303.013 130.359,318.388 132.854,316.468
 									132.027,322.973 131.201,329.479 124.701,328.612 118.201,327.747 120.607,325.895 110.178,305.207 								"/>
 							</g>
 							<polygon fill="#231F20" points="131.101,329.404 132.228,330.868 133.829,316.945 133.062,315.948 							"/>
@@ -197,7 +197,7 @@
 					<g>
 						<g>
 							<g>
-								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,395.872 130.359,411.247 132.854,409.327 
+								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,395.872 130.359,411.247 132.854,409.327
 									132.027,415.833 131.201,422.338 124.701,421.473 118.201,420.606 120.608,418.754 110.178,398.066 								"/>
 							</g>
 							<polygon fill="#231F20" points="131.101,422.264 132.228,423.728 133.828,409.805 133.062,408.808 							"/>
@@ -217,7 +217,7 @@
 					<g>
 						<g>
 							<g>
-								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,452.152 130.359,467.528 132.854,465.608 
+								<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,452.152 130.359,467.528 132.854,465.608
 									132.027,472.113 131.201,478.619 124.701,477.753 118.201,476.888 120.607,475.035 110.178,454.347 								"/>
 							</g>
 							<polygon fill="#231F20" points="131.101,478.545 132.228,480.009 133.829,466.085 133.062,465.089 							"/>

Modified: trunk/payloads/bayou/bayou.xml.example
==============================================================================
--- trunk/payloads/bayou/bayou.xml.example	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/bayou/bayou.xml.example	Tue Apr 27 08:56:47 2010	(r5507)
@@ -29,11 +29,11 @@
       <chain>
 	<file>payloads/passwd.elf</file>
 	<lar>passwd</lar>
-      </chain>      
+      </chain>
       <chain>
 	<file>payloads/coreinfo.elf</file>
       </chain>
-    </payload>    
+    </payload>
     <payload type="chooser">
       <file>payloads/coreinfo.elf</file>
     </payload>

Modified: trunk/payloads/bayou/lzmadecode.c
==============================================================================
--- trunk/payloads/bayou/lzmadecode.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/bayou/lzmadecode.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,21 +1,21 @@
 /*
   LzmaDecode.c
   LZMA Decoder (optimized for Speed version)
-  
+
   LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
   http://www.7-zip.org/
 
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and
   follow rules of that license.
 
   SPECIAL EXCEPTION:
-  Igor Pavlov, as the author of this Code, expressly permits you to 
-  statically or dynamically link your Code (or bind by name) to the 
-  interfaces of this file without subjecting your linked Code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this Code, expressly permits you to
+  statically or dynamically link your Code (or bind by name) to the
+  interfaces of this file without subjecting your linked Code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions
   to this file, however, are subject to the LGPL or CPL terms.
 */
 
@@ -37,7 +37,7 @@
 #define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
 
 #define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
- 
+
 
 #define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
 
@@ -47,9 +47,9 @@
 
 #define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
   { UpdateBit0(p); mi <<= 1; A0; } else \
-  { UpdateBit1(p); mi = (mi + mi) + 1; A1; } 
-  
-#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)               
+  { UpdateBit1(p); mi = (mi + mi) + 1; A1; }
+
+#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)
 
 #define RangeDecoderBitTreeDecode(probs, numLevels, res) \
   { int i = numLevels; res = 1; \
@@ -72,7 +72,7 @@
 #define LenLow (LenChoice2 + 1)
 #define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
 #define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
-#define kNumLenProbs (LenHigh + kLenNumHighSymbols) 
+#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
 
 
 #define kNumStates 12
@@ -161,7 +161,7 @@
     for (i = 0; i < numProbs; i++)
       p[i] = kBitModelTotal >> 1;
   }
-  
+
   RC_INIT(inStream, inSize);
 
 
@@ -170,7 +170,7 @@
     CProb *prob;
     UInt32 bound;
     int posState = (int)(
-        (nowPos 
+        (nowPos
         )
         & posStateMask);
 
@@ -179,9 +179,9 @@
     {
       int symbol = 1;
       UpdateBit0(prob)
-      prob = p + Literal + (LZMA_LIT_SIZE * 
+      prob = p + Literal + (LZMA_LIT_SIZE *
         (((
-        (nowPos 
+        (nowPos
         )
         & literalPosMask) << lc) + (previousByte >> (8 - lc))));
 
@@ -212,7 +212,7 @@
       else if (state < 10) state -= 3;
       else state -= 6;
     }
-    else             
+    else
     {
       UpdateBit1(prob);
       prob = p + IsRep + state;
@@ -236,10 +236,10 @@
           IfBit0(prob)
           {
             UpdateBit0(prob);
-            
+
             if (nowPos == 0)
               return LZMA_RESULT_DATA_ERROR;
-            
+
             state = state < kNumLitStates ? 9 : 11;
             previousByte = outStream[nowPos - rep0];
             outStream[nowPos++] = previousByte;
@@ -261,7 +261,7 @@
             UpdateBit0(prob);
             distance = rep1;
           }
-          else 
+          else
           {
             UpdateBit1(prob);
             prob = p + IsRepG2 + state;
@@ -322,7 +322,7 @@
         int posSlot;
         state += kNumLitStates;
         prob = p + PosSlot +
-            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << 
+            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
             kNumPosSlotBits);
         RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
         if (posSlot >= kStartPosModelIndex)

Modified: trunk/payloads/bayou/lzmadecode.h
==============================================================================
--- trunk/payloads/bayou/lzmadecode.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/bayou/lzmadecode.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* 
+/*
   LzmaDecode.h
   LZMA Decoder interface
 
@@ -8,14 +8,14 @@
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and
   follow rules of that license.
 
   SPECIAL EXCEPTION:
-  Igor Pavlov, as the author of this code, expressly permits you to 
-  statically or dynamically link your code (or bind by name) to the 
-  interfaces of this file without subjecting your linked code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this code, expressly permits you to
+  statically or dynamically link your code (or bind by name) to the
+  interfaces of this file without subjecting your linked code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions
   to this file, however, are subject to the LGPL or CPL terms.
 */
 

Modified: trunk/payloads/bayou/nrv2b.c
==============================================================================
--- trunk/payloads/bayou/nrv2b.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/bayou/nrv2b.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 #include <libpayload.h>
 
-// This GETBIT is supposed to work on little endian 
+// This GETBIT is supposed to work on little endian
 // 32bit systems. The algorithm will definitely need
 // some fixing on other systems, but it might not be
 // a problem since the nrv2b binary behaves the same..
@@ -40,7 +40,7 @@
 
 	// skip length
 	src += 4;
-	/* FIXME: check olen with the length stored in first 4 bytes */	
+	/* FIXME: check olen with the length stored in first 4 bytes */
 
 	for (;;) {
 		unsigned int m_off, m_len;

Modified: trunk/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.c
==============================================================================
--- trunk/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,21 +1,21 @@
 /*
   LzmaDecode.c
   LZMA Decoder (optimized for Speed version)
-  
+
   LZMA SDK 4.22 Copyright (c) 1999-2005 Igor Pavlov (2005-06-10)
   http://www.7-zip.org/
 
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and
   follow rules of that license.
 
   SPECIAL EXCEPTION:
-  Igor Pavlov, as the author of this Code, expressly permits you to 
-  statically or dynamically link your Code (or bind by name) to the 
-  interfaces of this file without subjecting your linked Code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this Code, expressly permits you to
+  statically or dynamically link your Code (or bind by name) to the
+  interfaces of this file without subjecting your linked Code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions
   to this file, however, are subject to the LGPL or CPL terms.
 */
 
@@ -50,7 +50,7 @@
 #define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
 
 #define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
- 
+
 #endif
 
 #define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
@@ -61,9 +61,9 @@
 
 #define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
   { UpdateBit0(p); mi <<= 1; A0; } else \
-  { UpdateBit1(p); mi = (mi + mi) + 1; A1; } 
-  
-#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)               
+  { UpdateBit1(p); mi = (mi + mi) + 1; A1; }
+
+#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)
 
 #define RangeDecoderBitTreeDecode(probs, numLevels, res) \
   { int i = numLevels; res = 1; \
@@ -86,7 +86,7 @@
 #define LenLow (LenChoice2 + 1)
 #define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
 #define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
-#define kNumLenProbs (LenHigh + kLenNumHighSymbols) 
+#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
 
 
 #define kNumStates 12
@@ -172,7 +172,7 @@
   int lc = vs->Properties.lc;
 
   #ifdef _LZMA_OUT_READ
-  
+
   UInt32 Range = vs->Range;
   UInt32 Code = vs->Code;
   #ifdef _LZMA_IN_CB
@@ -214,7 +214,7 @@
       UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
       UInt32 i;
       for (i = 0; i < numProbs; i++)
-        p[i] = kBitModelTotal >> 1; 
+        p[i] = kBitModelTotal >> 1;
       rep0 = rep1 = rep2 = rep3 = 1;
       state = 0;
       globalPos = 0;
@@ -265,7 +265,7 @@
     for (i = 0; i < numProbs; i++)
       p[i] = kBitModelTotal >> 1;
   }
-  
+
   #ifdef _LZMA_IN_CB
   RC_INIT;
   #else
@@ -279,7 +279,7 @@
     CProb *prob;
     UInt32 bound;
     int posState = (int)(
-        (nowPos 
+        (nowPos
         #ifdef _LZMA_OUT_READ
         + globalPos
         #endif
@@ -291,9 +291,9 @@
     {
       int symbol = 1;
       UpdateBit0(prob)
-      prob = p + Literal + (LZMA_LIT_SIZE * 
+      prob = p + Literal + (LZMA_LIT_SIZE *
         (((
-        (nowPos 
+        (nowPos
         #ifdef _LZMA_OUT_READ
         + globalPos
         #endif
@@ -342,7 +342,7 @@
       else if (state < 10) state -= 3;
       else state -= 6;
     }
-    else             
+    else
     {
       UpdateBit1(prob);
       prob = p + IsRep + state;
@@ -369,14 +369,14 @@
             UInt32 pos;
             #endif
             UpdateBit0(prob);
-            
+
             #ifdef _LZMA_OUT_READ
             if (distanceLimit == 0)
             #else
             if (nowPos == 0)
             #endif
               return LZMA_RESULT_DATA_ERROR;
-            
+
             state = state < kNumLitStates ? 9 : 11;
             #ifdef _LZMA_OUT_READ
             pos = dictionaryPos - rep0;
@@ -412,7 +412,7 @@
             UpdateBit0(prob);
             distance = rep1;
           }
-          else 
+          else
           {
             UpdateBit1(prob);
             prob = p + IsRepG2 + state;
@@ -473,7 +473,7 @@
         int posSlot;
         state += kNumLitStates;
         prob = p + PosSlot +
-            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << 
+            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
             kNumPosSlotBits);
         RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
         if (posSlot >= kStartPosModelIndex)
@@ -528,7 +528,7 @@
 
       len += kMatchMinLen;
       #ifdef _LZMA_OUT_READ
-      if (rep0 > distanceLimit) 
+      if (rep0 > distanceLimit)
       #else
       if (rep0 > nowPos)
       #endif

Modified: trunk/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.h
==============================================================================
--- trunk/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* 
+/*
   LzmaDecode.h
   LZMA Decoder interface
 
@@ -8,14 +8,14 @@
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and
   follow rules of that license.
 
   SPECIAL EXCEPTION:
-  Igor Pavlov, as the author of this code, expressly permits you to 
-  statically or dynamically link your code (or bind by name) to the 
-  interfaces of this file without subjecting your linked code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this code, expressly permits you to
+  statically or dynamically link your code (or bind by name) to the
+  interfaces of this file without subjecting your linked code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions
   to this file, however, are subject to the LGPL or CPL terms.
 */
 
@@ -29,7 +29,7 @@
 /* Use read function for output data */
 
 /* #define _LZMA_PROB32 */
-/* It can increase speed on some 32-bit CPUs, 
+/* It can increase speed on some 32-bit CPUs,
    but memory usage will be doubled in that case */
 
 /* #define _LZMA_LOC_OPT */

Modified: trunk/payloads/bayou/util/pbuilder/lzma/minilzma.cc
==============================================================================
--- trunk/payloads/bayou/util/pbuilder/lzma/minilzma.cc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/bayou/util/pbuilder/lzma/minilzma.cc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -89,7 +89,7 @@
     if(datasize <= 512) return 512;
     if(datasize <= 1024) return 1024;
     if(datasize <= 4096) return 4096;
-    if(datasize <= 16384) return 32768; 
+    if(datasize <= 16384) return 32768;
     if(datasize <= 65536) return 528288;
     if(datasize <= 528288) return 1048576*4;
     if(datasize <= 786432) reutrn 1048576*16;
@@ -105,12 +105,12 @@
     size_t Pos;
 public:
     MY_UNKNOWN_IMP
-  
+
     CInStreamRam(const std::vector<unsigned char>& buf) : input(buf), Pos(0)
     {
     }
     virtual ~CInStreamRam() {}
-  
+
     STDMETHOD(Read)(void *data, UInt32 size, UInt32 *processedSize);
 };
 
@@ -118,12 +118,12 @@
 {
     UInt32 remain = input.size() - Pos;
     if (size > remain) size = remain;
-  
+
     std::memcpy(data, &input[Pos], size);
     Pos += size;
-    
+
     if(processedSize != NULL) *processedSize = size;
-    
+
     return S_OK;
 }
 
@@ -133,27 +133,27 @@
     size_t Pos;
 public:
     MY_UNKNOWN_IMP
-    
+
     COutStreamRam(): result(), Pos(0) { }
     virtual ~COutStreamRam() { }
-    
+
     void Reserve(unsigned n) { result.reserve(n); }
     const std::vector<Byte>& Get() const { return result; }
-  
+
     HRESULT WriteByte(Byte b)
     {
         if(Pos >= result.size()) result.resize(Pos+1);
         result[Pos++] = b;
         return S_OK;
     }
-  
+
     STDMETHOD(Write)(const void *data, UInt32 size, UInt32 *processedSize);
 };
 
 STDMETHODIMP COutStreamRam::Write(const void *data, UInt32 size, UInt32 *processedSize)
 {
     if(Pos+size > result.size()) result.resize(Pos+size);
-    
+
     std::memcpy(&result[Pos], data, size);
     if(processedSize != NULL) *processedSize = size;
     Pos += size;
@@ -163,15 +163,15 @@
 const std::vector<unsigned char> LZMACompress(const std::vector<unsigned char>& buf)
 {
     if(buf.empty()) return buf;
-    
+
     const UInt32 dictionarysize = SelectDictionarySizeFor(buf.size());
-    
+
     NCompress::NLZMA::CEncoder *encoderSpec = new NCompress::NLZMA::CEncoder;
     CMyComPtr<ICompressCoder> encoder = encoderSpec;
-    const PROPID propIDs[] = 
+    const PROPID propIDs[] =
     {
         NCoderPropID::kAlgorithm,
-        NCoderPropID::kDictionarySize,  
+        NCoderPropID::kDictionarySize,
         NCoderPropID::kNumFastBytes,
     };
     const unsigned kNumProps = sizeof(propIDs) / sizeof(propIDs[0]);
@@ -185,16 +185,16 @@
     Error:
         return std::vector<unsigned char> ();
     }
-    
+
     COutStreamRam *const outStreamSpec = new COutStreamRam;
     CMyComPtr<ISequentialOutStream> outStream = outStreamSpec;
     CInStreamRam *const inStreamSpec = new CInStreamRam(buf);
     CMyComPtr<ISequentialInStream> inStream = inStreamSpec;
-    
+
     outStreamSpec->Reserve(buf.size());
 
     if (encoderSpec->WriteCoderProperties(outStream) != S_OK) goto Error;
-    
+
     for (unsigned i = 0; i < 8; i++)
     {
         UInt64 t = (UInt64)buf.size();
@@ -203,7 +203,7 @@
 
     HRESULT lzmaResult = encoder->Code(inStream, outStream, 0, 0, 0);
     if (lzmaResult != S_OK) goto Error;
-    
+
     return outStreamSpec->Get();
 }
 
@@ -216,22 +216,22 @@
     (const std::vector<unsigned char>& buf)
 {
     if(buf.size() <= 5+8) return std::vector<unsigned char> ();
-    
+
     uint_least64_t out_sizemax = R64(&buf[5]);
-    
+
     std::vector<unsigned char> result(out_sizemax);
-    
+
     CLzmaDecoderState state;
     LzmaDecodeProperties(&state.Properties, &buf[0], LZMA_PROPERTIES_SIZE);
     state.Probs = new CProb[LzmaGetNumProbs(&state.Properties)];
-    
+
     SizeT in_done;
     SizeT out_done;
     LzmaDecode(&state, &buf[13], buf.size()-13, &in_done,
                &result[0], result.size(), &out_done);
-    
+
     delete[] state.Probs;
-    
+
     result.resize(out_done);
     return result;
 }
@@ -242,7 +242,7 @@
 	char  *s;
 	FILE  *f, *infile, *outfile;
 	int    c;
-	
+
 	if (argc != 4) {
 		std::fprintf(stderr, "'lzma e file1 file2' encodes file1 into file2.\n"
 			"'lzma d file2 file1' decodes file2 into file1.\n");
@@ -270,9 +270,9 @@
 	fread(Buf,si, 1, infile);
 
 	std::vector<unsigned char> result;
-	if (toupper(*argv[1]) == 'E') 
+	if (toupper(*argv[1]) == 'E')
 		result = LZMACompress(std::vector<unsigned char>(Buf,Buf+si));
-	else	
+	else
 		result = LZMADeCompress(std::vector<unsigned char>(Buf,Buf+si));
 
 	fwrite(&result[0], result.size(), 1, outfile);
@@ -289,7 +289,7 @@
  * @param in a pointer to the buffer
  * @param in_len the length in bytes
  * @param out a pointer to a buffer of at least size in_len
- * @param out_len a pointer to the compressed length of in 
+ * @param out_len a pointer to the compressed length of in
  */
 
 void do_lzma_compress(char *in, int in_len, char *out, int *out_len) {

Modified: trunk/payloads/coreinfo/cpuid.S
==============================================================================
--- trunk/payloads/coreinfo/cpuid.S	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/coreinfo/cpuid.S	Tue Apr 27 08:56:47 2010	(r5507)
@@ -20,7 +20,7 @@
  */
 
 /* calling syntax:  docpuid(idx,eax,ebx,ecx,edx) */
-	
+
 .align 4
 .text
 

Modified: trunk/payloads/coreinfo/pci_module.c
==============================================================================
--- trunk/payloads/coreinfo/pci_module.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/coreinfo/pci_module.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -194,7 +194,7 @@
 			if (devices_index >= MAX_PCI_DEVICES)
 				return;
 
-			devices[devices_index].device = 
+			devices[devices_index].device =
 			    PCI_DEV(bus, slot, func);
 
 			devices[devices_index++].id = val;

Modified: trunk/payloads/coreinfo/util/kconfig/lex.zconf.c_shipped
==============================================================================
--- trunk/payloads/coreinfo/util/kconfig/lex.zconf.c_shipped	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/coreinfo/util/kconfig/lex.zconf.c_shipped	Tue Apr 27 08:56:47 2010	(r5507)
@@ -52,7 +52,7 @@
 #if __STDC_VERSION__ >= 199901L
 
 /* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
- * if you want the limit (max/min) macros for int types. 
+ * if you want the limit (max/min) macros for int types.
  */
 #ifndef __STDC_LIMIT_MACROS
 #define __STDC_LIMIT_MACROS 1
@@ -69,7 +69,7 @@
 typedef signed char flex_int8_t;
 typedef short int flex_int16_t;
 typedef int flex_int32_t;
-typedef unsigned char flex_uint8_t; 
+typedef unsigned char flex_uint8_t;
 typedef unsigned short int flex_uint16_t;
 typedef unsigned int flex_uint32_t;
 #endif /* ! C99 */
@@ -179,7 +179,7 @@
 #define EOB_ACT_LAST_MATCH 2
 
     #define YY_LESS_LINENO(n)
-    
+
 /* Return all but the first "n" matched characters back to the input stream. */
 #define yyless(n) \
 	do \
@@ -246,7 +246,7 @@
 
     int yy_bs_lineno; /**< The line count. */
     int yy_bs_column; /**< The column count. */
-    
+
 	/* Whether to try to fill the input buffer when we reach the
 	 * end of it.
 	 */
@@ -866,7 +866,7 @@
 #endif
 
     static void yyunput (int c,char *buf_ptr  );
-    
+
 #ifndef yytext_ptr
 static void yy_flex_strncpy (char *,yyconst char *,int );
 #endif
@@ -971,7 +971,7 @@
 	register yy_state_type yy_current_state;
 	register char *yy_cp, *yy_bp;
 	register int yy_act;
-    
+
 	int str = 0;
 	int ts, i;
 
@@ -1574,7 +1574,7 @@
 {
 	register yy_state_type yy_current_state;
 	register char *yy_cp;
-    
+
 	yy_current_state = (yy_start);
 
 	for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
@@ -1593,7 +1593,7 @@
     static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
 {
 	register int yy_is_jam;
-    
+
 	yy_current_state = yy_nxt[yy_current_state][1];
 	yy_is_jam = (yy_current_state <= 0);
 
@@ -1603,7 +1603,7 @@
     static void yyunput (int c, register char * yy_bp )
 {
 	register char *yy_cp;
-    
+
     yy_cp = (yy_c_buf_p);
 
 	/* undo effects of setting up zconftext */
@@ -1646,7 +1646,7 @@
 
 {
 	int c;
-    
+
 	*(yy_c_buf_p) = (yy_hold_char);
 
 	if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
@@ -1713,12 +1713,12 @@
 
 /** Immediately switch to a different input stream.
  * @param input_file A readable stream.
- * 
+ *
  * @note This function does not reset the start condition to @c INITIAL .
  */
     void zconfrestart  (FILE * input_file )
 {
-    
+
 	if ( ! YY_CURRENT_BUFFER ){
         zconfensure_buffer_stack ();
 		YY_CURRENT_BUFFER_LVALUE =
@@ -1731,11 +1731,11 @@
 
 /** Switch to a different input buffer.
  * @param new_buffer The new input buffer.
- * 
+ *
  */
     void zconf_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
 {
-    
+
 	/* TODO. We should be able to replace this entire function body
 	 * with
 	 *		zconfpop_buffer_state();
@@ -1775,13 +1775,13 @@
 /** Allocate and initialize an input buffer state.
  * @param file A readable stream.
  * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
- * 
+ *
  * @return the allocated buffer state.
  */
     YY_BUFFER_STATE zconf_create_buffer  (FILE * file, int  size )
 {
 	YY_BUFFER_STATE b;
-    
+
 	b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state )  );
 	if ( ! b )
 		YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" );
@@ -1804,11 +1804,11 @@
 
 /** Destroy the buffer.
  * @param b a buffer created with zconf_create_buffer()
- * 
+ *
  */
     void zconf_delete_buffer (YY_BUFFER_STATE  b )
 {
-    
+
 	if ( ! b )
 		return;
 
@@ -1829,7 +1829,7 @@
 
 {
 	int oerrno = errno;
-    
+
 	zconf_flush_buffer(b );
 
 	b->yy_input_file = file;
@@ -1845,13 +1845,13 @@
     }
 
         b->yy_is_interactive = 0;
-    
+
 	errno = oerrno;
 }
 
 /** Discard all buffered characters. On the next scan, YY_INPUT will be called.
  * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
- * 
+ *
  */
     void zconf_flush_buffer (YY_BUFFER_STATE  b )
 {
@@ -1880,7 +1880,7 @@
  *  the current state. This function will allocate the stack
  *  if necessary.
  *  @param new_buffer The new state.
- *  
+ *
  */
 void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
 {
@@ -1910,7 +1910,7 @@
 
 /** Removes and deletes the top of the stack, if present.
  *  The next element becomes the new top.
- *  
+ *
  */
 void zconfpop_buffer_state (void)
 {
@@ -1934,7 +1934,7 @@
 static void zconfensure_buffer_stack (void)
 {
 	int num_to_alloc;
-    
+
 	if (!(yy_buffer_stack)) {
 
 		/* First allocation is just for 2 elements, since we don't know if this
@@ -1945,9 +1945,9 @@
 		(yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc
 								(num_to_alloc * sizeof(struct yy_buffer_state*)
 								);
-		
+
 		memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
-				
+
 		(yy_buffer_stack_max) = num_to_alloc;
 		(yy_buffer_stack_top) = 0;
 		return;
@@ -1973,13 +1973,13 @@
 /** Setup the input buffer state to scan directly from a user-specified character buffer.
  * @param base the character buffer
  * @param size the size in bytes of the character buffer
- * 
- * @return the newly allocated buffer state object. 
+ *
+ * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )
 {
 	YY_BUFFER_STATE b;
-    
+
 	if ( size < 2 ||
 	     base[size-2] != YY_END_OF_BUFFER_CHAR ||
 	     base[size-1] != YY_END_OF_BUFFER_CHAR )
@@ -2008,14 +2008,14 @@
 /** Setup the input buffer state to scan a string. The next call to zconflex() will
  * scan from a @e copy of @a str.
  * @param str a NUL-terminated string to scan
- * 
+ *
  * @return the newly allocated buffer state object.
  * @note If you want to scan bytes that may contain NUL values, then use
  *       zconf_scan_bytes() instead.
  */
 YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
 {
-    
+
 	return zconf_scan_bytes(yystr,strlen(yystr) );
 }
 
@@ -2023,7 +2023,7 @@
  * scan from a @e copy of @a bytes.
  * @param bytes the byte buffer to scan
  * @param len the number of bytes in the buffer pointed to by @a bytes.
- * 
+ *
  * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
@@ -2032,7 +2032,7 @@
 	char *buf;
 	yy_size_t n;
 	int i;
-    
+
 	/* Get memory for full buffer, including space for trailing EOB's. */
 	n = _yybytes_len + 2;
 	buf = (char *) zconfalloc(n  );
@@ -2086,16 +2086,16 @@
 /* Accessor  methods (get/set functions) to struct members. */
 
 /** Get the current line number.
- * 
+ *
  */
 int zconfget_lineno  (void)
 {
-        
+
     return zconflineno;
 }
 
 /** Get the input stream.
- * 
+ *
  */
 FILE *zconfget_in  (void)
 {
@@ -2103,7 +2103,7 @@
 }
 
 /** Get the output stream.
- * 
+ *
  */
 FILE *zconfget_out  (void)
 {
@@ -2111,7 +2111,7 @@
 }
 
 /** Get the length of the current token.
- * 
+ *
  */
 int zconfget_leng  (void)
 {
@@ -2119,7 +2119,7 @@
 }
 
 /** Get the current token.
- * 
+ *
  */
 
 char *zconfget_text  (void)
@@ -2129,18 +2129,18 @@
 
 /** Set the current line number.
  * @param line_number
- * 
+ *
  */
 void zconfset_lineno (int  line_number )
 {
-    
+
     zconflineno = line_number;
 }
 
 /** Set the input stream. This does not discard the current
  * input buffer.
  * @param in_str A readable stream.
- * 
+ *
  * @see zconf_switch_to_buffer
  */
 void zconfset_in (FILE *  in_str )
@@ -2194,7 +2194,7 @@
 /* zconflex_destroy is for both reentrant and non-reentrant scanners. */
 int zconflex_destroy  (void)
 {
-    
+
     /* Pop the buffer stack, destroying each element. */
 	while(YY_CURRENT_BUFFER){
 		zconf_delete_buffer(YY_CURRENT_BUFFER  );

Modified: trunk/payloads/coreinfo/util/kconfig/lxdialog/BIG.FAT.WARNING
==============================================================================
--- trunk/payloads/coreinfo/util/kconfig/lxdialog/BIG.FAT.WARNING	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/coreinfo/util/kconfig/lxdialog/BIG.FAT.WARNING	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
 This is NOT the official version of dialog.  This version has been
 significantly modified from the original.  It is for use by the Linux
-kernel configuration script.  Please do not bother Savio Lam with 
+kernel configuration script.  Please do not bother Savio Lam with
 questions about this program.

Modified: trunk/payloads/coreinfo/util/kconfig/lxdialog/menubox.c
==============================================================================
--- trunk/payloads/coreinfo/util/kconfig/lxdialog/menubox.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/coreinfo/util/kconfig/lxdialog/menubox.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -26,7 +26,7 @@
  *
  *    *)  A bugfix for the Page-Down problem
  *
- *    *)  Formerly when I used Page Down and Page Up, the cursor would be set 
+ *    *)  Formerly when I used Page Down and Page Up, the cursor would be set
  *        to the first position in the menu box.  Now lxdialog is a bit
  *        smarter and works more like other menu systems (just have a look at
  *        it).

Modified: trunk/payloads/coreinfo/util/kconfig/zconf.tab.c_shipped
==============================================================================
--- trunk/payloads/coreinfo/util/kconfig/zconf.tab.c_shipped	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/coreinfo/util/kconfig/zconf.tab.c_shipped	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1394,7 +1394,7 @@
 #endif
 #endif
 {
-  
+
   int yystate;
   int yyn;
   int yyresult;

Modified: trunk/payloads/external/tint/libpayload_tint.patch
==============================================================================
--- trunk/payloads/external/tint/libpayload_tint.patch	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/external/tint/libpayload_tint.patch	Tue Apr 27 08:56:47 2010	(r5507)
@@ -9,7 +9,7 @@
 @@ -29,7 +29,16 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */
- 
+
 +#include <libpayload.h>
 +#include <curses.h>
 +#define random(x) rand(x)
@@ -21,7 +21,7 @@
 +#if 0
  const char scorefile[] = SCOREFILE;
 +#endif
- 
+
  #endif	/* #ifndef CONFIG_H */
 diff -Naur tint-0.03b.orig/engine.c tint-0.03b/engine.c
 --- tint-0.03b.orig/engine.c	2005-07-17 13:26:22.000000000 +0200
@@ -29,14 +29,14 @@
 @@ -27,8 +27,12 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */
- 
+
 +#include "config.h"
 +
 +#if 0
  #include <stdlib.h>
  #include <string.h>
 +#endif
- 
+
  #include "typedefs.h"
  #include "utils.h"
 diff -Naur tint-0.03b.orig/io.c tint-0.03b/io.c
@@ -45,7 +45,7 @@
 @@ -27,9 +27,13 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */
- 
+
 +#include "config.h"
 +
 +#if 0
@@ -53,9 +53,9 @@
  #include <sys/time.h>	/* gettimeofday() */
  #include <unistd.h>		/* gettimeofday() */
 +#endif
- 
+
  #include <curses.h>
- 
+
 @@ -70,7 +74,11 @@
  /* Initialize screen */
  void io_init ()
@@ -93,14 +93,14 @@
 +#endif
     return ch;
  }
- 
+
 diff -Naur tint-0.03b.orig/Makefile tint-0.03b/Makefile
 --- tint-0.03b.orig/Makefile	2005-07-17 13:30:54.000000000 +0200
 +++ tint-0.03b/Makefile	2008-04-11 22:19:35.000000000 +0200
 @@ -28,6 +28,36 @@
  #  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  #  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- 
+
 +LIBPAYLOAD_DIR := ../libpayload
 +CC := $(LIBPAYLOAD_DIR)/bin/lpgcc
 +AS := $(LIBPAYLOAD_DIR)/bin/lpas
@@ -132,12 +132,12 @@
 +ifdef $(UNUSED)
 +
  #CROSS = arm-linux-
- 
+
  bindir = $(DESTDIR)/usr/games
 @@ -110,3 +140,4 @@
  distclean: clean
  	$(MAKE) -C debian clean
- 
+
 +endif
 diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
 --- tint-0.03b.orig/tint.c	2005-07-17 13:26:43.000000000 +0200
@@ -145,7 +145,7 @@
 @@ -27,6 +27,7 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */
- 
+
 +#if 0
  #include <stdlib.h>
  #include <stdio.h>
@@ -155,13 +155,13 @@
  #include <sys/types.h>
  #include <unistd.h>
 +#endif
- 
+
  #include "typedefs.h"
  #include "utils.h"
 @@ -321,6 +323,7 @@
     time_t timestamp;
  } score_t;
- 
+
 +#if 0
  static void getname (char *name)
  {
@@ -171,7 +171,7 @@
  	 }
  }
 +#endif
- 
+
 +#if 0
  static void err1 ()
  {
@@ -181,7 +181,7 @@
     exit (EXIT_FAILURE);
  }
 +#endif
- 
+
  void showplayerstats (engine_t *engine)
  {
 -   fprintf (stderr,
@@ -192,7 +192,7 @@
 @@ -360,6 +366,7 @@
  			GETSCORE (engine->score),engine->status.efficiency,GETSCORE (engine->score) / getsum ());
  }
- 
+
 +#if 0
  static void createscores (int score)
  {
@@ -202,7 +202,7 @@
     fprintf (stderr,"\t  1* %7d        %s\n\n",score,scores[0].name);
  }
 +#endif
- 
+
 +#if 0
  static int cmpscores (const void *a,const void *b)
  {
@@ -212,7 +212,7 @@
     return 0;
  }
 +#endif
- 
+
 +#if 0
  static void savescores (int score)
  {
@@ -222,11 +222,11 @@
     fprintf (stderr,"\n");
  }
 +#endif
- 
+
            /***************************************************************************/
            /***************************************************************************/
            /***************************************************************************/
- 
+
 +#if 0
  static void showhelp ()
  {
@@ -236,7 +236,7 @@
     exit (EXIT_FAILURE);
  }
 +#endif
- 
+
  static void parse_options (int argc,char *argv[])
  {
 +#if 0
@@ -249,12 +249,12 @@
  	 }
 +#endif
  }
- 
+
  static void choose_level ()
  {
 +#if 0
     char buf[NAMELEN];
- 
+
     do
 @@ -549,6 +566,8 @@
  		buf[strlen (buf) - 1] = '\0';
@@ -263,7 +263,7 @@
 +#endif
 +	level = 1;
  }
- 
+
            /***************************************************************************/
 @@ -663,8 +682,15 @@
     if (ch != 'q')
@@ -280,14 +280,14 @@
     exit (EXIT_SUCCESS);
 +#endif
  }
- 
+
 diff -Naur tint-0.03b.orig/utils.c tint-0.03b/utils.c
 --- tint-0.03b.orig/utils.c	2001-12-07 16:49:19.000000000 +0100
 +++ tint-0.03b/utils.c	2008-04-11 22:19:35.000000000 +0200
 @@ -27,9 +27,13 @@
   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   */
- 
+
 +#include "config.h"
 +
 +#if 0
@@ -295,9 +295,9 @@
  #include <time.h>
  #include <limits.h>
 +#endif
- 
+
  #include "typedefs.h"
- 
+
 @@ -41,8 +45,11 @@
  #ifdef USE_RAND
     srand (time (NULL));
@@ -308,7 +308,7 @@
 +   srandom (123);
 +#endif
  }
- 
+
  /*
 @@ -61,6 +68,7 @@
   * Convert an str to long. Returns TRUE if successful,
@@ -321,5 +321,5 @@
 @@ -69,3 +77,4 @@
     return TRUE;
  }
- 
+
 +#endif

Modified: trunk/payloads/libpayload/Config.in
==============================================================================
--- trunk/payloads/libpayload/Config.in	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/Config.in	Tue Apr 27 08:56:47 2010	(r5507)
@@ -134,9 +134,9 @@
 	  displaying a couple of other special graphics characters.  The
 	  ACS characters generally look good on screen, but can be difficult
 	  to cut and paste from a terminal window to a text editor.
-	
+
 	  Say 'y' here if you want to always use plain ASCII characters to
-	  approximate the appearance of ACS characters on the serial port 
+	  approximate the appearance of ACS characters on the serial port
 	  console.
 
 config VIDEO_CONSOLE
@@ -194,12 +194,12 @@
 	  For recent chipsets with 256 NVRAM bytes, you have to access the
 	  upper 128 bytes (128-255) using two different I/O ports,
 	  usually 0x72/0x73.
-	
+
 	  On some chipsets this can be a different set of ports, though.
 	  The VIA VT8237R for example only recognizes the ports 0x74/0x75
 	  for accessing the high 128 NVRAM bytes (as seems to be the case for
 	  multiple VIA chipsets).
-	
+
 	  If you want to read or write CMOS bytes on computers with one of
 	  these chipsets, say 'y' here.
 

Modified: trunk/payloads/libpayload/Doxyfile
==============================================================================
--- trunk/payloads/libpayload/Doxyfile	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/Doxyfile	Tue Apr 27 08:56:47 2010	(r5507)
@@ -14,211 +14,211 @@
 # Project related configuration options
 #---------------------------------------------------------------------------
 
-# This tag specifies the encoding used for all characters in the config file 
-# that follow. The default is UTF-8 which is also the encoding used for all 
-# text before the first occurrence of this tag. Doxygen uses libiconv (or the 
-# iconv built into libc) for the transcoding. See 
+# This tag specifies the encoding used for all characters in the config file
+# that follow. The default is UTF-8 which is also the encoding used for all
+# text before the first occurrence of this tag. Doxygen uses libiconv (or the
+# iconv built into libc) for the transcoding. See
 # http://www.gnu.org/software/libiconv for the list of possible encodings.
 
 DOXYFILE_ENCODING      = UTF-8
 
-# The PROJECT_NAME tag is a single word (or a sequence of words surrounded 
+# The PROJECT_NAME tag is a single word (or a sequence of words surrounded
 # by quotes) that should identify the project.
 
 PROJECT_NAME           = libpayload
 
-# The PROJECT_NUMBER tag can be used to enter a project or revision number. 
-# This could be handy for archiving the generated documentation or 
+# The PROJECT_NUMBER tag can be used to enter a project or revision number.
+# This could be handy for archiving the generated documentation or
 # if some version control system is used.
 
-PROJECT_NUMBER         = 
+PROJECT_NUMBER         =
 
-# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) 
-# base path where the generated documentation will be put. 
-# If a relative path is entered, it will be relative to the location 
+# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
+# base path where the generated documentation will be put.
+# If a relative path is entered, it will be relative to the location
 # where doxygen was started. If left blank the current directory will be used.
 
 OUTPUT_DIRECTORY       = doxygen
 
-# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create 
-# 4096 sub-directories (in 2 levels) under the output directory of each output 
-# format and will distribute the generated files over these directories. 
-# Enabling this option can be useful when feeding doxygen a huge amount of 
-# source files, where putting all generated files in the same directory would 
+# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create
+# 4096 sub-directories (in 2 levels) under the output directory of each output
+# format and will distribute the generated files over these directories.
+# Enabling this option can be useful when feeding doxygen a huge amount of
+# source files, where putting all generated files in the same directory would
 # otherwise cause performance problems for the file system.
 
 CREATE_SUBDIRS         = NO
 
-# The OUTPUT_LANGUAGE tag is used to specify the language in which all 
-# documentation generated by doxygen is written. Doxygen will use this 
-# information to generate all constant output in the proper language. 
-# The default language is English, other supported languages are: 
-# Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional, 
-# Croatian, Czech, Danish, Dutch, Farsi, Finnish, French, German, Greek, 
-# Hungarian, Italian, Japanese, Japanese-en (Japanese with English messages), 
-# Korean, Korean-en, Lithuanian, Norwegian, Macedonian, Persian, Polish, 
-# Portuguese, Romanian, Russian, Serbian, Slovak, Slovene, Spanish, Swedish, 
+# The OUTPUT_LANGUAGE tag is used to specify the language in which all
+# documentation generated by doxygen is written. Doxygen will use this
+# information to generate all constant output in the proper language.
+# The default language is English, other supported languages are:
+# Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional,
+# Croatian, Czech, Danish, Dutch, Farsi, Finnish, French, German, Greek,
+# Hungarian, Italian, Japanese, Japanese-en (Japanese with English messages),
+# Korean, Korean-en, Lithuanian, Norwegian, Macedonian, Persian, Polish,
+# Portuguese, Romanian, Russian, Serbian, Slovak, Slovene, Spanish, Swedish,
 # and Ukrainian.
 
 OUTPUT_LANGUAGE        = English
 
-# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will 
-# include brief member descriptions after the members that are listed in 
-# the file and class documentation (similar to JavaDoc). 
+# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will
+# include brief member descriptions after the members that are listed in
+# the file and class documentation (similar to JavaDoc).
 # Set to NO to disable this.
 
 BRIEF_MEMBER_DESC      = YES
 
-# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend 
-# the brief description of a member or function before the detailed description. 
-# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the 
+# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend
+# the brief description of a member or function before the detailed description.
+# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
 # brief descriptions will be completely suppressed.
 
 REPEAT_BRIEF           = YES
 
-# This tag implements a quasi-intelligent brief description abbreviator 
-# that is used to form the text in various listings. Each string 
-# in this list, if found as the leading text of the brief description, will be 
-# stripped from the text and the result after processing the whole list, is 
-# used as the annotated text. Otherwise, the brief description is used as-is. 
-# If left blank, the following values are used ("$name" is automatically 
-# replaced with the name of the entity): "The $name class" "The $name widget" 
-# "The $name file" "is" "provides" "specifies" "contains" 
+# This tag implements a quasi-intelligent brief description abbreviator
+# that is used to form the text in various listings. Each string
+# in this list, if found as the leading text of the brief description, will be
+# stripped from the text and the result after processing the whole list, is
+# used as the annotated text. Otherwise, the brief description is used as-is.
+# If left blank, the following values are used ("$name" is automatically
+# replaced with the name of the entity): "The $name class" "The $name widget"
+# "The $name file" "is" "provides" "specifies" "contains"
 # "represents" "a" "an" "the"
 
-ABBREVIATE_BRIEF       = 
+ABBREVIATE_BRIEF       =
 
-# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then 
-# Doxygen will generate a detailed section even if there is only a brief 
+# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
+# Doxygen will generate a detailed section even if there is only a brief
 # description.
 
 ALWAYS_DETAILED_SEC    = YES
 
-# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all 
-# inherited members of a class in the documentation of that class as if those 
-# members were ordinary class members. Constructors, destructors and assignment 
+# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all
+# inherited members of a class in the documentation of that class as if those
+# members were ordinary class members. Constructors, destructors and assignment
 # operators of the base classes will not be shown.
 
 INLINE_INHERITED_MEMB  = NO
 
-# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full 
-# path before files name in the file list and in the header files. If set 
+# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full
+# path before files name in the file list and in the header files. If set
 # to NO the shortest path that makes the file name unique will be used.
 
 FULL_PATH_NAMES        = YES
 
-# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag 
-# can be used to strip a user-defined part of the path. Stripping is 
-# only done if one of the specified strings matches the left-hand part of 
-# the path. The tag can be used to show relative paths in the file list. 
-# If left blank the directory from which doxygen is run is used as the 
+# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag
+# can be used to strip a user-defined part of the path. Stripping is
+# only done if one of the specified strings matches the left-hand part of
+# the path. The tag can be used to show relative paths in the file list.
+# If left blank the directory from which doxygen is run is used as the
 # path to strip.
 
-STRIP_FROM_PATH        = 
+STRIP_FROM_PATH        =
 
-# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of 
-# the path mentioned in the documentation of a class, which tells 
-# the reader which header file to include in order to use a class. 
-# If left blank only the name of the header file containing the class 
-# definition is used. Otherwise one should specify the include paths that 
+# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of
+# the path mentioned in the documentation of a class, which tells
+# the reader which header file to include in order to use a class.
+# If left blank only the name of the header file containing the class
+# definition is used. Otherwise one should specify the include paths that
 # are normally passed to the compiler using the -I flag.
 
-STRIP_FROM_INC_PATH    = 
+STRIP_FROM_INC_PATH    =
 
-# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter 
-# (but less readable) file names. This can be useful is your file systems 
+# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter
+# (but less readable) file names. This can be useful is your file systems
 # doesn't support long names like on DOS, Mac, or CD-ROM.
 
 SHORT_NAMES            = NO
 
-# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen 
-# will interpret the first line (until the first dot) of a JavaDoc-style 
-# comment as the brief description. If set to NO, the JavaDoc 
-# comments will behave just like regular Qt-style comments 
+# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen
+# will interpret the first line (until the first dot) of a JavaDoc-style
+# comment as the brief description. If set to NO, the JavaDoc
+# comments will behave just like regular Qt-style comments
 # (thus requiring an explicit @brief command for a brief description.)
 
 JAVADOC_AUTOBRIEF      = YES
 
-# If the QT_AUTOBRIEF tag is set to YES then Doxygen will 
-# interpret the first line (until the first dot) of a Qt-style 
-# comment as the brief description. If set to NO, the comments 
-# will behave just like regular Qt-style comments (thus requiring 
+# If the QT_AUTOBRIEF tag is set to YES then Doxygen will
+# interpret the first line (until the first dot) of a Qt-style
+# comment as the brief description. If set to NO, the comments
+# will behave just like regular Qt-style comments (thus requiring
 # an explicit \brief command for a brief description.)
 
 QT_AUTOBRIEF           = NO
 
-# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen 
-# treat a multi-line C++ special comment block (i.e. a block of //! or /// 
-# comments) as a brief description. This used to be the default behaviour. 
-# The new default is to treat a multi-line C++ comment block as a detailed 
+# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen
+# treat a multi-line C++ special comment block (i.e. a block of //! or ///
+# comments) as a brief description. This used to be the default behaviour.
+# The new default is to treat a multi-line C++ comment block as a detailed
 # description. Set this tag to YES if you prefer the old behaviour instead.
 
 MULTILINE_CPP_IS_BRIEF = NO
 
-# If the DETAILS_AT_TOP tag is set to YES then Doxygen 
+# If the DETAILS_AT_TOP tag is set to YES then Doxygen
 # will output the detailed description near the top, like JavaDoc.
-# If set to NO, the detailed description appears after the member 
+# If set to NO, the detailed description appears after the member
 # documentation.
 
 DETAILS_AT_TOP         = NO
 
-# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented 
-# member inherits the documentation from any documented member that it 
+# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented
+# member inherits the documentation from any documented member that it
 # re-implements.
 
 INHERIT_DOCS           = YES
 
-# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce 
-# a new page for each member. If set to NO, the documentation of a member will 
+# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce
+# a new page for each member. If set to NO, the documentation of a member will
 # be part of the file/class/namespace that contains it.
 
 SEPARATE_MEMBER_PAGES  = NO
 
-# The TAB_SIZE tag can be used to set the number of spaces in a tab. 
+# The TAB_SIZE tag can be used to set the number of spaces in a tab.
 # Doxygen uses this value to replace tabs by spaces in code fragments.
 
 TAB_SIZE               = 8
 
-# This tag can be used to specify a number of aliases that acts 
-# as commands in the documentation. An alias has the form "name=value". 
-# For example adding "sideeffect=\par Side Effects:\n" will allow you to 
-# put the command \sideeffect (or @sideeffect) in the documentation, which 
-# will result in a user-defined paragraph with heading "Side Effects:". 
+# This tag can be used to specify a number of aliases that acts
+# as commands in the documentation. An alias has the form "name=value".
+# For example adding "sideeffect=\par Side Effects:\n" will allow you to
+# put the command \sideeffect (or @sideeffect) in the documentation, which
+# will result in a user-defined paragraph with heading "Side Effects:".
 # You can put \n's in the value part of an alias to insert newlines.
 
-ALIASES                = 
+ALIASES                =
 
-# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C 
-# sources only. Doxygen will then generate output that is more tailored for C. 
-# For instance, some of the names that are used will be different. The list 
+# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C
+# sources only. Doxygen will then generate output that is more tailored for C.
+# For instance, some of the names that are used will be different. The list
 # of all members will be omitted, etc.
 
 OPTIMIZE_OUTPUT_FOR_C  = YES
 
-# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java 
-# sources only. Doxygen will then generate output that is more tailored for 
-# Java. For instance, namespaces will be presented as packages, qualified 
+# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java
+# sources only. Doxygen will then generate output that is more tailored for
+# Java. For instance, namespaces will be presented as packages, qualified
 # scopes will look different, etc.
 
 OPTIMIZE_OUTPUT_JAVA   = NO
 
-# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran 
-# sources only. Doxygen will then generate output that is more tailored for 
+# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran
+# sources only. Doxygen will then generate output that is more tailored for
 # Fortran.
 
 OPTIMIZE_FOR_FORTRAN   = NO
 
-# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL 
-# sources. Doxygen will then generate output that is tailored for 
+# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL
+# sources. Doxygen will then generate output that is tailored for
 # VHDL.
 
 OPTIMIZE_OUTPUT_VHDL   = NO
 
-# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want 
-# to include (a tag file for) the STL sources as input, then you should 
-# set this tag to YES in order to let doxygen match functions declarations and 
-# definitions whose arguments contain STL classes (e.g. func(std::string); v.s. 
-# func(std::string) {}). This also make the inheritance and collaboration 
+# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want
+# to include (a tag file for) the STL sources as input, then you should
+# set this tag to YES in order to let doxygen match functions declarations and
+# definitions whose arguments contain STL classes (e.g. func(std::string); v.s.
+# func(std::string) {}). This also make the inheritance and collaboration
 # diagrams that involve STL classes more complete and accurate.
 
 BUILTIN_STL_SUPPORT    = NO
@@ -228,42 +228,42 @@
 
 CPP_CLI_SUPPORT        = NO
 
-# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only. 
-# Doxygen will parse them like normal C++ but will assume all classes use public 
+# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only.
+# Doxygen will parse them like normal C++ but will assume all classes use public
 # instead of private inheritance when no explicit protection keyword is present.
 
 SIP_SUPPORT            = NO
 
-# For Microsoft's IDL there are propget and propput attributes to indicate getter 
-# and setter methods for a property. Setting this option to YES (the default) 
-# will make doxygen to replace the get and set methods by a property in the 
-# documentation. This will only work if the methods are indeed getting or 
-# setting a simple type. If this is not the case, or you want to show the 
+# For Microsoft's IDL there are propget and propput attributes to indicate getter
+# and setter methods for a property. Setting this option to YES (the default)
+# will make doxygen to replace the get and set methods by a property in the
+# documentation. This will only work if the methods are indeed getting or
+# setting a simple type. If this is not the case, or you want to show the
 # methods anyway, you should set this option to NO.
 
 IDL_PROPERTY_SUPPORT   = YES
 
-# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC 
-# tag is set to YES, then doxygen will reuse the documentation of the first 
-# member in the group (if any) for the other members of the group. By default 
+# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
+# tag is set to YES, then doxygen will reuse the documentation of the first
+# member in the group (if any) for the other members of the group. By default
 # all members of a group must be documented explicitly.
 
 DISTRIBUTE_GROUP_DOC   = NO
 
-# Set the SUBGROUPING tag to YES (the default) to allow class member groups of 
-# the same type (for instance a group of public functions) to be put as a 
-# subgroup of that type (e.g. under the Public Functions section). Set it to 
-# NO to prevent subgrouping. Alternatively, this can be done per class using 
+# Set the SUBGROUPING tag to YES (the default) to allow class member groups of
+# the same type (for instance a group of public functions) to be put as a
+# subgroup of that type (e.g. under the Public Functions section). Set it to
+# NO to prevent subgrouping. Alternatively, this can be done per class using
 # the \nosubgrouping command.
 
 SUBGROUPING            = YES
 
-# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct, union, or enum 
-# is documented as struct, union, or enum with the name of the typedef. So 
-# typedef struct TypeS {} TypeT, will appear in the documentation as a struct 
-# with name TypeT. When disabled the typedef will appear as a member of a file, 
-# namespace, or class. And the struct will be named TypeS. This can typically 
-# be useful for C code in case the coding convention dictates that all compound 
+# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct, union, or enum
+# is documented as struct, union, or enum with the name of the typedef. So
+# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
+# with name TypeT. When disabled the typedef will appear as a member of a file,
+# namespace, or class. And the struct will be named TypeS. This can typically
+# be useful for C code in case the coding convention dictates that all compound
 # types are typedef'ed and only the typedef is referenced, never the tag name.
 
 TYPEDEF_HIDES_STRUCT   = NO
@@ -272,368 +272,368 @@
 # Build related configuration options
 #---------------------------------------------------------------------------
 
-# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in 
-# documentation are documented, even if no documentation was available. 
-# Private class members and static file members will be hidden unless 
+# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in
+# documentation are documented, even if no documentation was available.
+# Private class members and static file members will be hidden unless
 # the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
 
 EXTRACT_ALL            = YES
 
-# If the EXTRACT_PRIVATE tag is set to YES all private members of a class 
+# If the EXTRACT_PRIVATE tag is set to YES all private members of a class
 # will be included in the documentation.
 
 EXTRACT_PRIVATE        = NO
 
-# If the EXTRACT_STATIC tag is set to YES all static members of a file 
+# If the EXTRACT_STATIC tag is set to YES all static members of a file
 # will be included in the documentation.
 
 EXTRACT_STATIC         = NO
 
-# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) 
-# defined locally in source files will be included in the documentation. 
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs)
+# defined locally in source files will be included in the documentation.
 # If set to NO only classes defined in header files are included.
 
 EXTRACT_LOCAL_CLASSES  = YES
 
-# This flag is only useful for Objective-C code. When set to YES local 
-# methods, which are defined in the implementation section but not in 
-# the interface are included in the documentation. 
+# This flag is only useful for Objective-C code. When set to YES local
+# methods, which are defined in the implementation section but not in
+# the interface are included in the documentation.
 # If set to NO (the default) only methods in the interface are included.
 
 EXTRACT_LOCAL_METHODS  = NO
 
-# If this flag is set to YES, the members of anonymous namespaces will be 
-# extracted and appear in the documentation as a namespace called 
-# 'anonymous_namespace{file}', where file will be replaced with the base 
-# name of the file that contains the anonymous namespace. By default 
+# If this flag is set to YES, the members of anonymous namespaces will be
+# extracted and appear in the documentation as a namespace called
+# 'anonymous_namespace{file}', where file will be replaced with the base
+# name of the file that contains the anonymous namespace. By default
 # anonymous namespace are hidden.
 
 EXTRACT_ANON_NSPACES   = NO
 
-# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all 
-# undocumented members of documented classes, files or namespaces. 
-# If set to NO (the default) these members will be included in the 
-# various overviews, but no documentation section is generated. 
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all
+# undocumented members of documented classes, files or namespaces.
+# If set to NO (the default) these members will be included in the
+# various overviews, but no documentation section is generated.
 # This option has no effect if EXTRACT_ALL is enabled.
 
 HIDE_UNDOC_MEMBERS     = NO
 
-# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all 
-# undocumented classes that are normally visible in the class hierarchy. 
-# If set to NO (the default) these classes will be included in the various 
+# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all
+# undocumented classes that are normally visible in the class hierarchy.
+# If set to NO (the default) these classes will be included in the various
 # overviews. This option has no effect if EXTRACT_ALL is enabled.
 
 HIDE_UNDOC_CLASSES     = NO
 
-# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all 
-# friend (class|struct|union) declarations. 
-# If set to NO (the default) these declarations will be included in the 
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all
+# friend (class|struct|union) declarations.
+# If set to NO (the default) these declarations will be included in the
 # documentation.
 
 HIDE_FRIEND_COMPOUNDS  = NO
 
-# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any 
-# documentation blocks found inside the body of a function. 
-# If set to NO (the default) these blocks will be appended to the 
+# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any
+# documentation blocks found inside the body of a function.
+# If set to NO (the default) these blocks will be appended to the
 # function's detailed documentation block.
 
 HIDE_IN_BODY_DOCS      = NO
 
-# The INTERNAL_DOCS tag determines if documentation 
-# that is typed after a \internal command is included. If the tag is set 
-# to NO (the default) then the documentation will be excluded. 
+# The INTERNAL_DOCS tag determines if documentation
+# that is typed after a \internal command is included. If the tag is set
+# to NO (the default) then the documentation will be excluded.
 # Set it to YES to include the internal documentation.
 
 INTERNAL_DOCS          = NO
 
-# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate 
-# file names in lower-case letters. If set to YES upper-case letters are also 
-# allowed. This is useful if you have classes or files whose names only differ 
-# in case and if your file system supports case sensitive file names. Windows 
+# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate
+# file names in lower-case letters. If set to YES upper-case letters are also
+# allowed. This is useful if you have classes or files whose names only differ
+# in case and if your file system supports case sensitive file names. Windows
 # and Mac users are advised to set this option to NO.
 
 CASE_SENSE_NAMES       = YES
 
-# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen 
-# will show members with their full class and namespace scopes in the 
+# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen
+# will show members with their full class and namespace scopes in the
 # documentation. If set to YES the scope will be hidden.
 
 HIDE_SCOPE_NAMES       = NO
 
-# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen 
-# will put a list of the files that are included by a file in the documentation 
+# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen
+# will put a list of the files that are included by a file in the documentation
 # of that file.
 
 SHOW_INCLUDE_FILES     = YES
 
-# If the INLINE_INFO tag is set to YES (the default) then a tag [inline] 
+# If the INLINE_INFO tag is set to YES (the default) then a tag [inline]
 # is inserted in the documentation for inline members.
 
 INLINE_INFO            = YES
 
-# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen 
-# will sort the (detailed) documentation of file and class members 
-# alphabetically by member name. If set to NO the members will appear in 
+# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen
+# will sort the (detailed) documentation of file and class members
+# alphabetically by member name. If set to NO the members will appear in
 # declaration order.
 
 SORT_MEMBER_DOCS       = YES
 
-# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the 
-# brief documentation of file, namespace and class members alphabetically 
-# by member name. If set to NO (the default) the members will appear in 
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the
+# brief documentation of file, namespace and class members alphabetically
+# by member name. If set to NO (the default) the members will appear in
 # declaration order.
 
 SORT_BRIEF_DOCS        = NO
 
-# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the 
-# hierarchy of group names into alphabetical order. If set to NO (the default) 
+# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the
+# hierarchy of group names into alphabetical order. If set to NO (the default)
 # the group names will appear in their defined order.
 
 SORT_GROUP_NAMES       = NO
 
-# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be 
-# sorted by fully-qualified names, including namespaces. If set to 
-# NO (the default), the class list will be sorted only by class name, 
-# not including the namespace part. 
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be
+# sorted by fully-qualified names, including namespaces. If set to
+# NO (the default), the class list will be sorted only by class name,
+# not including the namespace part.
 # Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
-# Note: This option applies only to the class list, not to the 
+# Note: This option applies only to the class list, not to the
 # alphabetical list.
 
 SORT_BY_SCOPE_NAME     = NO
 
-# The GENERATE_TODOLIST tag can be used to enable (YES) or 
-# disable (NO) the todo list. This list is created by putting \todo 
+# The GENERATE_TODOLIST tag can be used to enable (YES) or
+# disable (NO) the todo list. This list is created by putting \todo
 # commands in the documentation.
 
 GENERATE_TODOLIST      = YES
 
-# The GENERATE_TESTLIST tag can be used to enable (YES) or 
-# disable (NO) the test list. This list is created by putting \test 
+# The GENERATE_TESTLIST tag can be used to enable (YES) or
+# disable (NO) the test list. This list is created by putting \test
 # commands in the documentation.
 
 GENERATE_TESTLIST      = YES
 
-# The GENERATE_BUGLIST tag can be used to enable (YES) or 
-# disable (NO) the bug list. This list is created by putting \bug 
+# The GENERATE_BUGLIST tag can be used to enable (YES) or
+# disable (NO) the bug list. This list is created by putting \bug
 # commands in the documentation.
 
 GENERATE_BUGLIST       = YES
 
-# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or 
-# disable (NO) the deprecated list. This list is created by putting 
+# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or
+# disable (NO) the deprecated list. This list is created by putting
 # \deprecated commands in the documentation.
 
 GENERATE_DEPRECATEDLIST= YES
 
-# The ENABLED_SECTIONS tag can be used to enable conditional 
+# The ENABLED_SECTIONS tag can be used to enable conditional
 # documentation sections, marked by \if sectionname ... \endif.
 
-ENABLED_SECTIONS       = 
+ENABLED_SECTIONS       =
 
-# The MAX_INITIALIZER_LINES tag determines the maximum number of lines 
-# the initial value of a variable or define consists of for it to appear in 
-# the documentation. If the initializer consists of more lines than specified 
-# here it will be hidden. Use a value of 0 to hide initializers completely. 
-# The appearance of the initializer of individual variables and defines in the 
-# documentation can be controlled using \showinitializer or \hideinitializer 
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines
+# the initial value of a variable or define consists of for it to appear in
+# the documentation. If the initializer consists of more lines than specified
+# here it will be hidden. Use a value of 0 to hide initializers completely.
+# The appearance of the initializer of individual variables and defines in the
+# documentation can be controlled using \showinitializer or \hideinitializer
 # command in the documentation regardless of this setting.
 
 MAX_INITIALIZER_LINES  = 30
 
-# Set the SHOW_USED_FILES tag to NO to disable the list of files generated 
-# at the bottom of the documentation of classes and structs. If set to YES the 
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated
+# at the bottom of the documentation of classes and structs. If set to YES the
 # list will mention the files that were used to generate the documentation.
 
 SHOW_USED_FILES        = YES
 
-# If the sources in your project are distributed over multiple directories 
-# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy 
+# If the sources in your project are distributed over multiple directories
+# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy
 # in the documentation. The default is NO.
 
 SHOW_DIRECTORIES       = NO
 
 # Set the SHOW_FILES tag to NO to disable the generation of the Files page.
-# This will remove the Files entry from the Quick Index and from the 
+# This will remove the Files entry from the Quick Index and from the
 # Folder Tree View (if specified). The default is YES.
 
 SHOW_FILES             = YES
 
-# Set the SHOW_NAMESPACES tag to NO to disable the generation of the 
+# Set the SHOW_NAMESPACES tag to NO to disable the generation of the
 # Namespaces page.  This will remove the Namespaces entry from the Quick Index
 # and from the Folder Tree View (if specified). The default is YES.
 
 SHOW_NAMESPACES        = YES
 
-# The FILE_VERSION_FILTER tag can be used to specify a program or script that 
-# doxygen should invoke to get the current version for each file (typically from 
-# the version control system). Doxygen will invoke the program by executing (via 
-# popen()) the command <command> <input-file>, where <command> is the value of 
-# the FILE_VERSION_FILTER tag, and <input-file> is the name of an input file 
-# provided by doxygen. Whatever the program writes to standard output 
+# The FILE_VERSION_FILTER tag can be used to specify a program or script that
+# doxygen should invoke to get the current version for each file (typically from
+# the version control system). Doxygen will invoke the program by executing (via
+# popen()) the command <command> <input-file>, where <command> is the value of
+# the FILE_VERSION_FILTER tag, and <input-file> is the name of an input file
+# provided by doxygen. Whatever the program writes to standard output
 # is used as the file version. See the manual for examples.
 
-FILE_VERSION_FILTER    = 
+FILE_VERSION_FILTER    =
 
 #---------------------------------------------------------------------------
 # configuration options related to warning and progress messages
 #---------------------------------------------------------------------------
 
-# The QUIET tag can be used to turn on/off the messages that are generated 
+# The QUIET tag can be used to turn on/off the messages that are generated
 # by doxygen. Possible values are YES and NO. If left blank NO is used.
 
 QUIET                  = NO
 
-# The WARNINGS tag can be used to turn on/off the warning messages that are 
-# generated by doxygen. Possible values are YES and NO. If left blank 
+# The WARNINGS tag can be used to turn on/off the warning messages that are
+# generated by doxygen. Possible values are YES and NO. If left blank
 # NO is used.
 
 WARNINGS               = YES
 
-# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings 
-# for undocumented members. If EXTRACT_ALL is set to YES then this flag will 
+# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings
+# for undocumented members. If EXTRACT_ALL is set to YES then this flag will
 # automatically be disabled.
 
 WARN_IF_UNDOCUMENTED   = YES
 
-# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for 
-# potential errors in the documentation, such as not documenting some 
-# parameters in a documented function, or documenting parameters that 
+# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for
+# potential errors in the documentation, such as not documenting some
+# parameters in a documented function, or documenting parameters that
 # don't exist or using markup commands wrongly.
 
 WARN_IF_DOC_ERROR      = YES
 
-# This WARN_NO_PARAMDOC option can be abled to get warnings for 
-# functions that are documented, but have no documentation for their parameters 
-# or return value. If set to NO (the default) doxygen will only warn about 
-# wrong or incomplete parameter documentation, but not about the absence of 
+# This WARN_NO_PARAMDOC option can be abled to get warnings for
+# functions that are documented, but have no documentation for their parameters
+# or return value. If set to NO (the default) doxygen will only warn about
+# wrong or incomplete parameter documentation, but not about the absence of
 # documentation.
 
 WARN_NO_PARAMDOC       = YES
 
-# The WARN_FORMAT tag determines the format of the warning messages that 
-# doxygen can produce. The string should contain the $file, $line, and $text 
-# tags, which will be replaced by the file and line number from which the 
-# warning originated and the warning text. Optionally the format may contain 
-# $version, which will be replaced by the version of the file (if it could 
+# The WARN_FORMAT tag determines the format of the warning messages that
+# doxygen can produce. The string should contain the $file, $line, and $text
+# tags, which will be replaced by the file and line number from which the
+# warning originated and the warning text. Optionally the format may contain
+# $version, which will be replaced by the version of the file (if it could
 # be obtained via FILE_VERSION_FILTER)
 
 WARN_FORMAT            = "$file:$line: $text"
 
-# The WARN_LOGFILE tag can be used to specify a file to which warning 
-# and error messages should be written. If left blank the output is written 
+# The WARN_LOGFILE tag can be used to specify a file to which warning
+# and error messages should be written. If left blank the output is written
 # to stderr.
 
-WARN_LOGFILE           = 
+WARN_LOGFILE           =
 
 #---------------------------------------------------------------------------
 # configuration options related to the input files
 #---------------------------------------------------------------------------
 
-# The INPUT tag can be used to specify the files and/or directories that contain 
-# documented source files. You may enter file names like "myfile.cpp" or 
-# directories like "/usr/src/myproject". Separate the files or directories 
+# The INPUT tag can be used to specify the files and/or directories that contain
+# documented source files. You may enter file names like "myfile.cpp" or
+# directories like "/usr/src/myproject". Separate the files or directories
 # with spaces.
 
 INPUT                  = crypto curses drivers i386 include libc
 
-# This tag can be used to specify the character encoding of the source files 
-# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is 
-# also the default input encoding. Doxygen uses libiconv (or the iconv built 
-# into libc) for the transcoding. See http://www.gnu.org/software/libiconv for 
+# This tag can be used to specify the character encoding of the source files
+# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is
+# also the default input encoding. Doxygen uses libiconv (or the iconv built
+# into libc) for the transcoding. See http://www.gnu.org/software/libiconv for
 # the list of possible encodings.
 
 INPUT_ENCODING         = UTF-8
 
-# If the value of the INPUT tag contains directories, you can use the 
-# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp 
-# and *.h) to filter out the source-files in the directories. If left 
-# blank the following patterns are tested: 
-# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx 
+# If the value of the INPUT tag contains directories, you can use the
+# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
+# and *.h) to filter out the source-files in the directories. If left
+# blank the following patterns are tested:
+# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx
 # *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.py *.f90
 
 FILE_PATTERNS          = *.c *.h
 
-# The RECURSIVE tag can be used to turn specify whether or not subdirectories 
-# should be searched for input files as well. Possible values are YES and NO. 
+# The RECURSIVE tag can be used to turn specify whether or not subdirectories
+# should be searched for input files as well. Possible values are YES and NO.
 # If left blank NO is used.
 
 RECURSIVE              = YES
 
-# The EXCLUDE tag can be used to specify files and/or directories that should 
-# excluded from the INPUT source files. This way you can easily exclude a 
+# The EXCLUDE tag can be used to specify files and/or directories that should
+# excluded from the INPUT source files. This way you can easily exclude a
 # subdirectory from a directory tree whose root is specified with the INPUT tag.
 
 EXCLUDE                =
 
-# The EXCLUDE_SYMLINKS tag can be used select whether or not files or 
-# directories that are symbolic links (a Unix filesystem feature) are excluded 
+# The EXCLUDE_SYMLINKS tag can be used select whether or not files or
+# directories that are symbolic links (a Unix filesystem feature) are excluded
 # from the input.
 
 EXCLUDE_SYMLINKS       = NO
 
-# If the value of the INPUT tag contains directories, you can use the 
-# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude 
-# certain files from those directories. Note that the wildcards are matched 
-# against the file with absolute path, so to exclude all test directories 
+# If the value of the INPUT tag contains directories, you can use the
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
+# certain files from those directories. Note that the wildcards are matched
+# against the file with absolute path, so to exclude all test directories
 # for example use the pattern */test/*
 
 EXCLUDE_PATTERNS       = */.svn*
 
-# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names 
-# (namespaces, classes, functions, etc.) that should be excluded from the 
-# output. The symbol name can be a fully qualified name, a word, or if the 
-# wildcard * is used, a substring. Examples: ANamespace, AClass, 
+# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
+# (namespaces, classes, functions, etc.) that should be excluded from the
+# output. The symbol name can be a fully qualified name, a word, or if the
+# wildcard * is used, a substring. Examples: ANamespace, AClass,
 # AClass::ANamespace, ANamespace::*Test
 
-EXCLUDE_SYMBOLS        = 
+EXCLUDE_SYMBOLS        =
 
-# The EXAMPLE_PATH tag can be used to specify one or more files or 
-# directories that contain example code fragments that are included (see 
+# The EXAMPLE_PATH tag can be used to specify one or more files or
+# directories that contain example code fragments that are included (see
 # the \include command).
 
 EXAMPLE_PATH           = sample
 
-# If the value of the EXAMPLE_PATH tag contains directories, you can use the 
-# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp 
-# and *.h) to filter out the source-files in the directories. If left 
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
+# and *.h) to filter out the source-files in the directories. If left
 # blank all files are included.
 
-EXAMPLE_PATTERNS       = 
+EXAMPLE_PATTERNS       =
 
-# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be 
-# searched for input files to be used with the \include or \dontinclude 
-# commands irrespective of the value of the RECURSIVE tag. 
+# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
+# searched for input files to be used with the \include or \dontinclude
+# commands irrespective of the value of the RECURSIVE tag.
 # Possible values are YES and NO. If left blank NO is used.
 
 EXAMPLE_RECURSIVE      = NO
 
-# The IMAGE_PATH tag can be used to specify one or more files or 
-# directories that contain image that are included in the documentation (see 
+# The IMAGE_PATH tag can be used to specify one or more files or
+# directories that contain image that are included in the documentation (see
 # the \image command).
 
-IMAGE_PATH             = 
+IMAGE_PATH             =
 
-# The INPUT_FILTER tag can be used to specify a program that doxygen should 
-# invoke to filter for each input file. Doxygen will invoke the filter program 
-# by executing (via popen()) the command <filter> <input-file>, where <filter> 
-# is the value of the INPUT_FILTER tag, and <input-file> is the name of an 
-# input file. Doxygen will then use the output that the filter program writes 
-# to standard output.  If FILTER_PATTERNS is specified, this tag will be 
+# The INPUT_FILTER tag can be used to specify a program that doxygen should
+# invoke to filter for each input file. Doxygen will invoke the filter program
+# by executing (via popen()) the command <filter> <input-file>, where <filter>
+# is the value of the INPUT_FILTER tag, and <input-file> is the name of an
+# input file. Doxygen will then use the output that the filter program writes
+# to standard output.  If FILTER_PATTERNS is specified, this tag will be
 # ignored.
 
-INPUT_FILTER           = 
+INPUT_FILTER           =
 
-# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern 
-# basis.  Doxygen will compare the file name with each pattern and apply the 
-# filter if there is a match.  The filters are a list of the form: 
-# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further 
-# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER 
+# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
+# basis.  Doxygen will compare the file name with each pattern and apply the
+# filter if there is a match.  The filters are a list of the form:
+# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further
+# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER
 # is applied to all files.
 
-FILTER_PATTERNS        = 
+FILTER_PATTERNS        =
 
-# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using 
-# INPUT_FILTER) will be used to filter the input files when producing source 
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
+# INPUT_FILTER) will be used to filter the input files when producing source
 # files to browse (i.e. when SOURCE_BROWSER is set to YES).
 
 FILTER_SOURCE_FILES    = NO
@@ -642,32 +642,32 @@
 # configuration options related to source browsing
 #---------------------------------------------------------------------------
 
-# If the SOURCE_BROWSER tag is set to YES then a list of source files will 
-# be generated. Documented entities will be cross-referenced with these sources. 
-# Note: To get rid of all source code in the generated output, make sure also 
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will
+# be generated. Documented entities will be cross-referenced with these sources.
+# Note: To get rid of all source code in the generated output, make sure also
 # VERBATIM_HEADERS is set to NO.
 
 SOURCE_BROWSER         = YES
 
-# Setting the INLINE_SOURCES tag to YES will include the body 
+# Setting the INLINE_SOURCES tag to YES will include the body
 # of functions and classes directly in the documentation.
 
 INLINE_SOURCES         = NO
 
-# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct 
-# doxygen to hide any special comment blocks from generated source code 
+# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
+# doxygen to hide any special comment blocks from generated source code
 # fragments. Normal C and C++ comments will always remain visible.
 
 STRIP_CODE_COMMENTS    = NO
 
-# If the REFERENCED_BY_RELATION tag is set to YES 
-# then for each documented function all documented 
+# If the REFERENCED_BY_RELATION tag is set to YES
+# then for each documented function all documented
 # functions referencing it will be listed.
 
 REFERENCED_BY_RELATION = YES
 
-# If the REFERENCES_RELATION tag is set to YES 
-# then for each documented function all documented entities 
+# If the REFERENCES_RELATION tag is set to YES
+# then for each documented function all documented entities
 # called/used by that function will be listed.
 
 REFERENCES_RELATION    = YES
@@ -679,16 +679,16 @@
 
 REFERENCES_LINK_SOURCE = YES
 
-# If the USE_HTAGS tag is set to YES then the references to source code 
-# will point to the HTML generated by the htags(1) tool instead of doxygen 
-# built-in source browser. The htags tool is part of GNU's global source 
-# tagging system (see http://www.gnu.org/software/global/global.html). You 
+# If the USE_HTAGS tag is set to YES then the references to source code
+# will point to the HTML generated by the htags(1) tool instead of doxygen
+# built-in source browser. The htags tool is part of GNU's global source
+# tagging system (see http://www.gnu.org/software/global/global.html). You
 # will need version 4.8.6 or higher.
 
 USE_HTAGS              = NO
 
-# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen 
-# will generate a verbatim copy of the header file for each class for 
+# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen
+# will generate a verbatim copy of the header file for each class for
 # which an include is specified. Set to NO to disable this.
 
 VERBATIM_HEADERS       = YES
@@ -697,129 +697,129 @@
 # configuration options related to the alphabetical class index
 #---------------------------------------------------------------------------
 
-# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index 
-# of all compounds will be generated. Enable this if the project 
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index
+# of all compounds will be generated. Enable this if the project
 # contains a lot of classes, structs, unions or interfaces.
 
 ALPHABETICAL_INDEX     = YES
 
-# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then 
-# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns 
+# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then
+# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns
 # in which this list will be split (can be a number in the range [1..20])
 
 COLS_IN_ALPHA_INDEX    = 5
 
-# In case all classes in a project start with a common prefix, all 
-# classes will be put under the same header in the alphabetical index. 
-# The IGNORE_PREFIX tag can be used to specify one or more prefixes that 
+# In case all classes in a project start with a common prefix, all
+# classes will be put under the same header in the alphabetical index.
+# The IGNORE_PREFIX tag can be used to specify one or more prefixes that
 # should be ignored while generating the index headers.
 
-IGNORE_PREFIX          = 
+IGNORE_PREFIX          =
 
 #---------------------------------------------------------------------------
 # configuration options related to the HTML output
 #---------------------------------------------------------------------------
 
-# If the GENERATE_HTML tag is set to YES (the default) Doxygen will 
+# If the GENERATE_HTML tag is set to YES (the default) Doxygen will
 # generate HTML output.
 
 GENERATE_HTML          = YES
 
-# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. 
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
 # put in front of it. If left blank `html' will be used as the default path.
 
 HTML_OUTPUT            = html
 
-# The HTML_FILE_EXTENSION tag can be used to specify the file extension for 
-# each generated HTML page (for example: .htm,.php,.asp). If it is left blank 
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for
+# each generated HTML page (for example: .htm,.php,.asp). If it is left blank
 # doxygen will generate files with .html extension.
 
 HTML_FILE_EXTENSION    = .html
 
-# The HTML_HEADER tag can be used to specify a personal HTML header for 
-# each generated HTML page. If it is left blank doxygen will generate a 
+# The HTML_HEADER tag can be used to specify a personal HTML header for
+# each generated HTML page. If it is left blank doxygen will generate a
 # standard header.
 
-HTML_HEADER            = 
+HTML_HEADER            =
 
-# The HTML_FOOTER tag can be used to specify a personal HTML footer for 
-# each generated HTML page. If it is left blank doxygen will generate a 
+# The HTML_FOOTER tag can be used to specify a personal HTML footer for
+# each generated HTML page. If it is left blank doxygen will generate a
 # standard footer.
 
-HTML_FOOTER            = 
+HTML_FOOTER            =
 
-# The HTML_STYLESHEET tag can be used to specify a user-defined cascading 
-# style sheet that is used by each HTML page. It can be used to 
-# fine-tune the look of the HTML output. If the tag is left blank doxygen 
-# will generate a default style sheet. Note that doxygen will try to copy 
-# the style sheet file to the HTML output directory, so don't put your own 
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading
+# style sheet that is used by each HTML page. It can be used to
+# fine-tune the look of the HTML output. If the tag is left blank doxygen
+# will generate a default style sheet. Note that doxygen will try to copy
+# the style sheet file to the HTML output directory, so don't put your own
 # stylesheet in the HTML output directory as well, or it will be erased!
 
-HTML_STYLESHEET        = 
+HTML_STYLESHEET        =
 
-# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, 
-# files or namespaces will be aligned in HTML using tables. If set to 
+# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes,
+# files or namespaces will be aligned in HTML using tables. If set to
 # NO a bullet list will be used.
 
 HTML_ALIGN_MEMBERS     = YES
 
-# If the GENERATE_HTMLHELP tag is set to YES, additional index files 
-# will be generated that can be used as input for tools like the 
-# Microsoft HTML help workshop to generate a compiled HTML help file (.chm) 
+# If the GENERATE_HTMLHELP tag is set to YES, additional index files
+# will be generated that can be used as input for tools like the
+# Microsoft HTML help workshop to generate a compiled HTML help file (.chm)
 # of the generated HTML documentation.
 
 GENERATE_HTMLHELP      = NO
 
-# If the GENERATE_DOCSET tag is set to YES, additional index files 
-# will be generated that can be used as input for Apple's Xcode 3 
-# integrated development environment, introduced with OSX 10.5 (Leopard). 
-# To create a documentation set, doxygen will generate a Makefile in the 
-# HTML output directory. Running make will produce the docset in that 
-# directory and running "make install" will install the docset in 
-# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find 
+# If the GENERATE_DOCSET tag is set to YES, additional index files
+# will be generated that can be used as input for Apple's Xcode 3
+# integrated development environment, introduced with OSX 10.5 (Leopard).
+# To create a documentation set, doxygen will generate a Makefile in the
+# HTML output directory. Running make will produce the docset in that
+# directory and running "make install" will install the docset in
+# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find
 # it at startup.
 
 GENERATE_DOCSET        = NO
 
-# When GENERATE_DOCSET tag is set to YES, this tag determines the name of the 
-# feed. A documentation feed provides an umbrella under which multiple 
-# documentation sets from a single provider (such as a company or product suite) 
+# When GENERATE_DOCSET tag is set to YES, this tag determines the name of the
+# feed. A documentation feed provides an umbrella under which multiple
+# documentation sets from a single provider (such as a company or product suite)
 # can be grouped.
 
 DOCSET_FEEDNAME        = "Doxygen generated docs"
 
-# When GENERATE_DOCSET tag is set to YES, this tag specifies a string that 
-# should uniquely identify the documentation set bundle. This should be a 
-# reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen 
+# When GENERATE_DOCSET tag is set to YES, this tag specifies a string that
+# should uniquely identify the documentation set bundle. This should be a
+# reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen
 # will append .docset to the name.
 
 DOCSET_BUNDLE_ID       = org.doxygen.Project
 
-# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML 
-# documentation will contain sections that can be hidden and shown after the 
-# page has loaded. For this to work a browser that supports 
-# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox 
+# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
+# documentation will contain sections that can be hidden and shown after the
+# page has loaded. For this to work a browser that supports
+# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox
 # Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari).
 
 HTML_DYNAMIC_SECTIONS  = NO
 
-# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can 
-# be used to specify the file name of the resulting .chm file. You 
-# can add a path in front of the file if the result should not be 
+# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can
+# be used to specify the file name of the resulting .chm file. You
+# can add a path in front of the file if the result should not be
 # written to the html output directory.
 
-CHM_FILE               = 
+CHM_FILE               =
 
-# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can 
-# be used to specify the location (absolute path including file name) of 
-# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run 
+# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can
+# be used to specify the location (absolute path including file name) of
+# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run
 # the HTML help compiler on the generated index.hhp.
 
-HHC_LOCATION           = 
+HHC_LOCATION           =
 
-# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag 
-# controls if a separate .chi index file is generated (YES) or that 
+# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag
+# controls if a separate .chi index file is generated (YES) or that
 # it should be included in the master .chm file (NO).
 
 GENERATE_CHI           = NO
@@ -828,26 +828,26 @@
 # is used to encode HtmlHelp index (hhk), content (hhc) and project file
 # content.
 
-CHM_INDEX_ENCODING     = 
+CHM_INDEX_ENCODING     =
 
-# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag 
-# controls whether a binary table of contents is generated (YES) or a 
+# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag
+# controls whether a binary table of contents is generated (YES) or a
 # normal table of contents (NO) in the .chm file.
 
 BINARY_TOC             = NO
 
-# The TOC_EXPAND flag can be set to YES to add extra items for group members 
+# The TOC_EXPAND flag can be set to YES to add extra items for group members
 # to the contents of the HTML help documentation and to the tree view.
 
 TOC_EXPAND             = NO
 
-# The DISABLE_INDEX tag can be used to turn on/off the condensed index at 
-# top of each HTML page. The value NO (the default) enables the index and 
+# The DISABLE_INDEX tag can be used to turn on/off the condensed index at
+# top of each HTML page. The value NO (the default) enables the index and
 # the value YES disables it.
 
 DISABLE_INDEX          = NO
 
-# This tag can be used to set the number of enum values (range [1..20]) 
+# This tag can be used to set the number of enum values (range [1..20])
 # that doxygen will group on one line in the generated HTML documentation.
 
 ENUM_VALUES_PER_LINE   = 4
@@ -855,11 +855,11 @@
 # The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
 # structure should be generated to display hierarchical information.
 # If the tag value is set to FRAME, a side panel will be generated
-# containing a tree-like index structure (just like the one that 
-# is generated for HTML Help). For this to work a browser that supports 
-# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+, 
-# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are 
-# probably better off using the HTML help feature. Other possible values 
+# containing a tree-like index structure (just like the one that
+# is generated for HTML Help). For this to work a browser that supports
+# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+,
+# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are
+# probably better off using the HTML help feature. Other possible values
 # for this tag are: HIERARCHIES, which will generate the Groups, Directories,
 # and Class Hiererachy pages using a tree view instead of an ordered list;
 # ALL, which combines the behavior of FRAME and HIERARCHIES; and NONE, which
@@ -869,16 +869,16 @@
 
 GENERATE_TREEVIEW      = ALL
 
-# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be 
-# used to set the initial width (in pixels) of the frame in which the tree 
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be
+# used to set the initial width (in pixels) of the frame in which the tree
 # is shown.
 
 TREEVIEW_WIDTH         = 250
 
-# Use this tag to change the font size of Latex formulas included 
-# as images in the HTML documentation. The default is 10. Note that 
-# when you change the font size after a successful doxygen run you need 
-# to manually remove any form_*.png images from the HTML output directory 
+# Use this tag to change the font size of Latex formulas included
+# as images in the HTML documentation. The default is 10. Note that
+# when you change the font size after a successful doxygen run you need
+# to manually remove any form_*.png images from the HTML output directory
 # to force them to be regenerated.
 
 FORMULA_FONTSIZE       = 10
@@ -887,74 +887,74 @@
 # configuration options related to the LaTeX output
 #---------------------------------------------------------------------------
 
-# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will 
+# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will
 # generate Latex output.
 
 GENERATE_LATEX         = NO
 
-# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. 
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
 # put in front of it. If left blank `latex' will be used as the default path.
 
 LATEX_OUTPUT           = latex
 
-# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be 
+# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
 # invoked. If left blank `latex' will be used as the default command name.
 
 LATEX_CMD_NAME         = latex
 
-# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to 
-# generate index for LaTeX. If left blank `makeindex' will be used as the 
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to
+# generate index for LaTeX. If left blank `makeindex' will be used as the
 # default command name.
 
 MAKEINDEX_CMD_NAME     = makeindex
 
-# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact 
-# LaTeX documents. This may be useful for small projects and may help to 
+# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact
+# LaTeX documents. This may be useful for small projects and may help to
 # save some trees in general.
 
 COMPACT_LATEX          = NO
 
-# The PAPER_TYPE tag can be used to set the paper type that is used 
-# by the printer. Possible values are: a4, a4wide, letter, legal and 
+# The PAPER_TYPE tag can be used to set the paper type that is used
+# by the printer. Possible values are: a4, a4wide, letter, legal and
 # executive. If left blank a4wide will be used.
 
 PAPER_TYPE             = a4wide
 
-# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX 
+# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX
 # packages that should be included in the LaTeX output.
 
-EXTRA_PACKAGES         = 
+EXTRA_PACKAGES         =
 
-# The LATEX_HEADER tag can be used to specify a personal LaTeX header for 
-# the generated latex document. The header should contain everything until 
-# the first chapter. If it is left blank doxygen will generate a 
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for
+# the generated latex document. The header should contain everything until
+# the first chapter. If it is left blank doxygen will generate a
 # standard header. Notice: only use this tag if you know what you are doing!
 
-LATEX_HEADER           = 
+LATEX_HEADER           =
 
-# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated 
-# is prepared for conversion to pdf (using ps2pdf). The pdf file will 
-# contain links (just like the HTML output) instead of page references 
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated
+# is prepared for conversion to pdf (using ps2pdf). The pdf file will
+# contain links (just like the HTML output) instead of page references
 # This makes the output suitable for online browsing using a pdf viewer.
 
 PDF_HYPERLINKS         = YES
 
-# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of 
-# plain latex in the generated Makefile. Set this option to YES to get a 
+# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of
+# plain latex in the generated Makefile. Set this option to YES to get a
 # higher quality PDF documentation.
 
 USE_PDFLATEX           = YES
 
-# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. 
-# command to the generated LaTeX files. This will instruct LaTeX to keep 
-# running if errors occur, instead of asking the user for help. 
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode.
+# command to the generated LaTeX files. This will instruct LaTeX to keep
+# running if errors occur, instead of asking the user for help.
 # This option is also used when generating formulas in HTML.
 
 LATEX_BATCHMODE        = NO
 
-# If LATEX_HIDE_INDICES is set to YES then doxygen will not 
-# include the index chapters (such as File Index, Compound Index, etc.) 
+# If LATEX_HIDE_INDICES is set to YES then doxygen will not
+# include the index chapters (such as File Index, Compound Index, etc.)
 # in the output.
 
 LATEX_HIDE_INDICES     = NO
@@ -963,68 +963,68 @@
 # configuration options related to the RTF output
 #---------------------------------------------------------------------------
 
-# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output 
-# The RTF output is optimized for Word 97 and may not look very pretty with 
+# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output
+# The RTF output is optimized for Word 97 and may not look very pretty with
 # other RTF readers or editors.
 
 GENERATE_RTF           = NO
 
-# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. 
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
 # put in front of it. If left blank `rtf' will be used as the default path.
 
 RTF_OUTPUT             = rtf
 
-# If the COMPACT_RTF tag is set to YES Doxygen generates more compact 
-# RTF documents. This may be useful for small projects and may help to 
+# If the COMPACT_RTF tag is set to YES Doxygen generates more compact
+# RTF documents. This may be useful for small projects and may help to
 # save some trees in general.
 
 COMPACT_RTF            = NO
 
-# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated 
-# will contain hyperlink fields. The RTF file will 
-# contain links (just like the HTML output) instead of page references. 
-# This makes the output suitable for online browsing using WORD or other 
-# programs which support those fields. 
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated
+# will contain hyperlink fields. The RTF file will
+# contain links (just like the HTML output) instead of page references.
+# This makes the output suitable for online browsing using WORD or other
+# programs which support those fields.
 # Note: wordpad (write) and others do not support links.
 
 RTF_HYPERLINKS         = NO
 
-# Load stylesheet definitions from file. Syntax is similar to doxygen's 
-# config file, i.e. a series of assignments. You only have to provide 
+# Load stylesheet definitions from file. Syntax is similar to doxygen's
+# config file, i.e. a series of assignments. You only have to provide
 # replacements, missing definitions are set to their default value.
 
-RTF_STYLESHEET_FILE    = 
+RTF_STYLESHEET_FILE    =
 
-# Set optional variables used in the generation of an rtf document. 
+# Set optional variables used in the generation of an rtf document.
 # Syntax is similar to doxygen's config file.
 
-RTF_EXTENSIONS_FILE    = 
+RTF_EXTENSIONS_FILE    =
 
 #---------------------------------------------------------------------------
 # configuration options related to the man page output
 #---------------------------------------------------------------------------
 
-# If the GENERATE_MAN tag is set to YES (the default) Doxygen will 
+# If the GENERATE_MAN tag is set to YES (the default) Doxygen will
 # generate man pages
 
 GENERATE_MAN           = NO
 
-# The MAN_OUTPUT tag is used to specify where the man pages will be put. 
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# The MAN_OUTPUT tag is used to specify where the man pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
 # put in front of it. If left blank `man' will be used as the default path.
 
 MAN_OUTPUT             = man
 
-# The MAN_EXTENSION tag determines the extension that is added to 
+# The MAN_EXTENSION tag determines the extension that is added to
 # the generated man pages (default is the subroutine's section .3)
 
 MAN_EXTENSION          = .3
 
-# If the MAN_LINKS tag is set to YES and Doxygen generates man output, 
-# then it will generate one additional man file for each entity 
-# documented in the real man page(s). These additional files 
-# only source the real man page, but without them the man command 
+# If the MAN_LINKS tag is set to YES and Doxygen generates man output,
+# then it will generate one additional man file for each entity
+# documented in the real man page(s). These additional files
+# only source the real man page, but without them the man command
 # would be unable to find the correct page. The default is NO.
 
 MAN_LINKS              = NO
@@ -1033,33 +1033,33 @@
 # configuration options related to the XML output
 #---------------------------------------------------------------------------
 
-# If the GENERATE_XML tag is set to YES Doxygen will 
-# generate an XML file that captures the structure of 
+# If the GENERATE_XML tag is set to YES Doxygen will
+# generate an XML file that captures the structure of
 # the code including all documentation.
 
 GENERATE_XML           = NO
 
-# The XML_OUTPUT tag is used to specify where the XML pages will be put. 
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be 
+# The XML_OUTPUT tag is used to specify where the XML pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
 # put in front of it. If left blank `xml' will be used as the default path.
 
 XML_OUTPUT             = xml
 
-# The XML_SCHEMA tag can be used to specify an XML schema, 
-# which can be used by a validating XML parser to check the 
+# The XML_SCHEMA tag can be used to specify an XML schema,
+# which can be used by a validating XML parser to check the
 # syntax of the XML files.
 
-XML_SCHEMA             = 
+XML_SCHEMA             =
 
-# The XML_DTD tag can be used to specify an XML DTD, 
-# which can be used by a validating XML parser to check the 
+# The XML_DTD tag can be used to specify an XML DTD,
+# which can be used by a validating XML parser to check the
 # syntax of the XML files.
 
-XML_DTD                = 
+XML_DTD                =
 
-# If the XML_PROGRAMLISTING tag is set to YES Doxygen will 
-# dump the program listings (including syntax highlighting 
-# and cross-referencing information) to the XML output. Note that 
+# If the XML_PROGRAMLISTING tag is set to YES Doxygen will
+# dump the program listings (including syntax highlighting
+# and cross-referencing information) to the XML output. Note that
 # enabling this will significantly increase the size of the XML output.
 
 XML_PROGRAMLISTING     = YES
@@ -1068,10 +1068,10 @@
 # configuration options for the AutoGen Definitions output
 #---------------------------------------------------------------------------
 
-# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will 
-# generate an AutoGen Definitions (see autogen.sf.net) file 
-# that captures the structure of the code including all 
-# documentation. Note that this feature is still experimental 
+# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will
+# generate an AutoGen Definitions (see autogen.sf.net) file
+# that captures the structure of the code including all
+# documentation. Note that this feature is still experimental
 # and incomplete at the moment.
 
 GENERATE_AUTOGEN_DEF   = NO
@@ -1080,338 +1080,338 @@
 # configuration options related to the Perl module output
 #---------------------------------------------------------------------------
 
-# If the GENERATE_PERLMOD tag is set to YES Doxygen will 
-# generate a Perl module file that captures the structure of 
-# the code including all documentation. Note that this 
-# feature is still experimental and incomplete at the 
+# If the GENERATE_PERLMOD tag is set to YES Doxygen will
+# generate a Perl module file that captures the structure of
+# the code including all documentation. Note that this
+# feature is still experimental and incomplete at the
 # moment.
 
 GENERATE_PERLMOD       = NO
 
-# If the PERLMOD_LATEX tag is set to YES Doxygen will generate 
-# the necessary Makefile rules, Perl scripts and LaTeX code to be able 
+# If the PERLMOD_LATEX tag is set to YES Doxygen will generate
+# the necessary Makefile rules, Perl scripts and LaTeX code to be able
 # to generate PDF and DVI output from the Perl module output.
 
 PERLMOD_LATEX          = NO
 
-# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be 
-# nicely formatted so it can be parsed by a human reader.  This is useful 
-# if you want to understand what is going on.  On the other hand, if this 
-# tag is set to NO the size of the Perl module output will be much smaller 
+# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be
+# nicely formatted so it can be parsed by a human reader.  This is useful
+# if you want to understand what is going on.  On the other hand, if this
+# tag is set to NO the size of the Perl module output will be much smaller
 # and Perl will parse it just the same.
 
 PERLMOD_PRETTY         = YES
 
-# The names of the make variables in the generated doxyrules.make file 
-# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. 
-# This is useful so different doxyrules.make files included by the same 
+# The names of the make variables in the generated doxyrules.make file
+# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX.
+# This is useful so different doxyrules.make files included by the same
 # Makefile don't overwrite each other's variables.
 
-PERLMOD_MAKEVAR_PREFIX = 
+PERLMOD_MAKEVAR_PREFIX =
 
 #---------------------------------------------------------------------------
-# Configuration options related to the preprocessor   
+# Configuration options related to the preprocessor
 #---------------------------------------------------------------------------
 
-# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will 
-# evaluate all C-preprocessor directives found in the sources and include 
+# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will
+# evaluate all C-preprocessor directives found in the sources and include
 # files.
 
 ENABLE_PREPROCESSING   = YES
 
-# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro 
-# names in the source code. If set to NO (the default) only conditional 
-# compilation will be performed. Macro expansion can be done in a controlled 
+# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro
+# names in the source code. If set to NO (the default) only conditional
+# compilation will be performed. Macro expansion can be done in a controlled
 # way by setting EXPAND_ONLY_PREDEF to YES.
 
 MACRO_EXPANSION        = NO
 
-# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES 
-# then the macro expansion is limited to the macros specified with the 
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES
+# then the macro expansion is limited to the macros specified with the
 # PREDEFINED and EXPAND_AS_DEFINED tags.
 
 EXPAND_ONLY_PREDEF     = NO
 
-# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files 
+# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files
 # in the INCLUDE_PATH (see below) will be search if a #include is found.
 
 SEARCH_INCLUDES        = YES
 
-# The INCLUDE_PATH tag can be used to specify one or more directories that 
-# contain include files that are not input files but should be processed by 
+# The INCLUDE_PATH tag can be used to specify one or more directories that
+# contain include files that are not input files but should be processed by
 # the preprocessor.
 
-INCLUDE_PATH           = 
+INCLUDE_PATH           =
 
-# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard 
-# patterns (like *.h and *.hpp) to filter out the header-files in the 
-# directories. If left blank, the patterns specified with FILE_PATTERNS will 
+# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
+# patterns (like *.h and *.hpp) to filter out the header-files in the
+# directories. If left blank, the patterns specified with FILE_PATTERNS will
 # be used.
 
-INCLUDE_FILE_PATTERNS  = 
+INCLUDE_FILE_PATTERNS  =
 
-# The PREDEFINED tag can be used to specify one or more macro names that 
-# are defined before the preprocessor is started (similar to the -D option of 
-# gcc). The argument of the tag is a list of macros of the form: name 
-# or name=definition (no spaces). If the definition and the = are 
-# omitted =1 is assumed. To prevent a macro definition from being 
-# undefined via #undef or recursively expanded use the := operator 
+# The PREDEFINED tag can be used to specify one or more macro names that
+# are defined before the preprocessor is started (similar to the -D option of
+# gcc). The argument of the tag is a list of macros of the form: name
+# or name=definition (no spaces). If the definition and the = are
+# omitted =1 is assumed. To prevent a macro definition from being
+# undefined via #undef or recursively expanded use the := operator
 # instead of the = operator.
 
-PREDEFINED             = 
+PREDEFINED             =
 
-# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then 
-# this tag can be used to specify a list of macro names that should be expanded. 
-# The macro definition that is found in the sources will be used. 
+# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then
+# this tag can be used to specify a list of macro names that should be expanded.
+# The macro definition that is found in the sources will be used.
 # Use the PREDEFINED tag if you want to use a different macro definition.
 
-EXPAND_AS_DEFINED      = 
+EXPAND_AS_DEFINED      =
 
-# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then 
-# doxygen's preprocessor will remove all function-like macros that are alone 
-# on a line, have an all uppercase name, and do not end with a semicolon. Such 
-# function macros are typically used for boiler-plate code, and will confuse 
+# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then
+# doxygen's preprocessor will remove all function-like macros that are alone
+# on a line, have an all uppercase name, and do not end with a semicolon. Such
+# function macros are typically used for boiler-plate code, and will confuse
 # the parser if not removed.
 
 SKIP_FUNCTION_MACROS   = YES
 
 #---------------------------------------------------------------------------
-# Configuration::additions related to external references   
+# Configuration::additions related to external references
 #---------------------------------------------------------------------------
 
-# The TAGFILES option can be used to specify one or more tagfiles. 
-# Optionally an initial location of the external documentation 
-# can be added for each tagfile. The format of a tag file without 
-# this location is as follows: 
-#   TAGFILES = file1 file2 ... 
-# Adding location for the tag files is done as follows: 
-#   TAGFILES = file1=loc1 "file2 = loc2" ... 
-# where "loc1" and "loc2" can be relative or absolute paths or 
-# URLs. If a location is present for each tag, the installdox tool 
+# The TAGFILES option can be used to specify one or more tagfiles.
+# Optionally an initial location of the external documentation
+# can be added for each tagfile. The format of a tag file without
+# this location is as follows:
+#   TAGFILES = file1 file2 ...
+# Adding location for the tag files is done as follows:
+#   TAGFILES = file1=loc1 "file2 = loc2" ...
+# where "loc1" and "loc2" can be relative or absolute paths or
+# URLs. If a location is present for each tag, the installdox tool
 # does not have to be run to correct the links.
 # Note that each tag file must have a unique name
 # (where the name does NOT include the path)
-# If a tag file is not located in the directory in which doxygen 
+# If a tag file is not located in the directory in which doxygen
 # is run, you must also specify the path to the tagfile here.
 
-TAGFILES               = 
+TAGFILES               =
 
-# When a file name is specified after GENERATE_TAGFILE, doxygen will create 
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create
 # a tag file that is based on the input files it reads.
 
-GENERATE_TAGFILE       = 
+GENERATE_TAGFILE       =
 
-# If the ALLEXTERNALS tag is set to YES all external classes will be listed 
-# in the class index. If set to NO only the inherited external classes 
+# If the ALLEXTERNALS tag is set to YES all external classes will be listed
+# in the class index. If set to NO only the inherited external classes
 # will be listed.
 
 ALLEXTERNALS           = NO
 
-# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed 
-# in the modules index. If set to NO, only the current project's groups will 
+# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed
+# in the modules index. If set to NO, only the current project's groups will
 # be listed.
 
 EXTERNAL_GROUPS        = YES
 
-# The PERL_PATH should be the absolute path and name of the perl script 
+# The PERL_PATH should be the absolute path and name of the perl script
 # interpreter (i.e. the result of `which perl').
 
 PERL_PATH              = /usr/bin/perl
 
 #---------------------------------------------------------------------------
-# Configuration options related to the dot tool   
+# Configuration options related to the dot tool
 #---------------------------------------------------------------------------
 
-# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will 
-# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base 
-# or super classes. Setting the tag to NO turns the diagrams off. Note that 
-# this option is superseded by the HAVE_DOT option below. This is only a 
-# fallback. It is recommended to install and use dot, since it yields more 
+# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will
+# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base
+# or super classes. Setting the tag to NO turns the diagrams off. Note that
+# this option is superseded by the HAVE_DOT option below. This is only a
+# fallback. It is recommended to install and use dot, since it yields more
 # powerful graphs.
 
 CLASS_DIAGRAMS         = YES
 
-# You can define message sequence charts within doxygen comments using the \msc 
-# command. Doxygen will then run the mscgen tool (see 
-# http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the 
-# documentation. The MSCGEN_PATH tag allows you to specify the directory where 
-# the mscgen tool resides. If left empty the tool is assumed to be found in the 
+# You can define message sequence charts within doxygen comments using the \msc
+# command. Doxygen will then run the mscgen tool (see
+# http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the
+# documentation. The MSCGEN_PATH tag allows you to specify the directory where
+# the mscgen tool resides. If left empty the tool is assumed to be found in the
 # default search path.
 
-MSCGEN_PATH            = 
+MSCGEN_PATH            =
 
-# If set to YES, the inheritance and collaboration graphs will hide 
-# inheritance and usage relations if the target is undocumented 
+# If set to YES, the inheritance and collaboration graphs will hide
+# inheritance and usage relations if the target is undocumented
 # or is not a class.
 
 HIDE_UNDOC_RELATIONS   = YES
 
-# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is 
-# available from the path. This tool is part of Graphviz, a graph visualization 
-# toolkit from AT&T and Lucent Bell Labs. The other options in this section 
+# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
+# available from the path. This tool is part of Graphviz, a graph visualization
+# toolkit from AT&T and Lucent Bell Labs. The other options in this section
 # have no effect if this option is set to NO (the default)
 
 HAVE_DOT               = YES
 
-# By default doxygen will write a font called FreeSans.ttf to the output 
-# directory and reference it in all dot files that doxygen generates. This 
-# font does not include all possible unicode characters however, so when you need 
-# these (or just want a differently looking font) you can specify the font name 
-# using DOT_FONTNAME. You need need to make sure dot is able to find the font, 
-# which can be done by putting it in a standard location or by setting the 
-# DOTFONTPATH environment variable or by setting DOT_FONTPATH to the directory 
+# By default doxygen will write a font called FreeSans.ttf to the output
+# directory and reference it in all dot files that doxygen generates. This
+# font does not include all possible unicode characters however, so when you need
+# these (or just want a differently looking font) you can specify the font name
+# using DOT_FONTNAME. You need need to make sure dot is able to find the font,
+# which can be done by putting it in a standard location or by setting the
+# DOTFONTPATH environment variable or by setting DOT_FONTPATH to the directory
 # containing the font.
 
 DOT_FONTNAME           = FreeSans
 
-# By default doxygen will tell dot to use the output directory to look for the 
-# FreeSans.ttf font (which doxygen will put there itself). If you specify a 
-# different font using DOT_FONTNAME you can set the path where dot 
+# By default doxygen will tell dot to use the output directory to look for the
+# FreeSans.ttf font (which doxygen will put there itself). If you specify a
+# different font using DOT_FONTNAME you can set the path where dot
 # can find it using this tag.
 
-DOT_FONTPATH           = 
+DOT_FONTPATH           =
 
-# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen 
-# will generate a graph for each documented class showing the direct and 
-# indirect inheritance relations. Setting this tag to YES will force the 
+# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for each documented class showing the direct and
+# indirect inheritance relations. Setting this tag to YES will force the
 # the CLASS_DIAGRAMS tag to NO.
 
 CLASS_GRAPH            = YES
 
-# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen 
-# will generate a graph for each documented class showing the direct and 
-# indirect implementation dependencies (inheritance, containment, and 
+# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for each documented class showing the direct and
+# indirect implementation dependencies (inheritance, containment, and
 # class references variables) of the class with other documented classes.
 
 COLLABORATION_GRAPH    = YES
 
-# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen 
+# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen
 # will generate a graph for groups, showing the direct groups dependencies
 
 GROUP_GRAPHS           = YES
 
-# If the UML_LOOK tag is set to YES doxygen will generate inheritance and 
-# collaboration diagrams in a style similar to the OMG's Unified Modeling 
+# If the UML_LOOK tag is set to YES doxygen will generate inheritance and
+# collaboration diagrams in a style similar to the OMG's Unified Modeling
 # Language.
 
 UML_LOOK               = YES
 
-# If set to YES, the inheritance and collaboration graphs will show the 
+# If set to YES, the inheritance and collaboration graphs will show the
 # relations between templates and their instances.
 
 TEMPLATE_RELATIONS     = NO
 
-# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT 
-# tags are set to YES then doxygen will generate a graph for each documented 
-# file showing the direct and indirect include dependencies of the file with 
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT
+# tags are set to YES then doxygen will generate a graph for each documented
+# file showing the direct and indirect include dependencies of the file with
 # other documented files.
 
 INCLUDE_GRAPH          = YES
 
-# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and 
-# HAVE_DOT tags are set to YES then doxygen will generate a graph for each 
-# documented header file showing the documented files that directly or 
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and
+# HAVE_DOT tags are set to YES then doxygen will generate a graph for each
+# documented header file showing the documented files that directly or
 # indirectly include this file.
 
 INCLUDED_BY_GRAPH      = YES
 
-# If the CALL_GRAPH and HAVE_DOT options are set to YES then 
-# doxygen will generate a call dependency graph for every global function 
-# or class method. Note that enabling this option will significantly increase 
-# the time of a run. So in most cases it will be better to enable call graphs 
+# If the CALL_GRAPH and HAVE_DOT options are set to YES then
+# doxygen will generate a call dependency graph for every global function
+# or class method. Note that enabling this option will significantly increase
+# the time of a run. So in most cases it will be better to enable call graphs
 # for selected functions only using the \callgraph command.
 
 CALL_GRAPH             = YES
 
-# If the CALLER_GRAPH and HAVE_DOT tags are set to YES then 
-# doxygen will generate a caller dependency graph for every global function 
-# or class method. Note that enabling this option will significantly increase 
-# the time of a run. So in most cases it will be better to enable caller 
+# If the CALLER_GRAPH and HAVE_DOT tags are set to YES then
+# doxygen will generate a caller dependency graph for every global function
+# or class method. Note that enabling this option will significantly increase
+# the time of a run. So in most cases it will be better to enable caller
 # graphs for selected functions only using the \callergraph command.
 
 CALLER_GRAPH           = YES
 
-# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen 
+# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen
 # will graphical hierarchy of all classes instead of a textual one.
 
 GRAPHICAL_HIERARCHY    = YES
 
-# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES 
-# then doxygen will show the dependencies a directory has on other directories 
+# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES
+# then doxygen will show the dependencies a directory has on other directories
 # in a graphical way. The dependency relations are determined by the #include
 # relations between the files in the directories.
 
 DIRECTORY_GRAPH        = YES
 
-# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images 
+# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
 # generated by dot. Possible values are png, jpg, or gif
 # If left blank png will be used.
 
 DOT_IMAGE_FORMAT       = png
 
-# The tag DOT_PATH can be used to specify the path where the dot tool can be 
+# The tag DOT_PATH can be used to specify the path where the dot tool can be
 # found. If left blank, it is assumed the dot tool can be found in the path.
 
-DOT_PATH               = 
+DOT_PATH               =
 
-# The DOTFILE_DIRS tag can be used to specify one or more directories that 
-# contain dot files that are included in the documentation (see the 
+# The DOTFILE_DIRS tag can be used to specify one or more directories that
+# contain dot files that are included in the documentation (see the
 # \dotfile command).
 
-DOTFILE_DIRS           = 
+DOTFILE_DIRS           =
 
-# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of 
-# nodes that will be shown in the graph. If the number of nodes in a graph 
-# becomes larger than this value, doxygen will truncate the graph, which is 
-# visualized by representing a node as a red box. Note that doxygen if the 
-# number of direct children of the root node in a graph is already larger than 
-# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note 
+# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of
+# nodes that will be shown in the graph. If the number of nodes in a graph
+# becomes larger than this value, doxygen will truncate the graph, which is
+# visualized by representing a node as a red box. Note that doxygen if the
+# number of direct children of the root node in a graph is already larger than
+# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note
 # that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
 
 DOT_GRAPH_MAX_NODES    = 50
 
-# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the 
-# graphs generated by dot. A depth value of 3 means that only nodes reachable 
-# from the root by following a path via at most 3 edges will be shown. Nodes 
-# that lay further from the root node will be omitted. Note that setting this 
-# option to 1 or 2 may greatly reduce the computation time needed for large 
-# code bases. Also note that the size of a graph can be further restricted by 
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the
+# graphs generated by dot. A depth value of 3 means that only nodes reachable
+# from the root by following a path via at most 3 edges will be shown. Nodes
+# that lay further from the root node will be omitted. Note that setting this
+# option to 1 or 2 may greatly reduce the computation time needed for large
+# code bases. Also note that the size of a graph can be further restricted by
 # DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
 
 MAX_DOT_GRAPH_DEPTH    = 0
 
-# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent 
-# background. This is enabled by default, which results in a transparent 
-# background. Warning: Depending on the platform used, enabling this option 
-# may lead to badly anti-aliased labels on the edges of a graph (i.e. they 
+# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
+# background. This is enabled by default, which results in a transparent
+# background. Warning: Depending on the platform used, enabling this option
+# may lead to badly anti-aliased labels on the edges of a graph (i.e. they
 # become hard to read).
 
 DOT_TRANSPARENT        = YES
 
-# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output 
-# files in one run (i.e. multiple -o and -T options on the command line). This 
-# makes dot run faster, but since only newer versions of dot (>1.8.10) 
+# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output
+# files in one run (i.e. multiple -o and -T options on the command line). This
+# makes dot run faster, but since only newer versions of dot (>1.8.10)
 # support this, this feature is disabled by default.
 
 DOT_MULTI_TARGETS      = YES
 
-# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will 
-# generate a legend page explaining the meaning of the various boxes and 
+# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will
+# generate a legend page explaining the meaning of the various boxes and
 # arrows in the dot generated graphs.
 
 GENERATE_LEGEND        = YES
 
-# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will 
-# remove the intermediate dot files that are used to generate 
+# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will
+# remove the intermediate dot files that are used to generate
 # the various graphs.
 
 DOT_CLEANUP            = YES
 
 #---------------------------------------------------------------------------
-# Configuration::additions related to the search engine   
+# Configuration::additions related to the search engine
 #---------------------------------------------------------------------------
 
-# The SEARCHENGINE tag specifies whether or not a search engine should be 
+# The SEARCHENGINE tag specifies whether or not a search engine should be
 # used. If set to NO the values of all tags below this one will be ignored.
 
 SEARCHENGINE           = YES

Modified: trunk/payloads/libpayload/LICENSES
==============================================================================
--- trunk/payloads/libpayload/LICENSES	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/LICENSES	Tue Apr 27 08:56:47 2010	(r5507)
@@ -109,4 +109,4 @@
           http://www.openbsd.org/cgi-bin/cvsweb/src/lib/libc/hash/sha1.c
   Original files: src/lib/libc/hash/sha1.c
   Current version we use: CVS revision 1.20 2005/08/08
-  
+

Modified: trunk/payloads/libpayload/Makefile
==============================================================================
--- trunk/payloads/libpayload/Makefile	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/Makefile	Tue Apr 27 08:56:47 2010	(r5507)
@@ -145,7 +145,7 @@
 	$(Q)mkdir -p $(obj)/util/kconfig/lxdialog
 	$(Q)mkdir -p $(obj)/crypto $(obj)/curses $(obj)/drivers/video
 	$(Q)mkdir -p $(obj)/drivers/usb
-	$(Q)mkdir -p $(obj)/arch/$(ARCHDIR-y) $(obj)/lib/$(ARCHDIR-y) $(obj)/libc 
+	$(Q)mkdir -p $(obj)/arch/$(ARCHDIR-y) $(obj)/lib/$(ARCHDIR-y) $(obj)/libc
 	$(Q)mkdir -p $(obj)/lib/$(ARCHDIR-y)
 	$(Q)mkdir -p $(obj)/include
 
@@ -159,7 +159,7 @@
 
 clean: doxygen-clean
 	$(Q)rm -rf $(obj)/crypto $(obj)/curses $(obj)/drivers
-	$(Q)rm -rf $(obj)/i386 $(obj)/powerpc $(obj)/lib $(obj)/libc 
+	$(Q)rm -rf $(obj)/i386 $(obj)/powerpc $(obj)/lib $(obj)/libc
 
 distclean: clean
 	$(Q)rm -rf build # should be $(obj) ?

Modified: trunk/payloads/libpayload/bin/lpgcc
==============================================================================
--- trunk/payloads/libpayload/bin/lpgcc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/bin/lpgcc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -27,9 +27,9 @@
 ## SUCH DAMAGE.
 
 # GCC wrapper for libpayload
-# let's not recurse. 
+# let's not recurse.
 # This is a hack, I know, but it makes sure that really simple user errors
-# don't fork-bomb your machine. 
+# don't fork-bomb your machine.
 b=`basename $CC`
 if [ "$b" = "lpgcc" ]; then
 CC=""

Modified: trunk/payloads/libpayload/curses/keyboard.c
==============================================================================
--- trunk/payloads/libpayload/curses/keyboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/curses/keyboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -197,7 +197,7 @@
 
 	if (_halfdelay)
 		delay = _halfdelay;
-	else 
+	else
 		delay = win->_delay;
 
 	return curses_getchar(delay);

Modified: trunk/payloads/libpayload/curses/tinycurses.c
==============================================================================
--- trunk/payloads/libpayload/curses/tinycurses.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/curses/tinycurses.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -499,7 +499,7 @@
 	// NCURSES_CH_T wch;
 	// SetChar2(wch, ch);
 
-	if (win->_line[win->_cury].firstchar == _NOCHANGE || 
+	if (win->_line[win->_cury].firstchar == _NOCHANGE ||
 			win->_line[win->_cury].firstchar > win->_curx)
 		win->_line[win->_cury].firstchar = win->_curx;
 
@@ -510,7 +510,7 @@
 	win->_line[win->_cury].text[win->_curx].attr |=
 		((ch) & (chtype)A_ATTRIBUTES);
 
-	if (win->_line[win->_cury].lastchar == _NOCHANGE || 
+	if (win->_line[win->_cury].lastchar == _NOCHANGE ||
 			win->_line[win->_cury].lastchar < win->_curx)
 		win->_line[win->_cury].lastchar = win->_curx;
 
@@ -535,7 +535,7 @@
 	if (n < 0)
 		n = strlen(astr);
 
-	if (win->_line[win->_cury].firstchar == _NOCHANGE || 
+	if (win->_line[win->_cury].firstchar == _NOCHANGE ||
 			win->_line[win->_cury].firstchar > win->_curx)
 		win->_line[win->_cury].firstchar = win->_curx;
 
@@ -554,7 +554,7 @@
 		// }
 	}
 
-	if (win->_line[win->_cury].lastchar == _NOCHANGE || 
+	if (win->_line[win->_cury].lastchar == _NOCHANGE ||
 			win->_line[win->_cury].lastchar < win->_curx)
 		win->_line[win->_cury].lastchar = win->_curx;
 
@@ -924,7 +924,7 @@
 		win->_line[y].firstchar = win->_line[y + n].firstchar;
 		win->_line[y].lastchar = win->_line[y + n].lastchar;
 		for (x = 0; x <= win->_maxx; x++) {
-			if ((win->_line[y].text[x].chars[0] != win->_line[y + n].text[x].chars[0]) || 
+			if ((win->_line[y].text[x].chars[0] != win->_line[y + n].text[x].chars[0]) ||
 					(win->_line[y].text[x].attr != win->_line[y + n].text[x].attr)) {
 				if (win->_line[y].firstchar == _NOCHANGE)
 					win->_line[y].firstchar = x;
@@ -939,7 +939,7 @@
 
 	for (y = (win->_maxy+1 - n); y <= win->_maxy; y++) {
 		for (x = 0; x <= win->_maxx; x++) {
-			if ((win->_line[y].text[x].chars[0] != ' ') || 
+			if ((win->_line[y].text[x].chars[0] != ' ') ||
 					(win->_line[y].text[x].attr != A_NORMAL)) {
 				if (win->_line[y].firstchar == _NOCHANGE)
 					win->_line[y].firstchar = x;

Modified: trunk/payloads/libpayload/drivers/keyboard.c
==============================================================================
--- trunk/payloads/libpayload/drivers/keyboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/drivers/keyboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -295,7 +295,7 @@
 
 /**
  * Set keyboard layout
- * @param country string describing the keyboard layout language. 
+ * @param country string describing the keyboard layout language.
  * Valid values are "us", "de".
  */
 

Modified: trunk/payloads/libpayload/drivers/nvram.c
==============================================================================
--- trunk/payloads/libpayload/drivers/nvram.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/drivers/nvram.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -68,7 +68,7 @@
 
 /**
  * Read a byte from the specified NVRAM address.
- * 
+ *
  * @param addr The NVRAM address to read a byte from.
  * @return The byte at the given NVRAM address.
  */
@@ -82,7 +82,7 @@
 
 /**
  * Write a byte to the specified NVRAM address.
- * 
+ *
  * @param val The byte to write to NVRAM.
  * @param addr The NVRAM address to write to.
  */

Modified: trunk/payloads/libpayload/drivers/options.c
==============================================================================
--- trunk/payloads/libpayload/drivers/options.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/drivers/options.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -81,7 +81,7 @@
 	struct cb_cmos_option_table *option_table = phys_to_virt(lib_sysinfo.option_table);
 	struct cb_cmos_entries *cmos_entry;
 	int len = strnlen(name, CMOS_MAX_NAME_LENGTH);
-	
+
 	/* cmos entries are located right after the option table */
 
 	for (   cmos_entry = (struct cb_cmos_entries*)((unsigned char *)option_table + option_table->header_length);

Modified: trunk/payloads/libpayload/drivers/usb/TODO
==============================================================================
--- trunk/payloads/libpayload/drivers/usb/TODO	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/drivers/usb/TODO	Tue Apr 27 08:56:47 2010	(r5507)
@@ -14,7 +14,7 @@
   handled tds get reactivated as a ring structure
     - added as child of the oldest td
     - queue header already dropped the td, so no issue there
-  
+
   this setup ensures that:
   - the max latency of the device is honored
   - the client knows the right order of the data

Modified: trunk/payloads/libpayload/drivers/usb/quirks.c
==============================================================================
--- trunk/payloads/libpayload/drivers/usb/quirks.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/drivers/usb/quirks.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -43,14 +43,14 @@
 
 usb_quirks_t usb_quirks[] = {
 	/* Working chips,... remove before next release */
-	{ 0x3538, 0x0054, USB_QUIRK_NONE, 0 },	// PQI 1GB 
+	{ 0x3538, 0x0054, USB_QUIRK_NONE, 0 },	// PQI 1GB
 	{ 0x13fd, 0x0841, USB_QUIRK_NONE, 0 },	// Samsung SE-S084
 
 	/* Silence the warning for known devices with more
 	 * than one interface
 	 */
 	{ 0x1267, 0x0103, USB_QUIRK_NONE, 1 },	// Keyboard Trust KB-1800S
-	{ 0x0a12, 0x0001, USB_QUIRK_NONE, 1 },	// Bluetooth Allnet ALL1575 
+	{ 0x0a12, 0x0001, USB_QUIRK_NONE, 1 },	// Bluetooth Allnet ALL1575
 
 	/* Currently unsupported, possibly interesting devices:
 	 * FTDI serial: device 0x0403:0x6001 is USB 1.10 (class ff)

Modified: trunk/payloads/libpayload/drivers/usb/usb.c
==============================================================================
--- trunk/payloads/libpayload/drivers/usb/usb.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/drivers/usb/usb.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -256,12 +256,12 @@
 	}
 	mdelay (50);
 	dev->address = adr;
-	dev->descriptor = get_descriptor (dev, gen_bmRequestType 
+	dev->descriptor = get_descriptor (dev, gen_bmRequestType
 		(device_to_host, standard_type, dev_recp), 1, 0, 0);
 	dd = (device_descriptor_t *) dev->descriptor;
 
 	printf ("device 0x%04x:0x%04x is USB %x.%x ",
-		 dd->idVendor, dd->idProduct,	
+		 dd->idVendor, dd->idProduct,
 		 dd->bcdUSB >> 8, dd->bcdUSB & 0xff);
 	dev->quirks = usb_quirk_check(dd->idVendor, dd->idProduct);
 

Modified: trunk/payloads/libpayload/drivers/usb/usbhid.c
==============================================================================
--- trunk/payloads/libpayload/drivers/usb/usbhid.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/drivers/usb/usbhid.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -86,7 +86,7 @@
 	{ "Persian (Farsi)", "ir" },
 	{ "Poland", "pl" },
 	{ "Portuguese", "pt" },
-	{ "Russia", "ru" }, 
+	{ "Russia", "ru" },
 	{ "Slovakia", "sl" },
 	{ "Spanish", "es" },
 	{ "Swedish", "se" },
@@ -241,8 +241,8 @@
 #define INITIAL_REPEAT_DELAY	10
 #define REPEAT_DELAY		 2
 
-static void 
-usb_hid_process_keyboard_event(usb_hid_keyboard_event_t *current, 
+static void
+usb_hid_process_keyboard_event(usb_hid_keyboard_event_t *current,
 		usb_hid_keyboard_event_t *previous)
 {
 	int i, keypress = 0, modifiers = 0;
@@ -429,16 +429,16 @@
 			usb_hid_set_idle(dev, interface, KEYBOARD_REPEAT_MS);
 			debug ("  activating...\n");
 
-			HID_INST (dev)->descriptor = 
+			HID_INST (dev)->descriptor =
 				(hid_descriptor_t *)
 					get_descriptor(dev, gen_bmRequestType
-					(device_to_host, standard_type, iface_recp), 
+					(device_to_host, standard_type, iface_recp),
 					0x21, 0, 0);
 			countrycode = HID_INST(dev)->descriptor->bCountryCode;
 			/* 35 countries defined: */
 			if (countrycode > 35)
 				countrycode = 0;
-			printf ("  Keyboard has %s layout (country code %02x)\n", 
+			printf ("  Keyboard has %s layout (country code %02x)\n",
 					countries[countrycode][0], countrycode);
 
 			/* Set keyboard layout accordingly */

Modified: trunk/payloads/libpayload/drivers/usb/usbmsc.c
==============================================================================
--- trunk/payloads/libpayload/drivers/usb/usbmsc.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/drivers/usb/usbmsc.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -295,7 +295,7 @@
 	}
 	cb.block = htonl (start);
 	cb.numblocks = htonw (n);
-		
+
 	return execute_command (dev, dir, (u8 *) &cb, sizeof (cb), buf,
 				n * MSC_INST(dev)->blocksize);
 }
@@ -310,7 +310,7 @@
 	cmdblock6_t cb;
 	memset (&cb, 0, sizeof (cb));
 	cb.command = 0x3;
-	
+
 	return execute_command (dev, cbw_direction_data_in, (u8 *) &cb,
 				sizeof (cb), buf, 19);
 }
@@ -430,7 +430,7 @@
 	timeout = 30 * 10; /* SCSI/ATA specs say we have to wait up to 30s. Ugh */
 	while (test_unit_ready (dev) && --timeout) {
 		mdelay (100);
-		if (!(timeout % 10)) 
+		if (!(timeout % 10))
 			printf (".");
 	}
 	if (test_unit_ready (dev)) {

Modified: trunk/payloads/libpayload/drivers/video/corebootfb.c
==============================================================================
--- trunk/payloads/libpayload/drivers/video/corebootfb.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/drivers/video/corebootfb.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -150,7 +150,7 @@
 
 	for(y = 0; y < FONT_HEIGHT; y++) {
 		for(x = FONT_WIDTH - 1; x >= 0; x--) {
-	
+
 			switch (FI->bits_per_pixel) {
 			case 8: /* Indexed */
 				dst[(FONT_WIDTH - x) * (FI->bits_per_pixel >> 3)] = (*glyph & (1 << x)) ?  fg : bg;

Modified: trunk/payloads/libpayload/include/curses.priv.h
==============================================================================
--- trunk/payloads/libpayload/include/curses.priv.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/include/curses.priv.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -66,24 +66,24 @@
 //// #include <stdlib.h>
 //// #include <string.h>
 //// #include <sys/types.h>
-//// 
+////
 //// #if HAVE_UNISTD_H
 //// #include <unistd.h>
 //// #endif
-//// 
+////
 //// #if HAVE_SYS_BSDTYPES_H
 //// #include <sys/bsdtypes.h>	/* needed for ISC */
 //// #endif
-//// 
+////
 //// #if HAVE_LIMITS_H
 //// # include <limits.h>
 //// #elif HAVE_SYS_PARAM_H
 //// # include <sys/param.h>
 //// #endif
-//// 
+////
 //// #include <assert.h>
 //// #include <stdio.h>
-//// 
+////
 //// #include <errno.h>
 
 #ifndef PATH_MAX
@@ -101,7 +101,7 @@
 #endif
 
 //// #include <nc_panel.h>
-//// 
+////
 //// /* Some systems have a broken 'select()', but workable 'poll()'.  Use that */
 //// #if HAVE_WORKING_POLL
 //// #define USE_FUNC_POLL 1
@@ -113,10 +113,10 @@
 //// #else
 //// #define USE_FUNC_POLL 0
 //// #endif
-//// 
+////
 //// /* include signal.h before curses.h to work-around defect in glibc 2.1.3 */
 //// #include <signal.h>
- 
+
 /* Alessandro Rubini's GPM (general-purpose mouse) */
 #if HAVE_LIBGPM && HAVE_GPM_H
 #define USE_GPM_SUPPORT 1

Modified: trunk/payloads/libpayload/include/getopt.h
==============================================================================
--- trunk/payloads/libpayload/include/getopt.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/include/getopt.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -74,7 +74,7 @@
 extern   char *suboptarg;               /* getsubopt(3) external variable */
 #endif
 //__END_DECLS
- 
+
 #define MAX_ARGS        16
 extern char *string_argv[MAX_ARGS];
 extern int string_argc;

Modified: trunk/payloads/libpayload/include/i386/arch/endian.h
==============================================================================
--- trunk/payloads/libpayload/include/i386/arch/endian.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/include/i386/arch/endian.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -37,7 +37,7 @@
 #define ntohl(in) ((( (in) & 0xFF) << 24) | (( (in) & 0xFF00) << 8) | \
 		(( (in) & 0xFF0000) >> 8) | (( (in) & 0xFF000000) >> 24))
 
-#define ntohll(in) (((u64) ntohl( (in) & 0xFFFFFFFF) << 32) | ((u64) ntohl( (in) >> 32))) 
+#define ntohll(in) (((u64) ntohl( (in) & 0xFFFFFFFF) << 32) | ((u64) ntohl( (in) >> 32)))
 
 #define htonw(in) ntohw(in)
 #define htonl(in) ntohl(in)

Modified: trunk/payloads/libpayload/include/libpayload.h
==============================================================================
--- trunk/payloads/libpayload/include/libpayload.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/include/libpayload.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -118,7 +118,7 @@
  * @defgroup usb USB functions
  * @{
  */
-int usb_initialize(void);                                                      
+int usb_initialize(void);
 int usbhid_havechar(void);
 int usbhid_getchar(void);
 /** @} */

Modified: trunk/payloads/libpayload/libc/args.c
==============================================================================
--- trunk/payloads/libpayload/libc/args.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/libc/args.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -35,8 +35,8 @@
 #include <libpayload.h>
 #include <getopt.h>
 
-/* We don't want to waste malloc on this, so we live with a small 
- * fixed size array 
+/* We don't want to waste malloc on this, so we live with a small
+ * fixed size array
  */
 char *string_argv[MAX_ARGS];
 int string_argc;

Modified: trunk/payloads/libpayload/libc/malloc.c
==============================================================================
--- trunk/payloads/libpayload/libc/malloc.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/libc/malloc.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -286,10 +286,10 @@
 {
 	struct align_region_t *new_region;
 #ifdef CONFIG_DEBUG_MALLOC
-	printf("%s(old align_regions=%p, alignment=%u, num_elements=%u)\n", 
+	printf("%s(old align_regions=%p, alignment=%u, num_elements=%u)\n",
 			__func__, align_regions, alignment, num_elements);
 #endif
-	
+
 	new_region = malloc(sizeof(struct align_region_t));
 
 	if (!new_region)
@@ -342,7 +342,7 @@
 		memset(align_regions, 0, sizeof(struct align_region_t));
 	}
 	struct align_region_t *reg = align_regions;
-look_further:	
+look_further:
 	while (reg != 0)
 	{
 		if ((reg->alignment == align) && (reg->free >= (size + align - 1)/align))

Modified: trunk/payloads/libpayload/libc/memory.c
==============================================================================
--- trunk/payloads/libpayload/libc/memory.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/libc/memory.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -72,7 +72,7 @@
 	offs = n - (n % sizeof(unsigned long));
 
 	for (i = (n % sizeof(unsigned long)) - 1; i >= 0; i--)
-		((unsigned char *)dst)[i + offs] = 
+		((unsigned char *)dst)[i + offs] =
 			((unsigned char *)src)[i + offs];
 
 	for (i = n / sizeof(unsigned long) - 1; i >= 0; i--)

Modified: trunk/payloads/libpayload/libc/printf.c
==============================================================================
--- trunk/payloads/libpayload/libc/printf.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/libc/printf.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -368,7 +368,7 @@
  *
  * Print string formatted according to the fmt parameter and variadic arguments.
  * Each formatting directive must have the following form:
- * 
+ *
  * 	\% [ FLAGS ] [ WIDTH ] [ .PRECISION ] [ TYPE ] CONVERSION
  *
  * FLAGS:@n
@@ -386,7 +386,7 @@
  * 	- "0"	Print 0 as padding instead of spaces. Zeroes are placed between
  *		sign and the rest of the number. This flag is ignored if "-"
  *		flag is specified.
- * 
+ *
  * WIDTH:@n
  * 	- Specify the minimal width of a printed argument. If it is bigger,
  *	width is ignored. If width is specified with a "*" character instead of
@@ -403,15 +403,15 @@
  *	value is then expected in parameters. When both width and precision are
  *	specified using "*", the first parameter is used for width and the
  *	second one for precision.
- * 
+ *
  * TYPE:@n
  * 	- "hh"	Signed or unsigned char. at n
  * 	- "h"	Signed or unsigned short. at n
  * 	- ""	Signed or unsigned int (default value). at n
  * 	- "l"	Signed or unsigned long int. at n
  * 	- "ll"	Signed or unsigned long long int. at n
- * 
- * 
+ *
+ *
  * CONVERSION:@n
  * 	- %	Print percentile character itself.
  *
@@ -419,16 +419,16 @@
  *
  * 	- s	Print zero terminated string. If a NULL value is passed as
  *		value, "(NULL)" is printed instead.
- * 
+ *
  * 	- P, p	Print value of a pointer. Void * value is expected and it is
  *		printed in hexadecimal notation with prefix (as with \%#X / \%#x
  *		for 32-bit or \%#X / \%#x for 64-bit long pointers).
  *
  * 	- b	Print value as unsigned binary number. Prefix is not printed by
  *		default. (Nonstandard extension.)
- * 
+ *
  * 	- o	Print value as unsigned octal number. Prefix is not printed by
- *		default. 
+ *		default.
  *
  * 	- d, i	Print signed decimal number. There is no difference between d
  *		and i conversion.
@@ -437,7 +437,7 @@
  *
  * 	- X, x	Print hexadecimal number with upper- or lower-case. Prefix is
  *		not printed by default.
- * 
+ *
  * All other characters from fmt except the formatting directives are printed in
  * verbatim.
  *

Modified: trunk/payloads/libpayload/util/kconfig/confdata.c
==============================================================================
--- trunk/payloads/libpayload/util/kconfig/confdata.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/util/kconfig/confdata.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
 #define mkdir(x,y) mkdir(x)
 #define UNLINK_IF_NECESSARY(x) unlink(x)
 #else
-#define UNLINK_IF_NECESSARY(X) 
+#define UNLINK_IF_NECESSARY(X)
 #endif
 
 static void conf_warning(const char *fmt, ...)

Modified: trunk/payloads/libpayload/util/kconfig/lex.zconf.c_shipped
==============================================================================
--- trunk/payloads/libpayload/util/kconfig/lex.zconf.c_shipped	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/util/kconfig/lex.zconf.c_shipped	Tue Apr 27 08:56:47 2010	(r5507)
@@ -52,7 +52,7 @@
 #if __STDC_VERSION__ >= 199901L
 
 /* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
- * if you want the limit (max/min) macros for int types. 
+ * if you want the limit (max/min) macros for int types.
  */
 #ifndef __STDC_LIMIT_MACROS
 #define __STDC_LIMIT_MACROS 1
@@ -69,7 +69,7 @@
 typedef signed char flex_int8_t;
 typedef short int flex_int16_t;
 typedef int flex_int32_t;
-typedef unsigned char flex_uint8_t; 
+typedef unsigned char flex_uint8_t;
 typedef unsigned short int flex_uint16_t;
 typedef unsigned int flex_uint32_t;
 #endif /* ! C99 */
@@ -179,7 +179,7 @@
 #define EOB_ACT_LAST_MATCH 2
 
     #define YY_LESS_LINENO(n)
-    
+
 /* Return all but the first "n" matched characters back to the input stream. */
 #define yyless(n) \
 	do \
@@ -246,7 +246,7 @@
 
     int yy_bs_lineno; /**< The line count. */
     int yy_bs_column; /**< The column count. */
-    
+
 	/* Whether to try to fill the input buffer when we reach the
 	 * end of it.
 	 */
@@ -866,7 +866,7 @@
 #endif
 
     static void yyunput (int c,char *buf_ptr  );
-    
+
 #ifndef yytext_ptr
 static void yy_flex_strncpy (char *,yyconst char *,int );
 #endif
@@ -971,7 +971,7 @@
 	register yy_state_type yy_current_state;
 	register char *yy_cp, *yy_bp;
 	register int yy_act;
-    
+
 	int str = 0;
 	int ts, i;
 
@@ -1574,7 +1574,7 @@
 {
 	register yy_state_type yy_current_state;
 	register char *yy_cp;
-    
+
 	yy_current_state = (yy_start);
 
 	for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
@@ -1593,7 +1593,7 @@
     static yy_state_type yy_try_NUL_trans  (yy_state_type yy_current_state )
 {
 	register int yy_is_jam;
-    
+
 	yy_current_state = yy_nxt[yy_current_state][1];
 	yy_is_jam = (yy_current_state <= 0);
 
@@ -1603,7 +1603,7 @@
     static void yyunput (int c, register char * yy_bp )
 {
 	register char *yy_cp;
-    
+
     yy_cp = (yy_c_buf_p);
 
 	/* undo effects of setting up zconftext */
@@ -1646,7 +1646,7 @@
 
 {
 	int c;
-    
+
 	*(yy_c_buf_p) = (yy_hold_char);
 
 	if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
@@ -1713,12 +1713,12 @@
 
 /** Immediately switch to a different input stream.
  * @param input_file A readable stream.
- * 
+ *
  * @note This function does not reset the start condition to @c INITIAL .
  */
     void zconfrestart  (FILE * input_file )
 {
-    
+
 	if ( ! YY_CURRENT_BUFFER ){
         zconfensure_buffer_stack ();
 		YY_CURRENT_BUFFER_LVALUE =
@@ -1731,11 +1731,11 @@
 
 /** Switch to a different input buffer.
  * @param new_buffer The new input buffer.
- * 
+ *
  */
     void zconf_switch_to_buffer  (YY_BUFFER_STATE  new_buffer )
 {
-    
+
 	/* TODO. We should be able to replace this entire function body
 	 * with
 	 *		zconfpop_buffer_state();
@@ -1775,13 +1775,13 @@
 /** Allocate and initialize an input buffer state.
  * @param file A readable stream.
  * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
- * 
+ *
  * @return the allocated buffer state.
  */
     YY_BUFFER_STATE zconf_create_buffer  (FILE * file, int  size )
 {
 	YY_BUFFER_STATE b;
-    
+
 	b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state )  );
 	if ( ! b )
 		YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" );
@@ -1804,11 +1804,11 @@
 
 /** Destroy the buffer.
  * @param b a buffer created with zconf_create_buffer()
- * 
+ *
  */
     void zconf_delete_buffer (YY_BUFFER_STATE  b )
 {
-    
+
 	if ( ! b )
 		return;
 
@@ -1829,7 +1829,7 @@
 
 {
 	int oerrno = errno;
-    
+
 	zconf_flush_buffer(b );
 
 	b->yy_input_file = file;
@@ -1845,13 +1845,13 @@
     }
 
         b->yy_is_interactive = 0;
-    
+
 	errno = oerrno;
 }
 
 /** Discard all buffered characters. On the next scan, YY_INPUT will be called.
  * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
- * 
+ *
  */
     void zconf_flush_buffer (YY_BUFFER_STATE  b )
 {
@@ -1880,7 +1880,7 @@
  *  the current state. This function will allocate the stack
  *  if necessary.
  *  @param new_buffer The new state.
- *  
+ *
  */
 void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
 {
@@ -1910,7 +1910,7 @@
 
 /** Removes and deletes the top of the stack, if present.
  *  The next element becomes the new top.
- *  
+ *
  */
 void zconfpop_buffer_state (void)
 {
@@ -1934,7 +1934,7 @@
 static void zconfensure_buffer_stack (void)
 {
 	int num_to_alloc;
-    
+
 	if (!(yy_buffer_stack)) {
 
 		/* First allocation is just for 2 elements, since we don't know if this
@@ -1945,9 +1945,9 @@
 		(yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc
 								(num_to_alloc * sizeof(struct yy_buffer_state*)
 								);
-		
+
 		memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
-				
+
 		(yy_buffer_stack_max) = num_to_alloc;
 		(yy_buffer_stack_top) = 0;
 		return;
@@ -1973,13 +1973,13 @@
 /** Setup the input buffer state to scan directly from a user-specified character buffer.
  * @param base the character buffer
  * @param size the size in bytes of the character buffer
- * 
- * @return the newly allocated buffer state object. 
+ *
+ * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE zconf_scan_buffer  (char * base, yy_size_t  size )
 {
 	YY_BUFFER_STATE b;
-    
+
 	if ( size < 2 ||
 	     base[size-2] != YY_END_OF_BUFFER_CHAR ||
 	     base[size-1] != YY_END_OF_BUFFER_CHAR )
@@ -2008,14 +2008,14 @@
 /** Setup the input buffer state to scan a string. The next call to zconflex() will
  * scan from a @e copy of @a str.
  * @param str a NUL-terminated string to scan
- * 
+ *
  * @return the newly allocated buffer state object.
  * @note If you want to scan bytes that may contain NUL values, then use
  *       zconf_scan_bytes() instead.
  */
 YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
 {
-    
+
 	return zconf_scan_bytes(yystr,strlen(yystr) );
 }
 
@@ -2023,7 +2023,7 @@
  * scan from a @e copy of @a bytes.
  * @param bytes the byte buffer to scan
  * @param len the number of bytes in the buffer pointed to by @a bytes.
- * 
+ *
  * @return the newly allocated buffer state object.
  */
 YY_BUFFER_STATE zconf_scan_bytes  (yyconst char * yybytes, int  _yybytes_len )
@@ -2032,7 +2032,7 @@
 	char *buf;
 	yy_size_t n;
 	int i;
-    
+
 	/* Get memory for full buffer, including space for trailing EOB's. */
 	n = _yybytes_len + 2;
 	buf = (char *) zconfalloc(n  );
@@ -2086,16 +2086,16 @@
 /* Accessor  methods (get/set functions) to struct members. */
 
 /** Get the current line number.
- * 
+ *
  */
 int zconfget_lineno  (void)
 {
-        
+
     return zconflineno;
 }
 
 /** Get the input stream.
- * 
+ *
  */
 FILE *zconfget_in  (void)
 {
@@ -2103,7 +2103,7 @@
 }
 
 /** Get the output stream.
- * 
+ *
  */
 FILE *zconfget_out  (void)
 {
@@ -2111,7 +2111,7 @@
 }
 
 /** Get the length of the current token.
- * 
+ *
  */
 int zconfget_leng  (void)
 {
@@ -2119,7 +2119,7 @@
 }
 
 /** Get the current token.
- * 
+ *
  */
 
 char *zconfget_text  (void)
@@ -2129,18 +2129,18 @@
 
 /** Set the current line number.
  * @param line_number
- * 
+ *
  */
 void zconfset_lineno (int  line_number )
 {
-    
+
     zconflineno = line_number;
 }
 
 /** Set the input stream. This does not discard the current
  * input buffer.
  * @param in_str A readable stream.
- * 
+ *
  * @see zconf_switch_to_buffer
  */
 void zconfset_in (FILE *  in_str )
@@ -2194,7 +2194,7 @@
 /* zconflex_destroy is for both reentrant and non-reentrant scanners. */
 int zconflex_destroy  (void)
 {
-    
+
     /* Pop the buffer stack, destroying each element. */
 	while(YY_CURRENT_BUFFER){
 		zconf_delete_buffer(YY_CURRENT_BUFFER  );

Modified: trunk/payloads/libpayload/util/kconfig/lxdialog/BIG.FAT.WARNING
==============================================================================
--- trunk/payloads/libpayload/util/kconfig/lxdialog/BIG.FAT.WARNING	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/util/kconfig/lxdialog/BIG.FAT.WARNING	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
 This is NOT the official version of dialog.  This version has been
 significantly modified from the original.  It is for use by the Linux
-kernel configuration script.  Please do not bother Savio Lam with 
+kernel configuration script.  Please do not bother Savio Lam with
 questions about this program.

Modified: trunk/payloads/libpayload/util/kconfig/lxdialog/menubox.c
==============================================================================
--- trunk/payloads/libpayload/util/kconfig/lxdialog/menubox.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/util/kconfig/lxdialog/menubox.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -26,7 +26,7 @@
  *
  *    *)  A bugfix for the Page-Down problem
  *
- *    *)  Formerly when I used Page Down and Page Up, the cursor would be set 
+ *    *)  Formerly when I used Page Down and Page Up, the cursor would be set
  *        to the first position in the menu box.  Now lxdialog is a bit
  *        smarter and works more like other menu systems (just have a look at
  *        it).

Modified: trunk/payloads/libpayload/util/kconfig/regex.c
==============================================================================
--- trunk/payloads/libpayload/util/kconfig/regex.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/util/kconfig/regex.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -75,7 +75,7 @@
 
 /* This must be nonzero for the wordchar and notwordchar pattern
    commands in re_match_2.  */
-#ifndef Sword 
+#ifndef Sword
 #define Sword 1
 #endif
 
@@ -173,8 +173,8 @@
    use `alloca' instead of `malloc'.  This is because using malloc in
    re_search* or re_match* could cause memory leaks when C-g is used in
    Emacs; also, malloc is slower and causes storage fragmentation.  On
-   the other hand, malloc is more portable, and easier to debug.  
-   
+   the other hand, malloc is more portable, and easier to debug.
+
    Because we sometimes use alloca, some routines have to be macros,
    not functions -- `alloca'-allocated space disappears at the end of the
    function it is called in.  */
@@ -199,7 +199,7 @@
 #ifndef _AIX /* Already did AIX, up at the top.  */
 char *alloca ();
 #endif /* not _AIX */
-#endif /* not HAVE_ALLOCA_H */ 
+#endif /* not HAVE_ALLOCA_H */
 #endif /* not __GNUC__ */
 
 #endif /* not alloca */
@@ -302,9 +302,9 @@
 
         /* Analogously, for end of buffer/string.  */
   endbuf,
- 
+
         /* Followed by two byte relative address to which to jump.  */
-  jump, 
+  jump,
 
 	/* Same as jump, but marks the end of an alternative.  */
   jump_past_alt,
@@ -312,11 +312,11 @@
         /* Followed by two-byte relative address of place to resume at
            in case of failure.  */
   on_failure_jump,
-	
+
         /* Like on_failure_jump, but pushes a placeholder instead of the
            current string position when executed.  */
   on_failure_keep_string_jump,
-  
+
         /* Throw away latest failure point and then jump to following
            two-byte relative address.  */
   pop_failure_jump,
@@ -412,7 +412,7 @@
     int *dest;
     unsigned char *source;
 {
-  int temp = SIGN_EXTEND_CHAR (*(source + 1)); 
+  int temp = SIGN_EXTEND_CHAR (*(source + 1));
   *dest = *source & 0377;
   *dest += temp << 8;
 }
@@ -438,7 +438,7 @@
 extract_number_and_incr (destination, source)
     int *destination;
     unsigned char **source;
-{ 
+{
   extract_number (destination, *source);
   *source += 2;
 }
@@ -487,8 +487,8 @@
     char *fastmap;
 {
   unsigned was_a_range = 0;
-  unsigned i = 0;  
-  
+  unsigned i = 0;
+
   while (i < (1 << BYTEWIDTH))
     {
       if (fastmap[i++])
@@ -507,7 +507,7 @@
             }
         }
     }
-  putchar ('\n'); 
+  putchar ('\n');
 }
 
 
@@ -528,7 +528,7 @@
       printf ("(null)\n");
       return;
     }
-    
+
   /* Loop over pattern commands.  */
   while (p < pend)
     {
@@ -574,14 +574,14 @@
 
             printf ("/charset%s",
 	            (re_opcode_t) *(p - 1) == charset_not ? "_not" : "");
-            
+
             assert (p + *p < pend);
 
             for (c = 0; c < *p; c++)
               {
                 unsigned bit;
                 unsigned char map_byte = p[1 + c];
-                
+
                 putchar ('/');
 
 		for (bit = 0; bit < BYTEWIDTH; bit++)
@@ -618,7 +618,7 @@
 	case push_dummy_failure:
           printf ("/push_dummy_failure");
           break;
-          
+
         case maybe_pop_jump:
           extract_number_and_incr (&mcnt, &p);
   	  printf ("/maybe_pop_jump/0/%d", mcnt);
@@ -627,36 +627,36 @@
         case pop_failure_jump:
 	  extract_number_and_incr (&mcnt, &p);
   	  printf ("/pop_failure_jump/0/%d", mcnt);
-	  break;          
-          
+	  break;
+
         case jump_past_alt:
 	  extract_number_and_incr (&mcnt, &p);
   	  printf ("/jump_past_alt/0/%d", mcnt);
-	  break;          
-          
+	  break;
+
         case jump:
 	  extract_number_and_incr (&mcnt, &p);
   	  printf ("/jump/0/%d", mcnt);
 	  break;
 
-        case succeed_n: 
+        case succeed_n:
           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
  	  printf ("/succeed_n/0/%d/0/%d", mcnt, mcnt2);
           break;
-        
-        case jump_n: 
+
+        case jump_n:
           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
  	  printf ("/jump_n/0/%d/0/%d", mcnt, mcnt2);
           break;
-        
-        case set_number_at: 
+
+        case set_number_at:
           extract_number_and_incr (&mcnt, &p);
           extract_number_and_incr (&mcnt2, &p);
  	  printf ("/set_number_at/0/%d/0/%d", mcnt, mcnt2);
           break;
-        
+
         case wordbound:
 	  printf ("/wordbound");
 	  break;
@@ -668,10 +668,10 @@
 	case wordbeg:
 	  printf ("/wordbeg");
 	  break;
-          
+
 	case wordend:
 	  printf ("/wordend");
-          
+
 #ifdef emacs
 	case before_dot:
 	  printf ("/before_dot");
@@ -690,7 +690,7 @@
 	  mcnt = *p++;
 	  printf ("/%d", mcnt);
           break;
-	  
+
 	case notsyntaxspec:
           printf ("/notsyntaxspec");
 	  mcnt = *p++;
@@ -701,7 +701,7 @@
 	case wordchar:
 	  printf ("/wordchar");
           break;
-	  
+
 	case notwordchar:
 	  printf ("/notwordchar");
           break;
@@ -758,7 +758,7 @@
     int size2;
 {
   unsigned this_char;
-  
+
   if (where == NULL)
     printf ("(null)");
   else
@@ -768,7 +768,7 @@
           for (this_char = where - string1; this_char < size1; this_char++)
             printchar (string1[this_char]);
 
-          where = string2;    
+          where = string2;
         }
 
       for (this_char = where - string2; this_char < size2; this_char++)
@@ -809,7 +809,7 @@
     reg_syntax_t syntax;
 {
   reg_syntax_t ret = re_syntax_options;
-  
+
   re_syntax_options = syntax;
   return ret;
 }
@@ -845,7 +845,7 @@
 static boolean group_in_compile_stack ();
 static reg_errcode_t compile_range ();
 
-/* Fetch the next character in the uncompiled pattern---translating it 
+/* Fetch the next character in the uncompiled pattern---translating it
    if necessary.  Also cast from a signed character in the constant
    string passed to us by the user to an unsigned char that we can use
    as an array index (in, e.g., `translate').  */
@@ -985,7 +985,7 @@
   pattern_offset_t begalt_offset;
   pattern_offset_t fixup_alt_jump;
   pattern_offset_t inner_group_offset;
-  pattern_offset_t laststart_offset;  
+  pattern_offset_t laststart_offset;
   regnum_t regnum;
 } compile_stack_elt_t;
 
@@ -1028,7 +1028,7 @@
            PATFETCH (c);						\
          } 								\
        } 								\
-    }		
+    }
 
 #define CHAR_CLASS_MAX_LENGTH  6 /* Namely, `xdigit'.  */
 
@@ -1054,7 +1054,7 @@
      `fastmap_accurate' is zero;
      `re_nsub' is the number of subexpressions in PATTERN;
      `not_bol' and `not_eol' are zero;
-   
+
    The `fastmap' and `newline_anchor' fields are neither
    examined nor set.  */
 
@@ -1069,20 +1069,20 @@
      `char *' (i.e., signed), we declare these variables as unsigned, so
      they can be reliably used as array indices.  */
   register unsigned char c, c1;
-  
+
   /* A random tempory spot in PATTERN.  */
   const char *p1;
 
   /* Points to the end of the buffer, where we should append.  */
   register unsigned char *b;
-  
+
   /* Keeps track of unclosed groups.  */
   compile_stack_type compile_stack;
 
   /* Points to the current (ending) position in the pattern.  */
   const char *p = pattern;
   const char *pend = pattern + size;
-  
+
   /* How to translate the characters in the pattern.  */
   char *translate = bufp->translate;
 
@@ -1103,7 +1103,7 @@
   /* Place in the uncompiled pattern (i.e., the {) to
      which to go back if the interval is invalid.  */
   const char *beg_interval;
-                
+
   /* Address of the place where a forward jump should go to the end of
      the containing expression.  Each alternative of an `or' -- except the
      last -- ends with a forward jump of this sort.  */
@@ -1119,7 +1119,7 @@
   if (debug)
     {
       unsigned debug_count;
-      
+
       for (debug_count = 0; debug_count < size; debug_count++)
         printchar (pattern[debug_count]);
       putchar ('\n');
@@ -1143,9 +1143,9 @@
      printer (for debugging) will think there's no pattern.  We reset it
      at the end.  */
   bufp->used = 0;
-  
+
   /* Always count groups, whether or not bufp->no_sub is set.  */
-  bufp->re_nsub = 0;				
+  bufp->re_nsub = 0;
 
 #if !defined (emacs) && !defined (SYNTAX_TABLE)
   /* Initialize the syntax table.  */
@@ -1196,7 +1196,7 @@
         case '$':
           {
             if (   /* If at end of pattern, it's an operator.  */
-                   p == pend 
+                   p == pend
                    /* If context independent, it's an operator.  */
                 || syntax & RE_CONTEXT_INDEP_ANCHORS
                    /* Otherwise, depends on what's next.  */
@@ -1227,7 +1227,7 @@
           {
             /* Are we optimizing this jump?  */
             boolean keep_string_p = false;
-            
+
             /* 1 means zero (many) matches is allowed.  */
             char zero_times_ok = 0, many_times_ok = 0;
 
@@ -1275,7 +1275,7 @@
 
             /* Star, etc. applied to an empty pattern is equivalent
                to an empty pattern.  */
-            if (!laststart)  
+            if (!laststart)
               break;
 
             /* Now we know whether or not zero matches is allowed
@@ -1284,7 +1284,7 @@
               { /* More than one repetition is allowed, so put in at the
                    end a backward relative jump from `b' to before the next
                    jump we're going to put in below (which jumps from
-                   laststart to after this jump).  
+                   laststart to after this jump).
 
                    But if we are at the `*' in the exact sequence `.*\n',
                    insert an unconditional jump backwards to the .,
@@ -1361,7 +1361,7 @@
 
             /* We test `*p == '^' twice, instead of using an if
                statement, so we only need one BUF_PUSH.  */
-            BUF_PUSH (*p == '^' ? charset_not : charset); 
+            BUF_PUSH (*p == '^' ? charset_not : charset);
             if (*p == '^')
               p++;
 
@@ -1411,8 +1411,8 @@
                    was a character: if this is a hyphen not at the
                    beginning or the end of a list, then it's the range
                    operator.  */
-                if (c == '-' 
-                    && !(p - 2 >= pattern && p[-2] == '[') 
+                if (c == '-'
+                    && !(p - 2 >= pattern && p[-2] == '[')
                     && !(p - 3 >= pattern && p[-3] == '[' && p[-2] == '^')
                     && *p != ']')
                   {
@@ -1427,7 +1427,7 @@
 
 		    /* Move past the `-'.  */
                     PATFETCH (c1);
-                    
+
                     ret = compile_range (&p, pend, translate, syntax, b);
                     if (ret != REG_NOERROR) return ret;
                   }
@@ -1456,7 +1456,7 @@
                     str[c1] = '\0';
 
                     /* If isn't a word bracketed by `[:' and:`]':
-                       undo the ending character, the letters, and leave 
+                       undo the ending character, the letters, and leave
                        the leading `:' and `[' (but set bits for them).  */
                     if (c == ':' && *p == ']')
                       {
@@ -1473,12 +1473,12 @@
                         boolean is_space = STREQ (str, "space");
                         boolean is_upper = STREQ (str, "upper");
                         boolean is_xdigit = STREQ (str, "xdigit");
-                        
+
                         if (!IS_CHAR_CLASS (str)) return REG_ECTYPE;
 
                         /* Throw away the ] at the end of the character
                            class.  */
-                        PATFETCH (c);					
+                        PATFETCH (c);
 
                         if (p == pend) return REG_EBRACK;
 
@@ -1503,7 +1503,7 @@
                     else
                       {
                         c1++;
-                        while (c1--)    
+                        while (c1--)
                           PATUNFETCH;
                         SET_LIST_BIT ('[');
                         SET_LIST_BIT (':');
@@ -1519,8 +1519,8 @@
 
             /* Discard any (non)matching list bytes that are all 0 at the
                end of the map.  Decrease the map-length byte too.  */
-            while ((int) b[-1] > 0 && b[b[-1] - 1] == 0) 
-              b[-1]--; 
+            while ((int) b[-1] > 0 && b[b[-1] - 1] == 0)
+              b[-1]--;
             b += b[-1];
           }
           break;
@@ -1580,7 +1580,7 @@
               regnum++;
 
               if (COMPILE_STACK_FULL)
-                { 
+                {
                   RETALLOC (compile_stack.stack, compile_stack.size << 1,
                             compile_stack_elt_t);
                   if (compile_stack.stack == NULL) return REG_ESPACE;
@@ -1593,7 +1593,7 @@
                  whole pattern moves because of realloc, they will still
                  be valid.  */
               COMPILE_STACK_TOP.begalt_offset = begalt - bufp->buffer;
-              COMPILE_STACK_TOP.fixup_alt_jump 
+              COMPILE_STACK_TOP.fixup_alt_jump
                 = fixup_alt_jump ? fixup_alt_jump - bufp->buffer + 1 : 0;
               COMPILE_STACK_TOP.laststart_offset = b - bufp->buffer;
               COMPILE_STACK_TOP.regnum = regnum;
@@ -1607,7 +1607,7 @@
                   COMPILE_STACK_TOP.inner_group_offset = b - bufp->buffer + 2;
                   BUF_PUSH_3 (start_memory, regnum, 0);
                 }
-                
+
               compile_stack.avail++;
 
               fixup_alt_jump = 0;
@@ -1636,7 +1636,7 @@
                      `pop_failure_jump' to pop.  See comments at
                      `push_dummy_failure' in `re_match_2'.  */
                   BUF_PUSH (push_dummy_failure);
-                  
+
                   /* We allocated space for this jump when we assigned
                      to `fixup_alt_jump', in the `handle_alt' case below.  */
                   STORE_JUMP (jump_past_alt, fixup_alt_jump, b - 1);
@@ -1658,11 +1658,11 @@
                    as in `(ab)c(de)' -- the second group is #2.  */
                 regnum_t this_group_regnum;
 
-                compile_stack.avail--;		
+                compile_stack.avail--;
                 begalt = bufp->buffer + COMPILE_STACK_TOP.begalt_offset;
                 fixup_alt_jump
                   = COMPILE_STACK_TOP.fixup_alt_jump
-                    ? bufp->buffer + COMPILE_STACK_TOP.fixup_alt_jump - 1 
+                    ? bufp->buffer + COMPILE_STACK_TOP.fixup_alt_jump - 1
                     : 0;
                 laststart = bufp->buffer + COMPILE_STACK_TOP.laststart_offset;
                 this_group_regnum = COMPILE_STACK_TOP.regnum;
@@ -1677,7 +1677,7 @@
                   {
                     unsigned char *inner_group_loc
                       = bufp->buffer + COMPILE_STACK_TOP.inner_group_offset;
-                    
+
                     *inner_group_loc = regnum - this_group_regnum;
                     BUF_PUSH_3 (stop_memory, this_group_regnum,
                                 regnum - this_group_regnum);
@@ -1706,10 +1706,10 @@
                  jump (put in below, which in turn will jump to the next
                  (if any) alternative's such jump, etc.).  The last such
                  jump jumps to the correct final destination.  A picture:
-                          _____ _____ 
-                          |   | |   |   
-                          |   v |   v 
-                         a | b   | c   
+                          _____ _____
+                          |   | |   |
+                          |   v |   v
+                         a | b   | c
 
                  If we are at `b', then fixup_alt_jump right now points to a
                  three-byte space after `a'.  We'll put in the jump, set
@@ -1731,10 +1731,10 @@
               break;
 
 
-            case '{': 
+            case '{':
               /* If \{ is a literal.  */
               if (!(syntax & RE_INTERVALS)
-                     /* If we're at `\{' and it's not the open-interval 
+                     /* If we're at `\{' and it's not the open-interval
                         operator.  */
                   || ((syntax & RE_INTERVALS) && (syntax & RE_NO_BK_BRACES))
                   || (p - 2 == pattern  &&  p == pend))
@@ -1773,11 +1773,11 @@
                   {
                     if (syntax & RE_NO_BK_BRACES)
                       goto unfetch_interval;
-                    else 
+                    else
                       return REG_BADBR;
                   }
 
-                if (!(syntax & RE_NO_BK_BRACES)) 
+                if (!(syntax & RE_NO_BK_BRACES))
                   {
                     if (c != '\\') return REG_EBRACE;
 
@@ -1788,7 +1788,7 @@
                   {
                     if (syntax & RE_NO_BK_BRACES)
                       goto unfetch_interval;
-                    else 
+                    else
                       return REG_BADBR;
                   }
 
@@ -1824,7 +1824,7 @@
                       jump_n <succeed_n addr> <jump count>
                     (The upper bound and `jump_n' are omitted if
                     `upper_bound' is 1, though.)  */
-                 else 
+                 else
                    { /* If the upper bound is > 1, we need to insert
                         more at the end of the loop.  */
                      unsigned nbytes = 10 + (upper_bound > 1) * 10;
@@ -1841,7 +1841,7 @@
                                    lower_bound);
                      b += 5;
 
-                     /* Code to initialize the lower bound.  Insert 
+                     /* Code to initialize the lower bound.  Insert
                         before the `succeed_n'.  The `5' is the last two
                         bytes of this `set_number_at', plus 3 bytes of
                         the following `succeed_n'.  */
@@ -1852,7 +1852,7 @@
                        { /* More than one repetition is allowed, so
                             append a backward jump to the `succeed_n'
                             that starts this interval.
-                            
+
                             When we've reached this during matching,
                             we'll have matched the interval once, so
                             jump back only `upper_bound - 1' times.  */
@@ -1870,7 +1870,7 @@
                             so everything is getting moved up by 5.
                             Conclusion: (b - 2) - (laststart + 3) + 5,
                             i.e., b - laststart.
-                            
+
                             We insert this at the beginning of the loop
                             so that if we fail during matching, we'll
                             reinitialize the bounds.  */
@@ -1891,7 +1891,7 @@
                beg_interval = NULL;
 
                /* normal_char and normal_backslash need `c'.  */
-               PATFETCH (c);	
+               PATFETCH (c);
 
                if (!(syntax & RE_NO_BK_BRACES))
                  {
@@ -1907,7 +1907,7 @@
               BUF_PUSH (at_dot);
               break;
 
-            case 's':	
+            case 's':
               laststart = b;
               PATFETCH (c);
               BUF_PUSH_2 (syntaxspec, syntax_spec_code[c]);
@@ -1998,11 +1998,11 @@
         /* Expects the character in `c'.  */
 	normal_char:
 	      /* If no exactn currently being built.  */
-          if (!pending_exact 
+          if (!pending_exact
 
               /* If last exactn not at current position.  */
               || pending_exact + *pending_exact + 1 != b
-              
+
               /* We have only one byte following the exactn for the count.  */
 	      || *pending_exact == (1 << BYTEWIDTH) - 1
 
@@ -2017,26 +2017,26 @@
                       : (p[0] == '\\' && p[1] == '{'))))
 	    {
 	      /* Start building a new exactn.  */
-              
+
               laststart = b;
 
 	      BUF_PUSH_2 (exactn, 0);
 	      pending_exact = b - 1;
             }
-            
+
 	  BUF_PUSH (c);
           (*pending_exact)++;
 	  break;
         } /* switch (c) */
     } /* while p != pend */
 
-  
+
   /* Through the pattern now.  */
-  
+
   if (fixup_alt_jump)
     STORE_JUMP (jump_past_alt, fixup_alt_jump, b);
 
-  if (!COMPILE_STACK_EMPTY) 
+  if (!COMPILE_STACK_EMPTY)
     return REG_EPAREN;
 
   free (compile_stack.stack);
@@ -2092,14 +2092,14 @@
     re_opcode_t op;
     unsigned char *loc;
     int arg;
-    unsigned char *end;    
+    unsigned char *end;
 {
   register unsigned char *pfrom = end;
   register unsigned char *pto = end + 3;
 
   while (pfrom != loc)
     *--pto = *--pfrom;
-    
+
   store_op1 (op, loc, arg);
 }
 
@@ -2111,14 +2111,14 @@
     re_opcode_t op;
     unsigned char *loc;
     int arg1, arg2;
-    unsigned char *end;    
+    unsigned char *end;
 {
   register unsigned char *pfrom = end;
   register unsigned char *pto = end + 5;
 
   while (pfrom != loc)
     *--pto = *--pfrom;
-    
+
   store_op2 (op, loc, arg1, arg2);
 }
 
@@ -2134,7 +2134,7 @@
 {
   const char *prev = p - 2;
   boolean prev_prev_backslash = prev > pattern && prev[-1] == '\\';
-  
+
   return
        /* After a subexpression?  */
        (*prev == '(' && (syntax & RE_NO_BK_PARENS || prev_prev_backslash))
@@ -2154,7 +2154,7 @@
   const char *next = p;
   boolean next_backslash = *next == '\\';
   const char *next_next = p + 1 < pend ? p + 1 : NULL;
-  
+
   return
        /* Before a subexpression?  */
        (syntax & RE_NO_BK_PARENS ? *next == ')'
@@ -2165,7 +2165,7 @@
 }
 
 
-/* Returns true if REGNUM is in one of COMPILE_STACK's elements and 
+/* Returns true if REGNUM is in one of COMPILE_STACK's elements and
    false if it's not.  */
 
 static boolean
@@ -2175,8 +2175,8 @@
 {
   int this_element;
 
-  for (this_element = compile_stack.avail - 1;  
-       this_element >= 0; 
+  for (this_element = compile_stack.avail - 1;
+       this_element >= 0;
        this_element--)
     if (compile_stack.stack[this_element].regnum == regnum)
       return true;
@@ -2190,9 +2190,9 @@
    starting character is in `P[-2]'.  (`P[-1]' is the character `-'.)
    Then we set the translation of all bits between the starting and
    ending characters (inclusive) in the compiled pattern B.
-   
+
    Return an error code.
-   
+
    We use these short variable names so we can use the same macros as
    `regex_compile' itself.  */
 
@@ -2207,7 +2207,7 @@
 
   const char *p = *p_ptr;
   int range_start, range_end;
-  
+
   if (p == pend)
     return REG_ERANGE;
 
@@ -2216,7 +2216,7 @@
      is set, the range endpoints will be negative if we fetch using a
      signed char *.
 
-     We also want to fetch the endpoints without translating them; the 
+     We also want to fetch the endpoints without translating them; the
      appropriate translation is done in the bit-setting loop below.  */
   range_start = ((unsigned char *) p)[-2];
   range_end   = ((unsigned char *) p)[0];
@@ -2237,14 +2237,14 @@
     {
       SET_LIST_BIT (TRANSLATE (this_char));
     }
-  
+
   return REG_NOERROR;
 }
 
 /* Failure stack declarations and macros; both re_compile_fastmap and
    re_match_2 use a failure stack.  These have to be macros because of
    REGEX_ALLOCATE.  */
-   
+
 
 /* Number of failure points for which to initially allocate space
    when matching.  If this number is exceeded, we allocate more
@@ -2292,8 +2292,8 @@
 /* Double the size of FAIL_STACK, up to approximately `re_max_failures' items.
 
    Return 1 if succeeds, and 0 if either ran out of memory
-   allocating space for it or it was already too large.  
-   
+   allocating space for it or it was already too large.
+
    REGEX_REALLOCATE requires `destination' be declared.   */
 
 #define DOUBLE_FAIL_STACK(fail_stack)					\
@@ -2310,7 +2310,7 @@
          1)))
 
 
-/* Push PATTERN_OP on FAIL_STACK. 
+/* Push PATTERN_OP on FAIL_STACK.
 
    Return 1 if was able to do so and 0 if ran out of memory allocating
    space to do so.  */
@@ -2341,12 +2341,12 @@
 
 
 /* Push the information about the state we will need
-   if we ever fail back to it.  
-   
+   if we ever fail back to it.
+
    Requires variables fail_stack, regstart, regend, reg_info, and
    num_regs be declared.  DOUBLE_FAIL_STACK requires `destination' be
    declared.
-   
+
    Does `return FAILURE_CODE' if runs out of memory.  */
 
 #define PUSH_FAILURE_POINT(pattern_place, string_place, failure_code)	\
@@ -2454,7 +2454,7 @@
      LOW_REG, HIGH_REG -- the highest and lowest active registers.
      REGSTART, REGEND -- arrays of string positions.
      REG_INFO -- array of information about each subexpression.
-   
+
    Also assumes the variables `fail_stack' and (if debugging), `bufp',
    `pend', `string1', `size1', `string2', and `size2'.  */
 
@@ -2522,7 +2522,7 @@
 
    The caller must supply the address of a (1 << BYTEWIDTH)-byte data
    area as BUFP->fastmap.
-   
+
    We set the `fastmap', `fastmap_accurate', and `can_be_null' fields in
    the pattern buffer.
 
@@ -2539,7 +2539,7 @@
 #endif
   /* We don't push any register information onto the failure stack.  */
   unsigned num_regs = 0;
-  
+
   register char *fastmap = bufp->fastmap;
   unsigned char *pattern = bufp->buffer;
   unsigned long size = bufp->used;
@@ -2556,27 +2556,27 @@
   boolean succeed_n_p = false;
 
   assert (fastmap != NULL && p != NULL);
-  
+
   INIT_FAIL_STACK ();
   bzero (fastmap, 1 << BYTEWIDTH);  /* Assume nothing's valid.  */
   bufp->fastmap_accurate = 1;	    /* It will be when we're done.  */
   bufp->can_be_null = 0;
-      
+
   while (p != pend || !FAIL_STACK_EMPTY ())
     {
       if (p == pend)
         {
           bufp->can_be_null |= path_can_be_null;
-          
+
           /* Reset for next path.  */
           path_can_be_null = true;
-          
+
           p = fail_stack.stack[--fail_stack.avail];
 	}
 
       /* We should never be about to go beyond the end of the pattern.  */
       assert (p < pend);
-      
+
 #ifdef SWITCH_ENUM_BUG
       switch ((int) ((re_opcode_t) *p++))
 #else
@@ -2700,10 +2700,10 @@
         case jump_past_alt:
 	case dummy_failure_jump:
           EXTRACT_NUMBER_AND_INCR (j, p);
-	  p += j;	
+	  p += j;
 	  if (j > 0)
 	    continue;
-            
+
           /* Jump backward implies we just went through the body of a
              loop and matched nothing.  Opcode jumped to should be
              `on_failure_jump' or `succeed_n'.  Just treat it like an
@@ -2715,10 +2715,10 @@
 
           p++;
           EXTRACT_NUMBER_AND_INCR (j, p);
-          p += j;		
-	  
+          p += j;
+
           /* If what's on the stack is where we are now, pop it.  */
-          if (!FAIL_STACK_EMPTY () 
+          if (!FAIL_STACK_EMPTY ()
 	      && fail_stack.stack[fail_stack.avail - 1] == p)
             fail_stack.avail--;
 
@@ -2756,7 +2756,7 @@
 
 	case succeed_n:
           /* Get to the number of times to succeed.  */
-          p += 2;		
+          p += 2;
 
           /* Increment p past the n for when k != 0.  */
           EXTRACT_NUMBER_AND_INCR (k, p);
@@ -2847,7 +2847,7 @@
      int size, startpos, range;
      struct re_registers *regs;
 {
-  return re_search_2 (bufp, NULL, 0, string, size, startpos, range, 
+  return re_search_2 (bufp, NULL, 0, string, size, startpos, range,
 		      regs, size);
 }
 
@@ -2855,17 +2855,17 @@
 /* Using the compiled pattern in BUFP->buffer, first tries to match the
    virtual concatenation of STRING1 and STRING2, starting first at index
    STARTPOS, then at STARTPOS + 1, and so on.
-   
+
    STRING1 and STRING2 have length SIZE1 and SIZE2, respectively.
-   
+
    RANGE is how far to scan while trying to match.  RANGE = 0 means try
    only at STARTPOS; in general, the last start tried is STARTPOS +
    RANGE.
-   
+
    In REGS, return the indices of the virtual concatenation of STRING1
    and STRING2 that matched the entire BUFP->buffer and its contained
    subexpressions.
-   
+
    Do not consider matching one past the index STOP in the virtual
    concatenation of STRING1 and STRING2.
 
@@ -2892,7 +2892,7 @@
   /* Check for out-of-range STARTPOS.  */
   if (startpos < 0 || startpos > total_size)
     return -1;
-    
+
   /* Fix up RANGE if it might eventually take us outside
      the virtual concatenation of STRING1 and STRING2.  */
   if (endpos < -1)
@@ -2914,10 +2914,10 @@
   if (fastmap && !bufp->fastmap_accurate)
     if (re_compile_fastmap (bufp) == -2)
       return -2;
-  
+
   /* Loop through the string, looking for a place to start matching.  */
   for (;;)
-    { 
+    {
       /* If a fastmap is supplied, skip quickly over characters that
          cannot be the start of a match.  If the pattern can match the
          null string, however, we don't need to skip characters; we want
@@ -2934,7 +2934,7 @@
                 lim = range - (size1 - startpos);
 
 	      d = (startpos >= size1 ? string2 - size1 : string1) + startpos;
-   
+
               /* Written out as an if-else to avoid testing `translate'
                  inside the loop.  */
 	      if (translate)
@@ -2951,7 +2951,7 @@
 	  else				/* Searching backwards.  */
 	    {
 	      register char c = (size1 == 0 || startpos >= size1
-                                 ? string2[startpos - size1] 
+                                 ? string2[startpos - size1]
                                  : string1[startpos]);
 
 	      if (!fastmap[(unsigned char) TRANSLATE (c)])
@@ -2968,21 +2968,21 @@
 	                startpos, regs, stop);
       if (val >= 0)
 	return startpos;
-        
+
       if (val == -2)
 	return -2;
 
     advance:
-      if (!range) 
+      if (!range)
         break;
-      else if (range > 0) 
+      else if (range > 0)
         {
-          range--; 
+          range--;
           startpos++;
         }
       else
         {
-          range++; 
+          range++;
           startpos--;
         }
     }
@@ -3001,8 +3001,8 @@
    onto the failure stack.  Other register information, such as the
    starting and ending positions (which are addresses), and the list of
    inner groups (which is a bits list) are maintained in separate
-   variables.  
-   
+   variables.
+
    We are making a (strictly speaking) nonportable assumption here: that
    the compiler will pack our bit fields into something that fits into
    the type of `word', i.e., is something that fits into one item on the
@@ -3076,7 +3076,7 @@
 /* Test if at very beginning or at very end of the virtual concatenation
    of `string1' and `string2'.  If only one string, it's `string2'.  */
 #define AT_STRINGS_BEG(d) ((d) == (size1 ? string1 : string2) || !size2)
-#define AT_STRINGS_END(d) ((d) == end2)	
+#define AT_STRINGS_END(d) ((d) == end2)
 
 
 /* Test if D points to a character which is word-constituent.  We have
@@ -3139,7 +3139,7 @@
      int size, pos;
      struct re_registers *regs;
  {
-  return re_match_2 (bufp, NULL, 0, string, size, pos, regs, size); 
+  return re_match_2 (bufp, NULL, 0, string, size, pos, regs, size);
 }
 #endif /* not emacs */
 
@@ -3148,7 +3148,7 @@
    the (virtual) concatenation of STRING1 and STRING2 (of length SIZE1
    and SIZE2, respectively).  We start matching at POS, and stop
    matching at STOP.
-   
+
    If REGS is non-null and the `no_sub' field of BUFP is nonzero, we
    store offsets for the substring each group matched in REGS.  See the
    documentation for exactly how many groups we fill.
@@ -3179,7 +3179,7 @@
 
   /* Where we are in the data, and the end of the current string.  */
   const char *d, *dend;
-  
+
   /* Where we are in the pattern, and the end of the pattern.  */
   unsigned char *p = bufp->buffer;
   register unsigned char *pend = p + bufp->used;
@@ -3206,7 +3206,7 @@
      return, for use in backreferences.  The number here includes
      an element for register zero.  */
   unsigned num_regs = bufp->re_nsub + 1;
-  
+
   /* The currently active registers.  */
   unsigned lowest_active_reg = NO_LOWEST_ACTIVE_REG;
   unsigned highest_active_reg = NO_HIGHEST_ACTIVE_REG;
@@ -3233,15 +3233,15 @@
      matched any of the pattern so far this time through the reg_num-th
      subexpression.  These two fields get reset each time through any
      loop their register is in.  */
-  register_info_type *reg_info; 
+  register_info_type *reg_info;
 
   /* The following record the register info as found in the above
-     variables when we find a match better than any we've seen before. 
+     variables when we find a match better than any we've seen before.
      This happens as we backtrack through the failure points, which in
      turn happens only if we have not yet matched the entire string. */
   unsigned best_regs_set = false;
   const char **best_regstart, **best_regend;
-  
+
   /* Logically, this is `best_regend[0]'.  But we don't want to have to
      allocate space for that if we're not allocating space for anything
      else (see below).  Also, we never need info about register 0 for
@@ -3258,13 +3258,13 @@
 
 #ifdef DEBUG
   /* Counts the total number of registers pushed.  */
-  unsigned num_regs_pushed = 0; 	
+  unsigned num_regs_pushed = 0;
 #endif
 
   DEBUG_PRINT1 ("\n\nEntering re_match_2.\n");
-  
+
   INIT_FAIL_STACK ();
-  
+
   /* Do not bother to initialize all the register variables if there are
      no groups in the pattern, as it takes a fair amount of time.  If
      there are groups, we include space for register 0 (the whole
@@ -3282,8 +3282,8 @@
       reg_dummy = REGEX_TALLOC (num_regs, const char *);
       reg_info_dummy = REGEX_TALLOC (num_regs, register_info_type);
 
-      if (!(regstart && regend && old_regstart && old_regend && reg_info 
-            && best_regstart && best_regend && reg_dummy && reg_info_dummy)) 
+      if (!(regstart && regend && old_regstart && old_regend && reg_info
+            && best_regstart && best_regend && reg_dummy && reg_info_dummy))
         {
           FREE_VARIABLES ();
           return -2;
@@ -3306,21 +3306,21 @@
       FREE_VARIABLES ();
       return -1;
     }
-    
+
   /* Initialize subexpression text positions to -1 to mark ones that no
      start_memory/stop_memory has been seen for. Also initialize the
      register information struct.  */
   for (mcnt = 1; mcnt < num_regs; mcnt++)
     {
-      regstart[mcnt] = regend[mcnt] 
+      regstart[mcnt] = regend[mcnt]
         = old_regstart[mcnt] = old_regend[mcnt] = REG_UNSET_VALUE;
-        
+
       REG_MATCH_NULL_STRING_P (reg_info[mcnt]) = MATCH_NULL_UNSET_VALUE;
       IS_ACTIVE (reg_info[mcnt]) = 0;
       MATCHED_SOMETHING (reg_info[mcnt]) = 0;
       EVER_MATCHED_SOMETHING (reg_info[mcnt]) = 0;
     }
-  
+
   /* We move `string1' into `string2' if the latter's empty -- but not if
      `string1' is null.  */
   if (size2 == 0 && string1 != NULL)
@@ -3345,7 +3345,7 @@
       end_match_2 = string2 + stop - size1;
     }
 
-  /* `p' scans through the pattern as `d' scans through the data. 
+  /* `p' scans through the pattern as `d' scans through the data.
      `dend' is the end of the input string that `d' points within.  `d'
      is advanced into the following input string whenever necessary, but
      this happens before fetching; therefore, at the beginning of the
@@ -3367,7 +3367,7 @@
   DEBUG_PRINT1 ("The string to match is: `");
   DEBUG_PRINT_DOUBLE_STRING (d, string1, size1, string2, size2);
   DEBUG_PRINT1 ("'\n");
-  
+
   /* This loops over pattern commands.  It exits by returning from the
      function if the match is complete, or it drops through if the match
      fails at this starting point in the input data.  */
@@ -3378,16 +3378,16 @@
       if (p == pend)
 	{ /* End of pattern means we might have succeeded.  */
           DEBUG_PRINT1 ("end of pattern ... ");
-          
+
 	  /* If we haven't matched the entire string, and we want the
              longest match, try backtracking.  */
           if (d != end_match_2)
 	    {
               DEBUG_PRINT1 ("backtracking.\n");
-              
+
               if (!FAIL_STACK_EMPTY ())
                 { /* More failure points to try.  */
-                  boolean same_str_p = (FIRST_STRING_P (match_end) 
+                  boolean same_str_p = (FIRST_STRING_P (match_end)
 	        	                == MATCHING_IN_FIRST_STRING);
 
                   /* If exceeds best match so far, save it.  */
@@ -3397,20 +3397,20 @@
                     {
                       best_regs_set = true;
                       match_end = d;
-                      
+
                       DEBUG_PRINT1 ("\nSAVING match as best so far.\n");
-                      
+
                       for (mcnt = 1; mcnt < num_regs; mcnt++)
                         {
                           best_regstart[mcnt] = regstart[mcnt];
                           best_regend[mcnt] = regend[mcnt];
                         }
                     }
-                  goto fail;	       
+                  goto fail;
                 }
 
               /* If no failure points, don't restore garbage.  */
-              else if (best_regs_set)   
+              else if (best_regs_set)
                 {
   	        restore_best_regs:
                   /* Restore best match.  It may happen that `dend ==
@@ -3419,7 +3419,7 @@
                      strings `x-' and `y-z-', if the two strings are
                      not consecutive in memory.  */
                   DEBUG_PRINT1 ("Restoring best registers.\n");
-                  
+
                   d = match_end;
                   dend = ((d >= string1 && d <= end1)
 		           ? end_match_1 : end_match_2);
@@ -3474,7 +3474,7 @@
                   regs->end[0] = (MATCHING_IN_FIRST_STRING ? d - string1
 			          : d - string2 + size1);
                 }
-              
+
               /* Go through the first `min (num_regs, regs->num_regs)'
                  registers, since that is all we initialized.  */
 	      for (mcnt = 1; mcnt < MIN (num_regs, regs->num_regs); mcnt++)
@@ -3487,7 +3487,7 @@
                       regs->end[mcnt] = POINTER_TO_OFFSET (regend[mcnt]);
                     }
 		}
-              
+
               /* If the regs structure we return has more elements than
                  were in the pattern, set the extra elements to -1.  If
                  we (re)allocated the registers, this is the case,
@@ -3503,8 +3503,8 @@
                         nfailure_points_pushed - nfailure_points_popped);
           DEBUG_PRINT2 ("%u registers pushed.\n", num_regs_pushed);
 
-          mcnt = d - pos - (MATCHING_IN_FIRST_STRING 
-			    ? string1 
+          mcnt = d - pos - (MATCHING_IN_FIRST_STRING
+			    ? string1
 			    : string2 - size1);
 
           DEBUG_PRINT2 ("Returning %d from re_match_2.\n", mcnt);
@@ -3594,7 +3594,7 @@
 	    p += 1 + *p;
 
 	    if (!not) goto fail;
-            
+
 	    SET_REGS_MATCHED ();
             d++;
 	    break;
@@ -3611,9 +3611,9 @@
 
           /* Find out if this group can match the empty string.  */
 	  p1 = p;		/* To send to group_match_null_string_p.  */
-          
+
           if (REG_MATCH_NULL_STRING_P (reg_info[*p]) == MATCH_NULL_UNSET_VALUE)
-            REG_MATCH_NULL_STRING_P (reg_info[*p]) 
+            REG_MATCH_NULL_STRING_P (reg_info[*p])
               = group_match_null_string_p (&p1, pend, reg_info);
 
           /* Save the position in the string where we were the last time
@@ -3624,7 +3624,7 @@
           old_regstart[*p] = REG_MATCH_NULL_STRING_P (reg_info[*p])
                              ? REG_UNSET (regstart[*p]) ? d : regstart[*p]
                              : regstart[*p];
-	  DEBUG_PRINT2 ("  old_regstart: %d\n", 
+	  DEBUG_PRINT2 ("  old_regstart: %d\n",
 			 POINTER_TO_OFFSET (old_regstart[*p]));
 
           regstart[*p] = d;
@@ -3632,10 +3632,10 @@
 
           IS_ACTIVE (reg_info[*p]) = 1;
           MATCHED_SOMETHING (reg_info[*p]) = 0;
-          
+
           /* This is the new highest active register.  */
           highest_active_reg = *p;
-          
+
           /* If nothing was active before, this is the new lowest active
              register.  */
           if (lowest_active_reg == NO_LOWEST_ACTIVE_REG)
@@ -3651,7 +3651,7 @@
            number, and the number of inner groups.  */
 	case stop_memory:
 	  DEBUG_PRINT3 ("EXECUTING stop_memory %d (%d):\n", *p, p[1]);
-             
+
           /* We need to save the string position the last time we were at
              this close-group operator in case the group is operated
              upon by a repetition operator, e.g., with `((a*)*(b*)*)*'
@@ -3660,7 +3660,7 @@
           old_regend[*p] = REG_MATCH_NULL_STRING_P (reg_info[*p])
                            ? REG_UNSET (regend[*p]) ? d : regend[*p]
 			   : regend[*p];
-	  DEBUG_PRINT2 ("      old_regend: %d\n", 
+	  DEBUG_PRINT2 ("      old_regend: %d\n",
 			 POINTER_TO_OFFSET (old_regend[*p]));
 
           regend[*p] = d;
@@ -3668,7 +3668,7 @@
 
           /* This register isn't active anymore.  */
           IS_ACTIVE (reg_info[*p]) = 0;
-          
+
           /* If this was the only register active, nothing is active
              anymore.  */
           if (lowest_active_reg == highest_active_reg)
@@ -3684,7 +3684,7 @@
               unsigned char r = *p - 1;
               while (r > 0 && !IS_ACTIVE (reg_info[r]))
                 r--;
-              
+
               /* If we end up at register zero, that means that we saved
                  the registers as the result of an `on_failure_jump', not
                  a `start_memory', and we jumped to past the innermost
@@ -3700,7 +3700,7 @@
               else
                 highest_active_reg = r;
             }
-          
+
           /* If just failed to match something this time around with a
              group that's operated on by a repetition operator, try to
              force exit from the ``loop'', and restore the register
@@ -3708,10 +3708,10 @@
              last match.  */
           if ((!MATCHED_SOMETHING (reg_info[*p])
                || (re_opcode_t) p[-3] == start_memory)
-	      && (p + 2) < pend)              
+	      && (p + 2) < pend)
             {
               boolean is_a_jump_n = false;
-              
+
               p1 = p + 2;
               mcnt = 0;
               switch ((re_opcode_t) *p1++)
@@ -3726,12 +3726,12 @@
 		    if (is_a_jump_n)
 		      p1 += 2;
                     break;
-                  
+
                   default:
                     /* do nothing */ ;
                 }
 	      p1 += mcnt;
-        
+
               /* If the next operation is a jump backwards in the pattern
 	         to an on_failure_jump right before the start_memory
                  corresponding to this stop_memory, exit from the loop
@@ -3745,17 +3745,17 @@
                      failed match, e.g., with `(a*)*b' against `ab' for
                      regstart[1], and, e.g., with `((a*)*(b*)*)*'
                      against `aba' for regend[3].
-                     
+
                      Also restore the registers for inner groups for,
                      e.g., `((a*)(b*))*' against `aba' (register 3 would
                      otherwise get trashed).  */
-                     
+
                   if (EVER_MATCHED_SOMETHING (reg_info[*p]))
 		    {
-		      unsigned r; 
-        
+		      unsigned r;
+
                       EVER_MATCHED_SOMETHING (reg_info[*p]) = 0;
-                      
+
 		      /* Restore this and inner groups' (if any) registers.  */
                       for (r = *p; r < *p + *(p + 1); r++)
                         {
@@ -3764,7 +3764,7 @@
                           /* xx why this test?  */
                           if ((int) old_regend[r] >= (int) regstart[r])
                             regend[r] = old_regend[r];
-                        }     
+                        }
                     }
 		  p1++;
                   EXTRACT_NUMBER_AND_INCR (mcnt, p1);
@@ -3773,7 +3773,7 @@
                   goto fail;
                 }
             }
-          
+
           /* Move past the register number and the inner group count.  */
           p += 2;
           break;
@@ -3790,16 +3790,16 @@
 	    /* Can't back reference a group which we've never matched.  */
             if (REG_UNSET (regstart[regno]) || REG_UNSET (regend[regno]))
               goto fail;
-              
+
             /* Where in input to try to start matching.  */
             d2 = regstart[regno];
-            
+
             /* Where to stop matching; if both the place to start and
                the place to stop matching are in the same string, then
                set to the place to stop, otherwise, for now have to use
                the end of the first string.  */
 
-            dend2 = ((FIRST_STRING_P (regstart[regno]) 
+            dend2 = ((FIRST_STRING_P (regstart[regno])
 		      == FIRST_STRING_P (regend[regno]))
 		     ? regend[regno] : end_match_1);
 	    for (;;)
@@ -3823,16 +3823,16 @@
 
 		/* How many characters left in this segment to match.  */
 		mcnt = dend - d;
-                
+
 		/* Want how many consecutive characters we can match in
                    one shot, so, if necessary, adjust the count.  */
                 if (mcnt > dend2 - d2)
 		  mcnt = dend2 - d2;
-                  
+
 		/* Compare that many; failure if mismatch, else move
                    past them.  */
-		if (translate 
-                    ? bcmp_translate (d, d2, mcnt, translate) 
+		if (translate
+                    ? bcmp_translate (d, d2, mcnt, translate)
                     : bcmp (d, d2, mcnt))
 		  goto fail;
 		d += mcnt, d2 += mcnt;
@@ -3846,7 +3846,7 @@
            `newline_anchor' is set, after newlines.  */
 	case begline:
           DEBUG_PRINT1 ("EXECUTING begline.\n");
-          
+
           if (AT_STRINGS_BEG (d))
             {
               if (!bufp->not_bol) break;
@@ -3867,7 +3867,7 @@
             {
               if (!bufp->not_eol) break;
             }
-          
+
           /* We have to ``prefetch'' the next character.  */
           else if ((d == end1 ? *string2 : *d) == '\n'
                    && bufp->newline_anchor)
@@ -3901,7 +3901,7 @@
            then the . fails against the \n.  But the next thing we want
            to do is match the \n against the \n; if we restored the
            string value, we would be back at the foo.
-           
+
            Because this is used only in specific cases, we don't need to
            check all the things that `on_failure_jump' does, to make
            sure the right things get saved on the stack.  Hence we don't
@@ -3911,7 +3911,7 @@
            case; that seems worse than this.  */
         case on_failure_keep_string_jump:
           DEBUG_PRINT1 ("EXECUTING on_failure_keep_string_jump");
-          
+
           EXTRACT_NUMBER_AND_INCR (mcnt, p);
           DEBUG_PRINT3 (" %d (to 0x%x):\n", mcnt, p + mcnt);
 
@@ -3920,7 +3920,7 @@
 
 
 	/* Uses of on_failure_jump:
-        
+
            Each alternative starts with an on_failure_jump that points
            to the beginning of the next alternative.  Each alternative
            except the last ends with a jump that in effect jumps past
@@ -3986,7 +3986,7 @@
                would have to backtrack because of (as in, e.g., `a*a')
                then we can change to pop_failure_jump, because we'll
                never have to backtrack.
-               
+
                This is not true in the case of alternatives: in
                `(a|ab)*' we do need to backtrack to the `ab' alternative
                (e.g., if the string was `ab').  But instead of trying to
@@ -4018,7 +4018,7 @@
 		p1 = p + mcnt;
 
                 /* p1[0] ... p1[2] are the `on_failure_jump' corresponding
-                   to the `maybe_finalize_jump' of this case.  Examine what 
+                   to the `maybe_finalize_jump' of this case.  Examine what
                    follows.  */
                 if ((re_opcode_t) p1[3] == exactn && p1[5] != c)
                   {
@@ -4026,12 +4026,12 @@
                     DEBUG_PRINT3 ("  %c != %c => pop_failure_jump.\n",
                                   c, p1[5]);
                   }
-                  
+
 		else if ((re_opcode_t) p1[3] == charset
 			 || (re_opcode_t) p1[3] == charset_not)
 		  {
 		    int not = (re_opcode_t) p1[3] == charset_not;
-                    
+
 		    if (c < (unsigned char) (p1[4] * BYTEWIDTH)
 			&& p1[5 + c / BYTEWIDTH] & (1 << (c % BYTEWIDTH)))
 		      not = !not;
@@ -4080,7 +4080,7 @@
           }
           /* Note fall through.  */
 
-          
+
         /* Unconditionally jump (without popping any failure points).  */
         case jump:
 	unconditional_jump:
@@ -4090,7 +4090,7 @@
           DEBUG_PRINT2 ("(to 0x%x).\n", p);
 	  break;
 
-	
+
         /* We need this opcode so we can detect where alternatives end
            in `group_match_null_string_p' et al.  */
         case jump_past_alt:
@@ -4125,7 +4125,7 @@
 
         /* Have to succeed matching what follows at least n times.
            After that, handle like `on_failure_jump'.  */
-        case succeed_n: 
+        case succeed_n:
           EXTRACT_NUMBER (mcnt, p + 2);
           DEBUG_PRINT2 ("EXECUTING succeed_n %d.\n", mcnt);
 
@@ -4146,8 +4146,8 @@
               goto on_failure;
             }
           break;
-        
-        case jump_n: 
+
+        case jump_n:
           EXTRACT_NUMBER (mcnt, p + 2);
           DEBUG_PRINT2 ("EXECUTING jump_n %d.\n", mcnt);
 
@@ -4156,13 +4156,13 @@
             {
                mcnt--;
                STORE_NUMBER (p + 2, mcnt);
-	       goto unconditional_jump;	     
+	       goto unconditional_jump;
             }
           /* If don't have to jump any more, skip over the rest of command.  */
-	  else      
-	    p += 4;		     
+	  else
+	    p += 4;
           break;
-        
+
 	case set_number_at:
 	  {
             DEBUG_PRINT1 ("EXECUTING set_number_at.\n");
@@ -4207,13 +4207,13 @@
  	  if (PTR_CHAR_POS ((unsigned char *) d) >= point)
   	    goto fail;
   	  break;
-  
+
   	case at_dot:
           DEBUG_PRINT1 ("EXECUTING at_dot.\n");
  	  if (PTR_CHAR_POS ((unsigned char *) d) != point)
   	    goto fail;
   	  break;
-  
+
   	case after_dot:
           DEBUG_PRINT1 ("EXECUTING after_dot.\n");
           if (PTR_CHAR_POS ((unsigned char *) d) <= point)
@@ -4266,7 +4266,7 @@
 	  SET_REGS_MATCHED ();
           d++;
 	  break;
-	  
+
 	case notwordchar:
           DEBUG_PRINT1 ("EXECUTING non-Emacs notwordchar.\n");
 	  PREFETCH ();
@@ -4276,7 +4276,7 @@
           d++;
 	  break;
 #endif /* not emacs */
-          
+
         default:
           abort ();
 	}
@@ -4301,7 +4301,7 @@
           if (p < pend)
             {
               boolean is_a_jump_n = false;
-              
+
               /* If failed to a backwards jump that's part of a repetition
                  loop, need to pop this failure point and use the next one.  */
               switch ((re_opcode_t) *p)
@@ -4313,7 +4313,7 @@
                 case jump:
                   p1 = p + 1;
                   EXTRACT_NUMBER_AND_INCR (mcnt, p1);
-                  p1 += mcnt;	
+                  p1 += mcnt;
 
                   if ((is_a_jump_n && (re_opcode_t) *p1 == succeed_n)
                       || (!is_a_jump_n
@@ -4344,10 +4344,10 @@
 
 
 /* We are passed P pointing to a register number after a start_memory.
-   
+
    Return true if the pattern up to the corresponding stop_memory can
    match the empty string, and false otherwise.
-   
+
    If we find the matching stop_memory, sets P to point to one past its number.
    Otherwise, sets P to an undefined byte less than or equal to END.
 
@@ -4361,20 +4361,20 @@
   int mcnt;
   /* Point to after the args to the start_memory.  */
   unsigned char *p1 = *p + 2;
-  
+
   while (p1 < end)
     {
       /* Skip over opcodes that can match nothing, and return true or
 	 false, as appropriate, when we get to one that can't, or to the
          matching stop_memory.  */
-      
+
       switch ((re_opcode_t) *p1)
         {
         /* Could be either a loop or a series of alternatives.  */
         case on_failure_jump:
           p1++;
           EXTRACT_NUMBER_AND_INCR (mcnt, p1);
-          
+
           /* If the next operation is not a jump backwards in the
 	     pattern.  */
 
@@ -4388,7 +4388,7 @@
 
                  /on_failure_jump/0/6/exactn/1/a/jump_past_alt/0/6
                  /on_failure_jump/0/6/exactn/1/b/jump_past_alt/0/3
-                 /exactn/1/c						
+                 /exactn/1/c
 
                  So, we have to first go through the first (n-1)
                  alternatives and then deal with the last one separately.  */
@@ -4404,19 +4404,19 @@
                      is, including the ending `jump_past_alt' and
                      its number.  */
 
-                  if (!alt_match_null_string_p (p1, p1 + mcnt - 3, 
+                  if (!alt_match_null_string_p (p1, p1 + mcnt - 3,
 				                      reg_info))
                     return false;
 
                   /* Move to right after this alternative, including the
 		     jump_past_alt.  */
-                  p1 += mcnt;	
+                  p1 += mcnt;
 
                   /* Break if it's the beginning of an n-th alternative
                      that doesn't begin with an on_failure_jump.  */
                   if ((re_opcode_t) *p1 != on_failure_jump)
                     break;
-		
+
 		  /* Still have to check that it's not an n-th
 		     alternative that starts with an on_failure_jump.  */
 		  p1++;
@@ -4441,14 +4441,14 @@
             } /* if mcnt > 0 */
           break;
 
-          
+
         case stop_memory:
 	  assert (p1[1] == **p);
           *p = p1 + 2;
           return true;
 
-        
-        default: 
+
+        default:
           if (!common_op_match_null_string_p (&p1, end, reg_info))
             return false;
         }
@@ -4461,7 +4461,7 @@
 /* Similar to group_match_null_string_p, but doesn't deal with alternatives:
    It expects P to be the first byte of a single alternative and END one
    byte past the last. The alternative can contain groups.  */
-   
+
 static boolean
 alt_match_null_string_p (p, end, reg_info)
     unsigned char *p, *end;
@@ -4469,12 +4469,12 @@
 {
   int mcnt;
   unsigned char *p1 = p;
-  
+
   while (p1 < end)
     {
-      /* Skip over opcodes that can match nothing, and break when we get 
+      /* Skip over opcodes that can match nothing, and break when we get
          to one that can't.  */
-      
+
       switch ((re_opcode_t) *p1)
         {
 	/* It's a loop.  */
@@ -4483,8 +4483,8 @@
           EXTRACT_NUMBER_AND_INCR (mcnt, p1);
           p1 += mcnt;
           break;
-          
-	default: 
+
+	default:
           if (!common_op_match_null_string_p (&p1, end, reg_info))
             return false;
         }
@@ -4495,8 +4495,8 @@
 
 
 /* Deals with the ops common to group_match_null_string_p and
-   alt_match_null_string_p.  
-   
+   alt_match_null_string_p.
+
    Sets P to one after the op and its arguments, if any.  */
 
 static boolean
@@ -4531,7 +4531,7 @@
       reg_no = *p1;
       assert (reg_no > 0 && reg_no <= MAX_REGNUM);
       ret = group_match_null_string_p (&p1, end, reg_info);
-      
+
       /* Have to set this here in case we're checking a group which
          contains a group and a back reference to it.  */
 
@@ -4541,7 +4541,7 @@
       if (!ret)
         return false;
       break;
-          
+
     /* If this is an optimized succeed_n for zero times, make the jump.  */
     case jump:
       EXTRACT_NUMBER_AND_INCR (mcnt, p1);
@@ -4553,7 +4553,7 @@
 
     case succeed_n:
       /* Get to the number of times to succeed.  */
-      p1 += 2;		
+      p1 += 2;
       EXTRACT_NUMBER_AND_INCR (mcnt, p1);
 
       if (mcnt == 0)
@@ -4566,7 +4566,7 @@
         return false;
       break;
 
-    case duplicate: 
+    case duplicate:
       if (!REG_MATCH_NULL_STRING_P (reg_info[*p1]))
         return false;
       break;
@@ -4586,7 +4586,7 @@
 
 /* Return zero if TRANSLATE[S1] and TRANSLATE[S2] are identical for LEN
    bytes; nonzero otherwise.  */
-   
+
 static int
 bcmp_translate (s1, s2, len, translate)
      unsigned char *s1, *s2;
@@ -4607,10 +4607,10 @@
 /* re_compile_pattern is the GNU regular expression compiler: it
    compiles PATTERN (of length SIZE) and puts the result in BUFP.
    Returns 0 if the pattern was valid, otherwise an error string.
-   
+
    Assumes the `allocated' (and perhaps `buffer') and `translate' fields
    are set in BUFP on entry.
-   
+
    We call regex_compile to do the actual compilation.  */
 
 const char *
@@ -4620,23 +4620,23 @@
      struct re_pattern_buffer *bufp;
 {
   reg_errcode_t ret;
-  
+
   /* GNU code is written to assume at least RE_NREGS registers will be set
      (and at least one extra will be -1).  */
   bufp->regs_allocated = REGS_UNALLOCATED;
-  
+
   /* And GNU code determines whether or not to get register information
      by passing null for the REGS argument to re_match, etc., not by
      setting no_sub.  */
   bufp->no_sub = 0;
-  
+
   /* Match anchors at newline.  */
   bufp->newline_anchor = 1;
-  
+
   ret = regex_compile (pattern, length, re_syntax_options, bufp);
 
   return re_error_msg[(int) ret];
-}     
+}
 
 /* Entry points compatible with 4.2 BSD regex library.  We don't define
    them if this is an Emacs or POSIX compilation.  */
@@ -4651,7 +4651,7 @@
     const char *s;
 {
   reg_errcode_t ret;
-  
+
   if (!s)
     {
       if (!re_comp_buf.buffer)
@@ -4678,7 +4678,7 @@
   re_comp_buf.newline_anchor = 1;
 
   ret = regex_compile (s, strlen (s), re_syntax_options, &re_comp_buf);
-  
+
   /* Yes, we're discarding `const' here.  */
   return (char *) re_error_msg[(int) ret];
 }
@@ -4735,7 +4735,7 @@
 int
 regcomp (preg, pattern, cflags)
     regex_t *preg;
-    const char *pattern; 
+    const char *pattern;
     int cflags;
 {
   reg_errcode_t ret;
@@ -4746,17 +4746,17 @@
   /* regex_compile will allocate the space for the compiled pattern.  */
   preg->buffer = 0;
   preg->allocated = 0;
-  
+
   /* Don't bother to use a fastmap when searching.  This simplifies the
      REG_NEWLINE case: if we used a fastmap, we'd have to put all the
      characters after newlines into the fastmap.  This way, we just try
      every character.  */
   preg->fastmap = 0;
-  
+
   if (cflags & REG_ICASE)
     {
       unsigned i;
-      
+
       preg->translate = (char *) malloc (CHAR_SET_SIZE);
       if (preg->translate == NULL)
         return (int) REG_ESPACE;
@@ -4781,38 +4781,38 @@
 
   preg->no_sub = !!(cflags & REG_NOSUB);
 
-  /* POSIX says a null character in the pattern terminates it, so we 
+  /* POSIX says a null character in the pattern terminates it, so we
      can use strlen here in compiling the pattern.  */
   ret = regex_compile (pattern, strlen (pattern), syntax, preg);
-  
+
   /* POSIX doesn't distinguish between an unmatched open-group and an
      unmatched close-group: both are REG_EPAREN.  */
   if (ret == REG_ERPAREN) ret = REG_EPAREN;
-  
+
   return (int) ret;
 }
 
 
 /* regexec searches for a given pattern, specified by PREG, in the
    string STRING.
-   
+
    If NMATCH is zero or REG_NOSUB was set in the cflags argument to
    `regcomp', we ignore PMATCH.  Otherwise, we assume PMATCH has at
    least NMATCH elements, and we set them to the offsets of the
    corresponding matched substrings.
-   
+
    EFLAGS specifies `execution flags' which affect matching: if
    REG_NOTBOL is set, then ^ does not match at the beginning of the
    string; if REG_NOTEOL is set, then $ does not match at the end.
-   
+
    We return 0 if we find a match and REG_NOMATCH if not.  */
 
 int
 regexec (preg, string, nmatch, pmatch, eflags)
     const regex_t *preg;
-    const char *string; 
-    size_t nmatch; 
-    regmatch_t pmatch[]; 
+    const char *string;
+    size_t nmatch;
+    regmatch_t pmatch[];
     int eflags;
 {
   int ret;
@@ -4822,15 +4822,15 @@
   boolean want_reg_info = !preg->no_sub && nmatch > 0;
 
   private_preg = *preg;
-  
+
   private_preg.not_bol = !!(eflags & REG_NOTBOL);
   private_preg.not_eol = !!(eflags & REG_NOTEOL);
-  
+
   /* The user has told us exactly how many registers to return
      information about, via `nmatch'.  We have to pass that on to the
      matching routines.  */
   private_preg.regs_allocated = REGS_FIXED;
-  
+
   if (want_reg_info)
     {
       regs.num_regs = nmatch;
@@ -4844,7 +4844,7 @@
   ret = re_search (&private_preg, string, len,
                    /* start: */ 0, /* range: */ len,
                    want_reg_info ? &regs : (struct re_registers *) 0);
-  
+
   /* Copy the register information to the POSIX structure.  */
   if (want_reg_info)
     {
@@ -4884,7 +4884,7 @@
 
   if (errcode < 0
       || errcode >= (sizeof (re_error_msg) / sizeof (re_error_msg[0])))
-    /* Only error codes returned by the rest of the code should be passed 
+    /* Only error codes returned by the rest of the code should be passed
        to this routine.  If we are given anything else, or if other regex
        code generates an invalid error code, then the program has a bug.
        Dump core so we can fix it.  */
@@ -4898,7 +4898,7 @@
     msg = "Success";
 
   msg_size = strlen (msg) + 1; /* Includes the null.  */
-  
+
   if (errbuf_size != 0)
     {
       if (msg_size > errbuf_size)
@@ -4923,7 +4923,7 @@
   if (preg->buffer != NULL)
     free (preg->buffer);
   preg->buffer = NULL;
-  
+
   preg->allocated = 0;
   preg->used = 0;
 

Modified: trunk/payloads/libpayload/util/kconfig/regex.h
==============================================================================
--- trunk/payloads/libpayload/util/kconfig/regex.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/util/kconfig/regex.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -42,7 +42,7 @@
 #define RE_BACKSLASH_ESCAPE_IN_LISTS (1)
 
 /* If this bit is not set, then + and ? are operators, and \+ and \? are
-     literals. 
+     literals.
    If set, then \+ and \? are operators and + and ? are literals.  */
 #define RE_BK_PLUS_QM (RE_BACKSLASH_ESCAPE_IN_LISTS << 1)
 
@@ -58,7 +58,7 @@
         ^  is an anchor if it is at the beginning of a regular
            expression or after an open-group or an alternation operator;
         $  is an anchor if it is at the end of a regular expression, or
-           before a close-group or an alternation operator.  
+           before a close-group or an alternation operator.
 
    This bit could be (re)combined with RE_CONTEXT_INDEP_OPS, because
    POSIX draft 11.2 says that * etc. in leading positions is undefined.
@@ -69,7 +69,7 @@
 /* If this bit is set, then special characters are always special
      regardless of where they are in the pattern.
    If this bit is not set, then special characters are special only in
-     some contexts; otherwise they are ordinary.  Specifically, 
+     some contexts; otherwise they are ordinary.  Specifically,
      * + ? and intervals are only special when not after the beginning,
      open-group, or alternation operator.  */
 #define RE_CONTEXT_INDEP_OPS (RE_CONTEXT_INDEP_ANCHORS << 1)
@@ -91,7 +91,7 @@
 #define RE_HAT_LISTS_NOT_NEWLINE (RE_DOT_NOT_NULL << 1)
 
 /* If this bit is set, either \{...\} or {...} defines an
-     interval, depending on RE_NO_BK_BRACES. 
+     interval, depending on RE_NO_BK_BRACES.
    If not set, \{, \}, {, and } are literals.  */
 #define RE_INTERVALS (RE_HAT_LISTS_NOT_NEWLINE << 1)
 
@@ -116,7 +116,7 @@
    If not set, then \<digit> is a back-reference.  */
 #define RE_NO_BK_REFS (RE_NO_BK_PARENS << 1)
 
-/* If this bit is set, then | is an alternation operator, and \| is literal. 
+/* If this bit is set, then | is an alternation operator, and \| is literal.
    If not set, then \| is an alternation operator, and | is literal.  */
 #define RE_NO_BK_VBAR (RE_NO_BK_REFS << 1)
 
@@ -138,7 +138,7 @@
 
 /* Define combinations of the above bits for the standard possibilities.
    (The [[[ comments delimit what gets put into the Texinfo file, so
-   don't delete them!)  */ 
+   don't delete them!)  */
 /* [[[begin syntaxes]]] */
 #define RE_SYNTAX_EMACS 0
 
@@ -205,7 +205,7 @@
 #ifdef RE_DUP_MAX
 #undef RE_DUP_MAX
 #endif
-#define RE_DUP_MAX ((1 << 15) - 1) 
+#define RE_DUP_MAX ((1 << 15) - 1)
 
 
 /* POSIX `cflags' bits (i.e., information for `regcomp').  */
@@ -217,7 +217,7 @@
 /* If this bit is set, then ignore case when matching.
    If not set, then case is significant.  */
 #define REG_ICASE (REG_EXTENDED << 1)
- 
+
 /* If this bit is set, then anchors do not match at newline
      characters in the string.
    If not set, then anchors do match at newlines.  */
@@ -256,7 +256,7 @@
   REG_EESCAPE,		/* Trailing backslash.  */
   REG_ESUBREG,		/* Invalid back reference.  */
   REG_EBRACK,		/* Unmatched left bracket.  */
-  REG_EPAREN,		/* Parenthesis imbalance.  */ 
+  REG_EPAREN,		/* Parenthesis imbalance.  */
   REG_EBRACE,		/* Unmatched \{.  */
   REG_BADBR,		/* Invalid contents of \{\}.  */
   REG_ERANGE,		/* Invalid range end.  */
@@ -287,7 +287,7 @@
   unsigned long allocated;
 
 	/* Number of bytes actually used in `buffer'.  */
-  unsigned long used;	
+  unsigned long used;
 
         /* Syntax setting with which the pattern was compiled.  */
   reg_syntax_t syntax;
@@ -331,7 +331,7 @@
   unsigned no_sub : 1;
 
         /* If set, a beginning-of-line anchor doesn't match at the
-           beginning of the string.  */ 
+           beginning of the string.  */
   unsigned not_bol : 1;
 
         /* Similarly for an end-of-line anchor.  */
@@ -443,7 +443,7 @@
 
 
 /* Relates to `re_match' as `re_search_2' relates to `re_search'.  */
-extern int re_match_2 
+extern int re_match_2
   _RE_ARGS ((struct re_pattern_buffer *buffer, const char *string1,
              int length1, const char *string2, int length2,
              int start, struct re_registers *regs, int stop));

Modified: trunk/payloads/libpayload/util/kconfig/zconf.tab.c_shipped
==============================================================================
--- trunk/payloads/libpayload/util/kconfig/zconf.tab.c_shipped	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/payloads/libpayload/util/kconfig/zconf.tab.c_shipped	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1393,7 +1393,7 @@
 #endif
 #endif
 {
-  
+
   int yystate;
   int yyn;
   int yyresult;

Modified: trunk/src/Kconfig
==============================================================================
--- trunk/src/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -454,8 +454,8 @@
 	depends on BOOTSPLASH
 	default "bootsplash.jpg"
 	help
-	  The path and filename of the file to use as graphical bootsplash 
-	  screen. The file format has to be jpg. 
+	  The path and filename of the file to use as graphical bootsplash
+	  screen. The file format has to be jpg.
 
 # TODO: Turn this into a "choice".
 config FRAMEBUFFER_VESA_MODE
@@ -568,7 +568,7 @@
 	depends on X86EMU_DEBUG
 	help
 	  Print _all_ opcodes that are executed by x86emu.
-	  
+
 	  WARNING: This will produce a LOT of output and take a long time.
 
 	  Note: This option will increase the size of the coreboot image.

Modified: trunk/src/arch/i386/boot/acpi.c
==============================================================================
--- trunk/src/arch/i386/boot/acpi.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/boot/acpi.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -7,7 +7,7 @@
  * Copyright (C) 2004 SUSE LINUX AG
  * Copyright (C) 2005-2009 coresystems GmbH
  *
- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by
  * Nick Barker <nick.barker9 at btinternet.com>, and those portions
  * Copyright (C) 2004 Nick Barker
  *
@@ -15,12 +15,12 @@
  * 2005.9 yhlu add SRAT table generation
  */
 
-/* 
+/*
  * Each system port implementing ACPI has to provide two functions:
- * 
+ *
  *   write_acpi_tables()
  *   acpi_dump_apics()
- *   
+ *
  * See Kontron 986LCD-M port for a good example of an ACPI implementation
  * in coreboot.
  */
@@ -59,10 +59,10 @@
 	if (rsdp->xsdt_address) {
 		xsdt = (acpi_xsdt_t *)((u32)rsdp->xsdt_address);
 	}
-	
+
 	/* This should always be MAX_ACPI_TABLES */
 	entries_num = ARRAY_SIZE(rsdt->entry);
-	
+
 	for (i = 0; i < entries_num; i++) {
 		if(rsdt->entry[i] == 0)
 			break;
@@ -120,10 +120,10 @@
 	lapic->type=0;
 	lapic->length=sizeof(acpi_madt_lapic_t);
 	lapic->flags=1;
-	
+
 	lapic->processor_id=cpu;
 	lapic->apic_id=apic;
-	
+
 	return(lapic->length);
 }
 
@@ -146,16 +146,16 @@
 	return current;
 }
 
-int acpi_create_madt_ioapic(acpi_madt_ioapic_t *ioapic, u8 id, u32 addr,u32 gsi_base) 
+int acpi_create_madt_ioapic(acpi_madt_ioapic_t *ioapic, u8 id, u32 addr,u32 gsi_base)
 {
 	ioapic->type=1;
 	ioapic->length=sizeof(acpi_madt_ioapic_t);
 	ioapic->reserved=0x00;
 	ioapic->gsi_base=gsi_base;
-	
+
 	ioapic->ioapic_id=id;
 	ioapic->ioapic_addr=addr;
-	
+
 	return(ioapic->length);
 }
 
@@ -168,7 +168,7 @@
 	irqoverride->source=source;
 	irqoverride->gsirq=gsirq;
 	irqoverride->flags=flags;
-	
+
 	return(irqoverride->length);
 }
 
@@ -177,29 +177,29 @@
 {
 	lapic_nmi->type=4;
 	lapic_nmi->length=sizeof(acpi_madt_lapic_nmi_t);
-	
+
 	lapic_nmi->flags=flags;
 	lapic_nmi->processor_id=cpu;
 	lapic_nmi->lint=lint;
-	
+
 	return(lapic_nmi->length);
 }
 
 void acpi_create_madt(acpi_madt_t *madt)
 {
 #define LOCAL_APIC_ADDR	0xfee00000ULL
-	
+
 	acpi_header_t *header=&(madt->header);
 	unsigned long current=(unsigned long)madt+sizeof(acpi_madt_t);
-	
+
 	memset((void *)madt, 0, sizeof(acpi_madt_t));
-	
+
 	/* fill out header fields */
 	memcpy(header->signature, "APIC", 4);
 	memcpy(header->oem_id, OEM_ID, 6);
 	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
 	memcpy(header->asl_compiler_id, ASLC, 4);
-	
+
 	header->length = sizeof(acpi_madt_t);
 	header->revision = 1;
 
@@ -207,10 +207,10 @@
 	madt->flags	= 0x1; /* PCAT_COMPAT */
 
 	current = acpi_fill_madt(current);
-	
+
 	/* recalculate length */
 	header->length= current - (unsigned long)madt;
-	
+
 	header->checksum	= acpi_checksum((void *)madt, header->length);
 }
 
@@ -219,23 +219,23 @@
 
 	acpi_header_t *header=&(mcfg->header);
 	unsigned long current=(unsigned long)mcfg+sizeof(acpi_mcfg_t);
-	
+
 	memset((void *)mcfg, 0, sizeof(acpi_mcfg_t));
-	
+
 	/* fill out header fields */
 	memcpy(header->signature, "MCFG", 4);
 	memcpy(header->oem_id, OEM_ID, 6);
 	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
 	memcpy(header->asl_compiler_id, ASLC, 4);
-	
+
 	header->length = sizeof(acpi_mcfg_t);
 	header->revision = 1;
 
 	current = acpi_fill_mcfg(current);
-	
+
 	/* recalculate length */
 	header->length= current - (unsigned long)mcfg;
-	
+
 	header->checksum	= acpi_checksum((void *)mcfg, header->length);
 }
 
@@ -294,7 +294,7 @@
 
         mem->proximity_domain = node;
 
-	mem->flags = flags; 
+	mem->flags = flags;
 
         return(mem->length);
 }
@@ -356,15 +356,15 @@
 #define HPET_ADDR  0xfed00000ULL
 	acpi_header_t *header=&(hpet->header);
 	acpi_addr_t *addr=&(hpet->addr);
-	
+
 	memset((void *)hpet, 0, sizeof(acpi_hpet_t));
-	
+
 	/* fill out header fields */
 	memcpy(header->signature, "HPET", 4);
 	memcpy(header->oem_id, OEM_ID, 6);
 	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
 	memcpy(header->asl_compiler_id, ASLC, 4);
-	
+
 	header->length = sizeof(acpi_hpet_t);
 	header->revision = 1;
 
@@ -378,12 +378,12 @@
 	hpet->id	= 0x102282a0; /* AMD ? */
 	hpet->number	= 0;
 	hpet->min_tick  = 4096;
-	
+
 	header->checksum	= acpi_checksum((void *)hpet, sizeof(acpi_hpet_t));
 }
 void acpi_create_facs(acpi_facs_t *facs)
 {
-	
+
 	memset( (void *)facs,0, sizeof(acpi_facs_t));
 
 	memcpy(facs->signature, "FACS", 4);
@@ -398,46 +398,46 @@
 }
 
 void acpi_write_rsdt(acpi_rsdt_t *rsdt)
-{ 
+{
 	acpi_header_t *header=&(rsdt->header);
-	
+
 	/* fill out header fields */
 	memcpy(header->signature, "RSDT", 4);
 	memcpy(header->oem_id, OEM_ID, 6);
 	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
 	memcpy(header->asl_compiler_id, ASLC, 4);
-	
+
 	header->length = sizeof(acpi_rsdt_t);
 	header->revision = 1;
-	
+
 	/* fill out entries */
 
 	// entries are filled in later, we come with an empty set.
-	
+
 	/* fix checksum */
-	
+
 	header->checksum = acpi_checksum((void *)rsdt, sizeof(acpi_rsdt_t));
 }
 
 void acpi_write_xsdt(acpi_xsdt_t *xsdt)
-{ 
+{
 	acpi_header_t *header=&(xsdt->header);
-	
+
 	/* fill out header fields */
 	memcpy(header->signature, "XSDT", 4);
 	memcpy(header->oem_id, OEM_ID, 6);
 	memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
 	memcpy(header->asl_compiler_id, ASLC, 4);
-	
+
 	header->length = sizeof(acpi_xsdt_t);
 	header->revision = 1;
-	
+
 	/* fill out entries */
 
 	// entries are filled in later, we come with an empty set.
-	
+
 	/* fix checksum */
-	
+
 	header->checksum = acpi_checksum((void *)xsdt, sizeof(acpi_xsdt_t));
 }
 
@@ -448,7 +448,7 @@
 	memcpy(rsdp->oem_id, OEM_ID, 6);
 	rsdp->length		= sizeof(acpi_rsdp_t);
 	rsdp->rsdt_address	= (u32)rsdt;
-	/* Some OSes expect an XSDT to be present for RSD PTR 
+	/* Some OSes expect an XSDT to be present for RSD PTR
 	 * revisions >= 2. If we don't have an ACPI XSDT, force
 	 * ACPI 1.0 (and thus RSD PTR revision 0)
 	 */
@@ -547,7 +547,7 @@
 
 	printk(BIOS_DEBUG, "RSDP found at %p\n", rsdp);
 	rsdt = (acpi_rsdt_t *) rsdp->rsdt_address;
-	
+
 	end = (char *) rsdt + rsdt->header.length;
 	printk(BIOS_DEBUG, "RSDT found at %p ends at %p\n", rsdt, end);
 

Modified: trunk/src/arch/i386/boot/acpigen.c
==============================================================================
--- trunk/src/arch/i386/boot/acpigen.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/boot/acpigen.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -147,8 +147,8 @@
 	return size;
 }
 
-/* The NameString are bit tricky, each element can be 4 chars, if 
-   less its padded with underscore. Check 18.2.2 and 18.4 
+/* The NameString are bit tricky, each element can be 4 chars, if
+   less its padded with underscore. Check 18.2.2 and 18.4
    and 5.3 of ACPI specs 3.0 for details
 */
 
@@ -160,14 +160,14 @@
 			len += acpigen_emit_stream(ud, 4 - i);
 			break;
 		} else {
-			len += acpigen_emit_byte(name[i]);				
+			len += acpigen_emit_byte(name[i]);
 		}
 	}
 	return len;
 }
 
 static int acpigen_emit_double_namestring(const char *name, int dotpos) {
-	int len = 0; 
+	int len = 0;
 	/* mark dual name prefix */
 	len += acpigen_emit_byte(0x2e);
 	len += acpigen_emit_simple_namestring(name);
@@ -177,7 +177,7 @@
 
 static int acpigen_emit_multi_namestring(const char *name) {
 	int len = 0, count = 0;
-	unsigned char *pathlen; 
+	unsigned char *pathlen;
 	/* mark multi name prefix */
 	len += acpigen_emit_byte(0x2f);
 	len += acpigen_emit_byte(0x0);
@@ -229,7 +229,7 @@
 
 	if (dotcount == 0) {
 		len += acpigen_emit_simple_namestring(namepath);
-	} else if (dotcount == 1) { 
+	} else if (dotcount == 1) {
 		len += acpigen_emit_double_namestring(namepath, dotpos);
 	} else {
 		len += acpigen_emit_multi_namestring(namepath);

Modified: trunk/src/arch/i386/boot/boot.c
==============================================================================
--- trunk/src/arch/i386/boot/boot.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/boot/boot.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -63,9 +63,9 @@
 	return (
 		((ehdr->e_machine == EM_386) ||	(ehdr->e_machine == EM_486)) &&
 		(ehdr->e_ident[EI_CLASS] == ELFCLASS32) &&
-		(ehdr->e_ident[EI_DATA] == ELFDATA2LSB) 
+		(ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
 		);
-	
+
 }
 
 void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
@@ -74,7 +74,7 @@
 	unsigned long lb_start, lb_size;
 	unsigned long adjust, adjusted_boot_notes;
 
-	elf_boot_notes.hdr.b_checksum = 
+	elf_boot_notes.hdr.b_checksum =
 		compute_ip_checksum(&elf_boot_notes, sizeof(elf_boot_notes));
 
 	lb_start = (unsigned long)&_ram_seg;
@@ -82,7 +82,7 @@
 	adjust = buffer +  size - lb_start;
 
 	adjusted_boot_notes = (unsigned long)&elf_boot_notes;
-	adjusted_boot_notes += adjust; 
+	adjusted_boot_notes += adjust;
 
 	printk(BIOS_SPEW, "entry    = 0x%08lx\n", (unsigned long)entry);
 	printk(BIOS_SPEW, "lb_start = 0x%08lx\n", lb_start);
@@ -91,7 +91,7 @@
 	printk(BIOS_SPEW, "buffer   = 0x%08lx\n", buffer);
 	printk(BIOS_SPEW, "     elf_boot_notes = 0x%08lx\n", (unsigned long)&elf_boot_notes);
 	printk(BIOS_SPEW, "adjusted_boot_notes = 0x%08lx\n", adjusted_boot_notes);
-	
+
 	/* Jump to kernel */
 	__asm__ __volatile__(
 		"	cld	\n\t"
@@ -172,7 +172,7 @@
 		"	popl	%%edi\n\t"
 		"	popl	%%esi\n\t"
 
-		:: 
+		::
 		"ri" (lb_start), "ri" (buffer), "ri" (lb_size),
 		"ri" (entry),
 #if CONFIG_MULTIBOOT

Modified: trunk/src/arch/i386/boot/coreboot_table.c
==============================================================================
--- trunk/src/arch/i386/boot/coreboot_table.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/boot/coreboot_table.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2003-2004 Eric Biederman
  * Copyright (C) 2005-2010 coresystems GmbH
  *
@@ -71,7 +71,7 @@
 #if 0
 static struct lb_record *lb_next_record(struct lb_record *rec)
 {
-	rec = (void *)(((char *)rec) + rec->size);	
+	rec = (void *)(((char *)rec) + rec->size);
 	return rec;
 }
 #endif
@@ -173,7 +173,7 @@
 	mainboard->tag = LB_TAG_MAINBOARD;
 
 	mainboard->size = (sizeof(*mainboard) +
-		strlen(mainboard_vendor) + 1 + 
+		strlen(mainboard_vendor) + 1 +
 		strlen(mainboard_part_number) + 1 +
 		3) & ~3;
 
@@ -203,7 +203,7 @@
 	cmos_checksum->range_end = ( LB_CKS_RANGE_END * 8 ) + 7;
 	cmos_checksum->location = LB_CKS_LOC * 8;
 	cmos_checksum->type = CHECKSUM_PCBIOS;
-	
+
 	return cmos_checksum;
 }
 #endif
@@ -320,7 +320,7 @@
 	int entries;
 	int i, j;
 	entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
-	
+
 	/* Sort the lb memory ranges */
 	for(i = 0; i < entries; i++) {
 		uint64_t entry_start = unpack_lb64(mem->map[i].start);
@@ -357,17 +357,17 @@
 			mem->map[i].size  = pack_lb64(end - start);
 
 			/* Delete the entry I have merged with */
-			memmove(&mem->map[i + 1], &mem->map[i + 2], 
+			memmove(&mem->map[i + 1], &mem->map[i + 2],
 				((entries - i - 2) * sizeof(mem->map[0])));
 			mem->size -= sizeof(mem->map[0]);
 			entries -= 1;
 			/* See if I can merge with the next entry as well */
-			i -= 1; 
+			i -= 1;
 		}
 	}
 }
 
-static void lb_remove_memory_range(struct lb_memory *mem, 
+static void lb_remove_memory_range(struct lb_memory *mem,
 	uint64_t start, uint64_t size)
 {
 	uint64_t end;
@@ -383,16 +383,16 @@
 		uint64_t map_end   = map_start + unpack_lb64(mem->map[i].size);
 		if ((start <= map_start) && (end >= map_end)) {
 			/* Remove the completely covered range */
-			memmove(&mem->map[i], &mem->map[i + 1], 
+			memmove(&mem->map[i], &mem->map[i + 1],
 				((entries - i - 1) * sizeof(mem->map[0])));
 			mem->size -= sizeof(mem->map[0]);
 			entries -= 1;
 			/* Since the index will disappear revisit what will appear here */
-			i -= 1; 
+			i -= 1;
 		}
 		else if ((start > map_start) && (end < map_end)) {
 			/* Split the memory range */
-			memmove(&mem->map[i + 1], &mem->map[i], 
+			memmove(&mem->map[i + 1], &mem->map[i],
 				((entries - i) * sizeof(mem->map[0])));
 			mem->size += sizeof(mem->map[0]);
 			entries += 1;
@@ -430,7 +430,7 @@
 	int entries;
 	int i;
 	entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
-	
+
 	printk(BIOS_DEBUG, "coreboot memory table:\n");
 	for(i = 0; i < entries; i++) {
 		uint64_t entry_start = unpack_lb64(mem->map[i].start);
@@ -448,14 +448,14 @@
 		default: entry_type="UNKNOWN!"; break;
 		}
 
-		printk(BIOS_DEBUG, "%2d. %016llx-%016llx: %s\n", 
+		printk(BIOS_DEBUG, "%2d. %016llx-%016llx: %s\n",
 			i, entry_start, entry_start+entry_size-1, entry_type);
-		
+
 	}
 }
 
 
-/* Routines to extract part so the coreboot table or 
+/* Routines to extract part so the coreboot table or
  * information from the coreboot table after we have written it.
  * Currently get_lb_mem relies on a global we can change the
  * implementaiton.
@@ -492,8 +492,8 @@
 extern uint64_t high_tables_base, high_tables_size;
 #endif
 
-unsigned long write_coreboot_table( 
-	unsigned long low_table_start, unsigned long low_table_end, 
+unsigned long write_coreboot_table(
+	unsigned long low_table_start, unsigned long low_table_end,
 	unsigned long rom_table_start, unsigned long rom_table_end)
 {
 	struct lb_header *head;
@@ -509,7 +509,7 @@
 	printk(BIOS_DEBUG, "New low_table_end: 0x%08lx\n", low_table_end);
 	printk(BIOS_DEBUG, "Now going to write high coreboot table at 0x%08lx\n",
 			rom_table_end);
-	
+
 	head = lb_table_init(rom_table_end);
 	rom_table_end = (unsigned long)head;
 	printk(BIOS_DEBUG, "rom_table_end = 0x%08lx\n", rom_table_end);
@@ -523,7 +523,7 @@
 		low_table_end = (unsigned long)head;
 	}
 #endif
- 
+
 	printk(BIOS_DEBUG, "Adjust low_table_end from 0x%08lx to ", low_table_end);
 	low_table_end += 0xfff; // 4K aligned
 	low_table_end &= ~0xfff;
@@ -535,7 +535,7 @@
 	rom_table_end &= ~0xffff;
 	printk(BIOS_DEBUG, "0x%08lx \n", rom_table_end);
 
-#if (CONFIG_HAVE_OPTION_TABLE == 1) 
+#if (CONFIG_HAVE_OPTION_TABLE == 1)
 	{
 		struct lb_record *rec_dest = lb_new_record(head);
 		/* Copy the option config table, it's already a lb_record... */
@@ -546,9 +546,9 @@
 #endif
 	/* Record where RAM is located */
 	mem = build_lb_mem(head);
-	
+
 	/* Record the mptable and the the lb_table (This will be adjusted later) */
-	lb_add_memory_range(mem, LB_MEM_TABLE, 
+	lb_add_memory_range(mem, LB_MEM_TABLE,
 		low_table_start, low_table_end - low_table_start);
 
 	/* Record the pirq table, acpi tables, and maybe the mptable */
@@ -588,5 +588,5 @@
 
 	/* Remember where my valid memory ranges are */
 	return lb_table_fini(head, 1);
-	
+
 }

Modified: trunk/src/arch/i386/boot/mpspec.c
==============================================================================
--- trunk/src/arch/i386/boot/mpspec.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/boot/mpspec.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -31,7 +31,7 @@
 {
         struct intel_mp_floating *mf;
         void *v;
-	
+
 	v = (void *)addr;
         mf = v;
         mf->mpf_signature[0] = '_';
@@ -106,7 +106,7 @@
 	unsigned cpu_feature_flags;
 	struct cpuid_result result;
 	device_t cpu;
-	
+
 	boot_apic_id = lapicid();
 	apic_version = lapic_read(LAPIC_LVR) & 0xff;
 	result = cpuid(1);
@@ -114,7 +114,7 @@
 	cpu_feature_flags = result.edx;
 	for(cpu = all_devices; cpu; cpu = cpu->next) {
 		unsigned long cpu_flag;
-		if ((cpu->path.type != DEVICE_PATH_APIC) || 
+		if ((cpu->path.type != DEVICE_PATH_APIC) ||
 			(cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
 		{
 			continue;
@@ -126,7 +126,7 @@
 		if (boot_apic_id == cpu->path.apic.apic_id) {
 			cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
 		}
-		smp_write_processor(mc, 
+		smp_write_processor(mc,
 			cpu->path.apic.apic_id, apic_version,
 			cpu_flag, cpu_features, cpu_feature_flags
 		);
@@ -146,7 +146,7 @@
 }
 
 void smp_write_ioapic(struct mp_config_table *mc,
-	unsigned char id, unsigned char ver, 
+	unsigned char id, unsigned char ver,
 	unsigned long apicaddr)
 {
 	struct mpc_config_ioapic *mpc;

Modified: trunk/src/arch/i386/boot/pirq_routing.c
==============================================================================
--- trunk/src/arch/i386/boot/pirq_routing.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/boot/pirq_routing.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -26,7 +26,7 @@
 	printk(BIOS_DEBUG, "%s(): Interrupt Routing Table located at %p.\n",
 		     __func__, addr);
 
-	
+
 	sum = rt->checksum - sum;
 
 	if (sum != rt->checksum) {
@@ -72,9 +72,9 @@
 		}
 	}
 	printk(BIOS_INFO, "done\n");
-	
+
 	check_pirq_routing_table((struct irq_routing_table *)addr);
-	
+
 	return 0;
 }
 #endif

Modified: trunk/src/arch/i386/boot/tables.c
==============================================================================
--- trunk/src/arch/i386/boot/tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/boot/tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -60,12 +60,12 @@
 
 	printk(BIOS_DEBUG, "High Tables Base is %llx.\n", high_tables_base);
 
-	rom_table_start = 0xf0000; 
+	rom_table_start = 0xf0000;
 	rom_table_end =   0xf0000;
 
 	/* Start low addr at 0x500, so we don't run into conflicts with the BDA
 	 * in case our data structures grow beyound 0x400. Only multiboot, GDT
-	 * and the coreboot table use low_tables. 
+	 * and the coreboot table use low_tables.
 	 */
 	low_table_start = 0;
 	low_table_end = 0x500;
@@ -126,7 +126,7 @@
 	/* Write ACPI tables to F segment and high tables area */
 
 	/* Ok, this is a bit hacky still, because some day we want to have this
-	 * completely dynamic. But right now we are setting fixed sizes. 
+	 * completely dynamic. But right now we are setting fixed sizes.
 	 * It's probably still better than the old high_table_base code because
 	 * now at least we know when we have an overflow in the area.
 	 *
@@ -213,7 +213,7 @@
 		write_coreboot_table(low_table_start, low_table_end,
 			      rom_table_start, rom_table_end);
 	}
- 
+
 	post_code(0x9e);
 
 #if CONFIG_HAVE_ACPI_RESUME
@@ -223,7 +223,7 @@
 	 */
 	cbmem_add(CBMEM_ID_RESUME, 1024 * (1024-64));
 #endif
-	
+
 	// Remove before sending upstream
 	cbmem_list();
 

Modified: trunk/src/arch/i386/boot/wakeup.S
==============================================================================
--- trunk/src/arch/i386/boot/wakeup.S	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/boot/wakeup.S	Tue Apr 27 08:56:47 2010	(r5507)
@@ -68,11 +68,11 @@
 	 * protected mode is turned off.
 	 */
 	mov	$0x30, %ax
-	mov	%ax, %ds       
-	mov	%ax, %es       
-	mov	%ax, %fs       
-	mov	%ax, %gs       
-	mov	%ax, %ss       
+	mov	%ax, %ds
+	mov	%ax, %es
+	mov	%ax, %fs
+	mov	%ax, %gs
+	mov	%ax, %ss
 
 	/* Turn off protection */
 	movl	%cr0, %eax

Modified: trunk/src/arch/i386/coreboot_ram.ld
==============================================================================
--- trunk/src/arch/i386/coreboot_ram.ld	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/coreboot_ram.ld	Tue Apr 27 08:56:47 2010	(r5507)
@@ -59,7 +59,7 @@
 		 . = ALIGN(4);
 
 		_erodata = .;
-	}	
+	}
 	/* After the code we place initialized data (typically initialized
 	 * global variables). This gets copied into ram by startup code.
 	 * __data_start and __data_end shows where in ram this should be placed,
@@ -113,11 +113,11 @@
 	/* Avoid running into 0xa0000-0xfffff */
 	_bogus = ASSERT(CONFIG_RAMBASE >= 0x100000 || _eheap < 0xa0000, "Please move RAMBASE to 1MB");
 
-	/* The ram segment. This includes all memory used by the memory 
+	/* The ram segment. This includes all memory used by the memory
 	 * resident copy of coreboot, except the tables that are produced on
 	 * the fly, but including stack and heap.
 	 */
-	_ram_seg = _text; 
+	_ram_seg = _text;
 	_eram_seg = _eheap;
 
 	/* CONFIG_RAMTOP is the upper address of cached memory (among other

Modified: trunk/src/arch/i386/include/arch/acpi.h
==============================================================================
--- trunk/src/arch/i386/include/arch/acpi.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/include/arch/acpi.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -30,7 +30,7 @@
 #if CONFIG_GENERATE_ACPI_TABLES==1
 
 #include <stdint.h>
- 
+
 #define RSDP_SIG		"RSD PTR "  /* RSDT Pointer signature */
 #define ACPI_TABLE_CREATOR	"COREBOOT"
 #define OEM_ID			"CORE  "

Modified: trunk/src/arch/i386/include/arch/coreboot_tables.h
==============================================================================
--- trunk/src/arch/i386/include/arch/coreboot_tables.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/include/arch/coreboot_tables.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -8,7 +8,7 @@
 	unsigned long low_table_start, unsigned long low_table_end,
 	unsigned long rom_table_start, unsigned long rom_table_end);
 
-void lb_memory_range(struct lb_memory *mem, 
+void lb_memory_range(struct lb_memory *mem,
 	uint32_t type, uint64_t start, uint64_t size);
 
 /* Routines to extract part so the coreboot table or information

Modified: trunk/src/arch/i386/include/arch/cpu.h
==============================================================================
--- trunk/src/arch/i386/include/arch/cpu.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/include/arch/cpu.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -102,7 +102,7 @@
 #define X86_VENDOR_RISE       7
 #define X86_VENDOR_TRANSMETA  8
 #define X86_VENDOR_NSC        9
-#define X86_VENDOR_SIS       10 
+#define X86_VENDOR_SIS       10
 #define X86_VENDOR_UNKNOWN 0xff
 
 #if !defined(__PRE_RAM__)
@@ -129,8 +129,8 @@
 	struct cpu_info *ci;
 	__asm__("andl %%esp,%0; "
 		"orl  %2, %0 "
-		:"=r" (ci) 
-		: "0" (~(CONFIG_STACK_SIZE - 1)), 
+		:"=r" (ci)
+		: "0" (~(CONFIG_STACK_SIZE - 1)),
 		"r" (CONFIG_STACK_SIZE - sizeof(struct cpu_info))
 	);
 	return ci;

Modified: trunk/src/arch/i386/include/arch/io.h
==============================================================================
--- trunk/src/arch/i386/include/arch/io.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/include/arch/io.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -82,7 +82,7 @@
 static inline void outsb(uint16_t port, const void *addr, unsigned long count)
 {
 	__asm__ __volatile__ (
-		"cld ; rep ; outsb " 
+		"cld ; rep ; outsb "
 		: "=S" (addr), "=c" (count)
 		: "d"(port), "0"(addr), "1" (count)
 		);
@@ -91,7 +91,7 @@
 static inline void outsw(uint16_t port, const void *addr, unsigned long count)
 {
 	__asm__ __volatile__ (
-		"cld ; rep ; outsw " 
+		"cld ; rep ; outsw "
 		: "=S" (addr), "=c" (count)
 		: "d"(port), "0"(addr), "1" (count)
 		);
@@ -100,7 +100,7 @@
 static inline void outsl(uint16_t port, const void *addr, unsigned long count)
 {
 	__asm__ __volatile__ (
-		"cld ; rep ; outsl " 
+		"cld ; rep ; outsl "
 		: "=S" (addr), "=c" (count)
 		: "d"(port), "0"(addr), "1" (count)
 		);
@@ -110,7 +110,7 @@
 static inline void insb(uint16_t port, void *addr, unsigned long count)
 {
 	__asm__ __volatile__ (
-		"cld ; rep ; insb " 
+		"cld ; rep ; insb "
 		: "=D" (addr), "=c" (count)
 		: "d"(port), "0"(addr), "1" (count)
 		);
@@ -119,7 +119,7 @@
 static inline void insw(uint16_t port, void *addr, unsigned long count)
 {
 	__asm__ __volatile__ (
-		"cld ; rep ; insw " 
+		"cld ; rep ; insw "
 		: "=D" (addr), "=c" (count)
 		: "d"(port), "0"(addr), "1" (count)
 		);
@@ -128,7 +128,7 @@
 static inline void insl(uint16_t port, void *addr, unsigned long count)
 {
 	__asm__ __volatile__ (
-		"cld ; rep ; insl " 
+		"cld ; rep ; insl "
 		: "=D" (addr), "=c" (count)
 		: "d"(port), "0"(addr), "1" (count)
 		);

Modified: trunk/src/arch/i386/include/arch/pciconf.h
==============================================================================
--- trunk/src/arch/i386/include/arch/pciconf.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/include/arch/pciconf.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 #ifndef PCI_CONF_REG_INDEX
 
 // These are defined in the PCI spec, and hence are theoretically
-// inclusive of ANYTHING that uses a PCI bus. 
+// inclusive of ANYTHING that uses a PCI bus.
 #define	PCI_CONF_REG_INDEX	0xcf8
 #define	PCI_CONF_REG_DATA	0xcfc
 

Modified: trunk/src/arch/i386/include/arch/registers.h
==============================================================================
--- trunk/src/arch/i386/include/arch/registers.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/include/arch/registers.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify

Modified: trunk/src/arch/i386/include/arch/romcc_io.h
==============================================================================
--- trunk/src/arch/i386/include/arch/romcc_io.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/include/arch/romcc_io.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -85,7 +85,7 @@
 
 typedef unsigned device_t; /* pci and pci_mmio need to have different ways to have dev */
 
-/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G, 
+/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G,
  * We don't need to set %fs, and %gs anymore
  * Before that We need to use %gs, and leave %fs to other RAM access
  */
@@ -303,7 +303,7 @@
 
         dev = PCI_DEV(bus, 0, 0);
         last = PCI_DEV(bus, 31, 7);
-	
+
         for(; dev <=last; dev += PCI_DEV(0,0,1)) {
                 unsigned int id;
                 id = pci_read_config32(dev, 0);

Modified: trunk/src/arch/i386/include/arch/smp/atomic.h
==============================================================================
--- trunk/src/arch/i386/include/arch/smp/atomic.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/include/arch/smp/atomic.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -18,29 +18,29 @@
 /**
  * atomic_read - read atomic variable
  * @v: pointer of type atomic_t
- * 
+ *
  * Atomically reads the value of @v.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
- */ 
+ */
 #define atomic_read(v)		((v)->counter)
 
 /**
  * atomic_set - set atomic variable
  * @v: pointer of type atomic_t
  * @i: required value
- * 
+ *
  * Atomically sets the value of @v to @i.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
- */ 
+ */
 #define atomic_set(v,i)		(((v)->counter) = (i))
 
 /**
  * atomic_inc - increment atomic variable
  * @v: pointer of type atomic_t
- * 
+ *
  * Atomically increments @v by 1.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
- */ 
+ */
 static __inline__ __attribute__((always_inline)) void atomic_inc(atomic_t *v)
 {
 	__asm__ __volatile__(
@@ -52,10 +52,10 @@
 /**
  * atomic_dec - decrement atomic variable
  * @v: pointer of type atomic_t
- * 
+ *
  * Atomically decrements @v by 1.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
- */ 
+ */
 static __inline__ __attribute__((always_inline)) void atomic_dec(atomic_t *v)
 {
 	__asm__ __volatile__(

Modified: trunk/src/arch/i386/include/arch/smp/mpspec.h
==============================================================================
--- trunk/src/arch/i386/include/arch/smp/mpspec.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/include/arch/smp/mpspec.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -9,9 +9,9 @@
 
 /*
  * This tag identifies where the SMP configuration
- * information is. 
+ * information is.
  */
- 
+
 #define SMP_MAGIC_IDENT	(('_'<<24)|('P'<<16)|('M'<<8)|'_')
 
 /*
@@ -72,7 +72,7 @@
 	unsigned char mpc_cpuflag;
 #define MPC_CPU_ENABLED		1	/* Processor is available */
 #define MPC_CPU_BOOTPROCESSOR	2	/* Processor is the BP */
-	unsigned long mpc_cpufeature;		
+	unsigned long mpc_cpufeature;
 #define MPC_CPU_STEPPING_MASK 0x0F
 #define MPC_CPU_MODEL_MASK	0xF0
 #define MPC_CPU_FAMILY_MASK	0xF00
@@ -140,7 +140,7 @@
 	unsigned short mpc_irqflag;
 	unsigned char mpc_srcbusid;
 	unsigned char mpc_srcbusirq;
-	unsigned char mpc_destapic;	
+	unsigned char mpc_destapic;
 #define MP_APIC_ALL	0xFF
 	unsigned char mpc_destapiclint;
 } __attribute__((packed));
@@ -211,7 +211,7 @@
 #define ADDRESS_RANGE_SUBTRACT 1
 #define ADDRESS_RANGE_ADD      0
 	unsigned int  mpe_range_list;
-#define RANGE_LIST_IO_ISA	0	
+#define RANGE_LIST_IO_ISA	0
 	/* X100 - X3FF
 	 * X500 - X7FF
 	 * X900 - XBFF
@@ -243,7 +243,7 @@
 void smp_write_bus(struct mp_config_table *mc,
 	unsigned char id, const char *bustype);
 void smp_write_ioapic(struct mp_config_table *mc,
-	unsigned char id, unsigned char ver, 
+	unsigned char id, unsigned char ver,
 	unsigned long apicaddr);
 void smp_write_intsrc(struct mp_config_table *mc,
 	unsigned char irqtype, unsigned short irqflag,
@@ -269,7 +269,7 @@
 	unsigned int range_list);
 unsigned char smp_compute_checksum(void *v, int len);
 void *smp_write_floating_table(unsigned long addr);
-void *smp_write_floating_table_physaddr(unsigned long addr, 
+void *smp_write_floating_table_physaddr(unsigned long addr,
 		unsigned long mpf_physptr);
 unsigned long write_smp_table(unsigned long addr);
 

Modified: trunk/src/arch/i386/include/bitops.h
==============================================================================
--- trunk/src/arch/i386/include/bitops.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/include/bitops.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -15,6 +15,6 @@
 		"1:\n\t"
 		: "=r" (r) : "r" (x));
 	return r;
-		
+
 }
 #endif /* I386_BITOPS_H */

Modified: trunk/src/arch/i386/include/stdint.h
==============================================================================
--- trunk/src/arch/i386/include/stdint.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/include/stdint.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -9,7 +9,7 @@
 
 /* Exact integral types */
 typedef unsigned char      uint8_t;
-typedef signed char        int8_t; 
+typedef signed char        int8_t;
 
 typedef unsigned short     uint16_t;
 typedef signed short       int16_t;
@@ -24,7 +24,7 @@
 
 /* Small types */
 typedef unsigned char      uint_least8_t;
-typedef signed char        int_least8_t; 
+typedef signed char        int_least8_t;
 
 typedef unsigned short     uint_least16_t;
 typedef signed short       int_least16_t;
@@ -39,7 +39,7 @@
 
 /* Fast Types */
 typedef unsigned char      uint_fast8_t;
-typedef signed char        int_fast8_t; 
+typedef signed char        int_fast8_t;
 
 typedef unsigned int       uint_fast16_t;
 typedef signed int         int_fast16_t;
@@ -50,7 +50,7 @@
 #if __HAVE_LONG_LONG__
 typedef unsigned long long uint_fast64_t;
 typedef signed long long   int_fast64_t;
-#endif 
+#endif
 
 /* Types for `void *' pointers.  */
 typedef int                intptr_t;

Modified: trunk/src/arch/i386/init/bootblock_prologue.c
==============================================================================
--- trunk/src/arch/i386/init/bootblock_prologue.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/init/bootblock_prologue.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2002 Eric Biederman
  *
  * This program is free software; you can redistribute it and/or modify

Modified: trunk/src/arch/i386/init/crt0_prologue.inc
==============================================================================
--- trunk/src/arch/i386/init/crt0_prologue.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/init/crt0_prologue.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2002 Eric Biederman
  *
  * This program is free software; you can redistribute it and/or modify

Modified: trunk/src/arch/i386/init/crt0_romcc_epilogue.inc
==============================================================================
--- trunk/src/arch/i386/init/crt0_romcc_epilogue.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/init/crt0_romcc_epilogue.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* 
+/*
  * Copyright 2002 Eric Biederman
  *
  * This file is free software; you can redistribute it and/or
@@ -11,7 +11,7 @@
 __main:
 	post_code(0x11)
 	cld			/* clear direction flag */
-	
+
 	movl	%ebp, %esi
 
 	movl $ROMSTAGE_STACK, %esp
@@ -19,7 +19,7 @@
 	pushl %esi
 	call copy_and_run
 
-.Lhlt:	
+.Lhlt:
 	post_code(0xee)
 	hlt
 	jmp	.Lhlt

Modified: trunk/src/arch/i386/init/ldscript.ld
==============================================================================
--- trunk/src/arch/i386/init/ldscript.ld	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/init/ldscript.ld	Tue Apr 27 08:56:47 2010	(r5507)
@@ -35,6 +35,6 @@
 		*(.reset)
                 . = 15 ;
                 BYTE(0x00);
-	} 
+	}
 }
 

Modified: trunk/src/arch/i386/lib/cbfs_and_run.c
==============================================================================
--- trunk/src/arch/i386/lib/cbfs_and_run.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/lib/cbfs_and_run.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2008-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

Modified: trunk/src/arch/i386/lib/cpu.c
==============================================================================
--- trunk/src/arch/i386/lib/cpu.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/lib/cpu.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -43,7 +43,7 @@
  * by the fact that they preserve the flags across the division of 5/2.
  * PII and PPro exhibit this behavior too, but they have cpuid available.
  */
- 
+
 /*
  * Perform the Cyrix 5/2 test. A Cyrix won't change
  * the flags, while other 486 chips will.
@@ -68,11 +68,11 @@
  *	Detect a NexGen CPU running without BIOS hypercode new enough
  *	to have CPUID. (Thanks to Herbert Oppmann)
  */
- 
+
 static int deep_magic_nexgen_probe(void)
 {
 	int ret;
-	
+
 	__asm__ __volatile__ (
 		"	movw	$0x5555, %%ax\n"
 		"	xorw	%%dx,%%dx\n"
@@ -81,7 +81,7 @@
 		"	movl	$0, %%eax\n"
 		"	jnz	1f\n"
 		"	movl	$1, %%eax\n"
-		"1:\n" 
+		"1:\n"
 		: "=a" (ret) : : "cx", "dx" );
 	return  ret;
 }
@@ -95,7 +95,7 @@
 } x86_vendors[] = {
 	{ X86_VENDOR_INTEL,     "GenuineIntel", },
 	{ X86_VENDOR_CYRIX,     "CyrixInstead", },
-	{ X86_VENDOR_AMD,       "AuthenticAMD", },       
+	{ X86_VENDOR_AMD,       "AuthenticAMD", },
 	{ X86_VENDOR_UMC,       "UMC UMC UMC ", },
 	{ X86_VENDOR_NEXGEN,    "NexGenDriven", },
 	{ X86_VENDOR_CENTAUR,   "CentaurHauls", },
@@ -124,7 +124,7 @@
 	const char *name;
 	name = "<invalid cpu vendor>";
 	if ((vendor < (ARRAY_SIZE(x86_vendor_name))) &&
-		(x86_vendor_name[vendor] != 0)) 
+		(x86_vendor_name[vendor] != 0))
 	{
 		name = x86_vendor_name[vendor];
 	}
@@ -173,7 +173,7 @@
 		vendor_name[10] = (result.ecx >> 16) & 0xff;
 		vendor_name[11] = (result.ecx >> 24) & 0xff;
 		vendor_name[12] = '\0';
-		
+
 		/* Intel-defined flags: level 0x00000001 */
 		if (cpuid_level >= 0x00000001) {
 			cpu->device = cpuid_eax(0x00000001);
@@ -200,7 +200,7 @@
 		struct cpu_device_id *id;
 		for(id = driver->id_table; id->vendor != X86_VENDOR_INVALID; id++) {
 			if ((cpu->vendor == id->vendor) &&
-				(cpu->device == id->device)) 
+				(cpu->device == id->device))
 			{
 				goto found;
 			}
@@ -221,7 +221,7 @@
 	struct device *cpu;
 	struct cpu_info *info;
 	struct cpuinfo_x86 c;
-	
+
 	info = cpu_info();
 
 	printk(BIOS_INFO, "Initializing CPU #%ld\n", info->index);
@@ -240,11 +240,11 @@
 
 	printk(BIOS_DEBUG, "CPU: family %02x, model %02x, stepping %02x\n",
 		c.x86, c.x86_model, c.x86_mask);
-	
+
 	/* Lookup the cpu's operations */
 	set_cpu_ops(cpu);
 
-	if(!cpu->ops) { 
+	if(!cpu->ops) {
 		/* mask out the stepping and try again */
 		cpu->device -= c.x86_mask;
 		set_cpu_ops(cpu);
@@ -252,7 +252,7 @@
 		if(!cpu->ops) die("Unknown cpu");
 		printk(BIOS_DEBUG, "Using generic cpu ops (good)\n");
 	}
-	
+
 
 	/* Initialize the cpu */
 	if (cpu->ops && cpu->ops->init) {

Modified: trunk/src/arch/i386/lib/exception.c
==============================================================================
--- trunk/src/arch/i386/lib/exception.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/lib/exception.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -4,7 +4,7 @@
 #if defined(CONFIG_GDB_STUB) && CONFIG_GDB_STUB == 1
 
 /* BUFMAX defines the maximum number of characters in inbound/outbound buffers.
- * At least NUM_REGBYTES*2 are needed for register packets 
+ * At least NUM_REGBYTES*2 are needed for register packets
  */
 #define BUFMAX 400
 enum regnames {
@@ -62,7 +62,7 @@
 #define GDB_SIGSOUND     42    /* Sound completed */
 #define GDB_SIGSAK       43    /* Secure attention */
 #define GDB_SIGPRIO      44    /* SIGPRIO */
-		        
+
 #define GDB_SIG33        45    /* Real-time event 33 */
 #define GDB_SIG34        46    /* Real-time event 34 */
 #define GDB_SIG35        47    /* Real-time event 35 */
@@ -375,7 +375,7 @@
 	if (info->vector < ARRAY_SIZE(exception_to_signal)) {
 		signo = exception_to_signal[info->vector];
 	}
-	
+
 	/* reply to the host that an exception has occured */
 	out_buffer[0] = 'S';
 	out_buffer[1] = hexchars[(signo>>4) & 0xf];
@@ -412,7 +412,7 @@
 		case 'm':
 			/* mAA..AA,LLLL  Read LLLL bytes at address AA..AA */
 			ptr = &in_buffer[1];
-			if (	parse_ulong(&ptr, &addr) && 
+			if (	parse_ulong(&ptr, &addr) &&
 				(*ptr++ == ',') &&
 				parse_ulong(&ptr, &length)) {
 				copy_to_hex(out_buffer, (void *)addr, length);
@@ -423,7 +423,7 @@
 		case 'M':
 			/* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
 			ptr = &in_buffer[1];
-			if (	parse_ulong(&ptr, &addr) && 
+			if (	parse_ulong(&ptr, &addr) &&
 				(*(ptr++) == ',') &&
 				parse_ulong(&ptr, &length) &&
 				(*(ptr++) == ':')) {
@@ -475,7 +475,7 @@
 		put_packet(out_buffer);
 	}
 #else /* !CONFIG_GDB_STUB */
-	printk(BIOS_EMERG, 
+	printk(BIOS_EMERG,
 		"Unexpected Exception: %d @ %02x:%08x - Halting\n"
 		"Code: %d eflags: %08x\n"
 		"eax: %08x ebx: %08x ecx: %08x edx: %08x\n"

Modified: trunk/src/arch/i386/lib/id.inc
==============================================================================
--- trunk/src/arch/i386/lib/id.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/lib/id.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,9 +2,9 @@
 
 	.globl __id_start
 __id_start:
-vendor:	
+vendor:
 	.asciz CONFIG_MAINBOARD_VENDOR
-part:		
+part:
 	.asciz CONFIG_MAINBOARD_PART_NUMBER
 .long __id_end + CONFIG_ID_SECTION_OFFSET - vendor  /* Reverse offset to the vendor id */
 .long __id_end + CONFIG_ID_SECTION_OFFSET - part    /* Reverse offset to the part number */

Modified: trunk/src/arch/i386/lib/ioapic.c
==============================================================================
--- trunk/src/arch/i386/lib/ioapic.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/lib/ioapic.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -40,13 +40,13 @@
 	u32 low, high;
 	u32 i, ioapic_interrupts;
 
-	printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at 0x%08x\n", ioapic_base); 
+	printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at 0x%08x\n", ioapic_base);
 
 	/* Read the available number of interrupts */
 	ioapic_interrupts = (io_apic_read(ioapic_base, 1) >> 16) & 0xff;
 	if (!ioapic_interrupts || ioapic_interrupts == 0xff)
 		ioapic_interrupts = 24;
-	printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts); 
+	printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
 
 	low = DISABLED;
 	high = NONE;
@@ -70,15 +70,15 @@
 	u32 low, high;
 	u32 i, ioapic_interrupts;
 
-	printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n", ioapic_base); 
+	printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n", ioapic_base);
 	printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = %02x\n",
 			bsp_lapicid);
 
 	if (ioapic_id) {
-		printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id); 
+		printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id);
 		/* Set IOAPIC ID if it has been specified */
-		io_apic_write(ioapic_base, 0x00, 
-			(io_apic_read(ioapic_base, 0x00) & 0xfff0ffff) | 
+		io_apic_write(ioapic_base, 0x00,
+			(io_apic_read(ioapic_base, 0x00) & 0xfff0ffff) |
 				(ioapic_id << 24));
 	}
 
@@ -86,7 +86,7 @@
 	ioapic_interrupts = (io_apic_read(ioapic_base, 1) >> 16) & 0xff;
 	if (!ioapic_interrupts || ioapic_interrupts == 0xff)
 		ioapic_interrupts = 24;
-	printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts); 
+	printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
 
 
 // XXX this decision should probably be made elsewhere, and
@@ -101,11 +101,11 @@
 	/* For the Pentium 4 and above APICs deliver their interrupts
 	 * on the front side bus, enable that.
 	 */
-	printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n"); 
+	printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n");
 	io_apic_write(ioapic_base, 0x03, io_apic_read(ioapic_base, 0x03) | (1 << 0));
 #endif
 #ifdef IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
-	printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n"); 
+	printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n");
 	io_apic_write(ioapic_base, 0x03, 0);
 #endif
 

Modified: trunk/src/arch/i386/lib/pci_ops_auto.c
==============================================================================
--- trunk/src/arch/i386/lib/pci_ops_auto.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/lib/pci_ops_auto.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -33,7 +33,7 @@
 		vendor = o->read16(&pbus, bus, devfn, PCI_VENDOR_ID);
 		if (((class == PCI_CLASS_BRIDGE_HOST) || (class == PCI_CLASS_DISPLAY_VGA)) ||
 			((vendor == PCI_VENDOR_ID_INTEL) || (vendor == PCI_VENDOR_ID_COMPAQ) ||
-				(vendor == PCI_VENDOR_ID_MOTOROLA))) { 
+				(vendor == PCI_VENDOR_ID_MOTOROLA))) {
 			return 1;
 		}
 	}
@@ -54,8 +54,8 @@
 		outb(0x01, 0xCFB);
 		tmp = inl(0xCF8);
 		outl(0x80000000, 0xCF8);
-		if ((inl(0xCF8) == 0x80000000) && 
-			pci_sanity_check(&pci_cf8_conf1)) 
+		if ((inl(0xCF8) == 0x80000000) &&
+			pci_sanity_check(&pci_cf8_conf1))
 		{
 			outl(tmp, 0xCF8);
 			printk(BIOS_DEBUG, "PCI: Using configuration type 1\n");

Modified: trunk/src/arch/i386/lib/printk_init.c
==============================================================================
--- trunk/src/arch/i386/lib/printk_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/lib/printk_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; version 2 of

Modified: trunk/src/arch/i386/lib/stages.c
==============================================================================
--- trunk/src/arch/i386/lib/stages.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/lib/stages.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

Modified: trunk/src/arch/i386/llshell/console.inc
==============================================================================
--- trunk/src/arch/i386/llshell/console.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/llshell/console.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -149,7 +149,7 @@
 	jz	11f		; \
 	__CONSOLE_INLINE_TX_AL	; \
 	jmp	10b		; \
-11:	
+11:
 
 
 #define CONSOLE_EMERG_TX_CHAR(byte)            __CONSOLE_TX_CHAR(byte)
@@ -234,7 +234,7 @@
 #define CONSOLE_SPEW_INLINE_TX_STRING(string) __CONSOLE_INLINE_TX_STRING(string)
 
 	/* uses:	esp, ax, dx */
-console_tx_al:	
+console_tx_al:
 	__CONSOLE_INLINE_TX_AL
 	RETSP
 
@@ -333,7 +333,7 @@
 	cmp	$0, %al
 	jne	9f
 	RETSP
-9:	
+9:
 	__CONSOLE_INLINE_TX_AL
 	jmp	console_tx_string
 

Modified: trunk/src/arch/i386/llshell/llshell.inc
==============================================================================
--- trunk/src/arch/i386/llshell/llshell.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/llshell/llshell.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -27,16 +27,16 @@
 // Designed to be an interactive shell that operates with zero
 // system resources.  For example at initial boot.
 
-// to use, jump to label "low_level_shell" 
+// to use, jump to label "low_level_shell"
 // set %esp to the return address for exiting
 
 
-#define UART_BASEADDR $0x3f8  
+#define UART_BASEADDR $0x3f8
 #define resultreg %esi
 #define subroutinereg %edi
 #define freqtime $2193  // 1.93 * freq
 #define timertime $6000
-.equ	sys_IOPL, 110		
+.equ	sys_IOPL, 110
 
 // .data
 // .text
@@ -75,9 +75,9 @@
 \r\nAll values in hex (0x prefixing ok)  \
 \r\n"
 
-cr:     
+cr:
 	.string "\r\n"
-spaces:     
+spaces:
 	.string "   "
 
 // .globl _start
@@ -187,7 +187,7 @@
 cmp $0x00776d6c,%eax
 jz  wmeml
 cmp $0x0000646d,%eax
-jz  dodmem  
+jz  dodmem
 cmp $0x6d656d74,%eax
 jz  memt                    // mem test
 cmp $0x00727374,%eax
@@ -195,7 +195,7 @@
 cmp $0x00525354,%eax
 jz  RST
 cmp $0x62656570,%eax
-jz  beep   
+jz  beep
 cmp $0x0000646c,%eax
 jz  dodl                    // download to mem <loc> <size>
 cmp $0x006a6d70,%eax
@@ -203,7 +203,7 @@
 cmp $0x62617564,%eax
 jz  baud                    // change baudrate
 cmp $0x00696e74,%eax
-jz  doint                   // trigger an interrupt 
+jz  doint                   // trigger an interrupt
 cmp $0x63616c6c,%eax
 jz  callto                  // call assumes memory
 cmp $0x70757368,%eax
@@ -270,7 +270,7 @@
 cmp  $0x3A,%al
 jl   subnum
 cmp  $0x47,%al
-jl   subcaps 
+jl   subcaps
 //sublc:
 sub  $0x57,%al
 jmp  additupn
@@ -370,7 +370,7 @@
 doneshow1:
 dec %cx
 cmp $0x0,%cx
-jz  exitdmem 
+jz  exitdmem
 add $0x04,%ebx
 jmp dmemloop
 exitdmem:
@@ -517,7 +517,7 @@
 jmp  readnibbles
 int1a:
 mov  resultreg,%eax
-// need to lookup int table? 
+// need to lookup int table?
 // int  %eax
 jmp  readcommand
 
@@ -560,7 +560,7 @@
 
 displayhexlinear:
 mov  resultreg,%eax
-xchg %al,%ah     
+xchg %al,%ah
 rol  $0x10,%eax
 xchg %al,%ah
 mov  %eax,resultreg
@@ -602,7 +602,7 @@
 
 displayasciilinear:
 mov  resultreg,%eax
-xchg %al,%ah     
+xchg %al,%ah
 rol  $0x10,%eax
 xchg %al,%ah
 mov  %eax,resultreg

Modified: trunk/src/arch/i386/llshell/pci.inc
==============================================================================
--- trunk/src/arch/i386/llshell/pci.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/llshell/pci.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -11,7 +11,7 @@
 	 *
 	 * Notes:	This routine is optimized for minimal register usage.
 	 *              And the tricks it does cannot scale beyond writing a single byte.
-	 *               
+	 *
 	 *              What it does is almost simple.
 	 *              It preserves %eax (baring special bits) until it is written
 	 *              out to the appropriate port.  And hides the data byte
@@ -52,7 +52,7 @@
 	 * Effects:	writes a single byte to pci config space
 	 *
 	 * Notes:	This routine is optimized for minimal register usage.
-	 *               
+	 *
 	 *              What it does is almost simple.
 	 *              It preserves %eax (baring special bits) until it is written
 	 *              out to the appropriate port.  And hides the least significant
@@ -91,7 +91,7 @@
 	 * Effects:	writes a single byte to pci config space
 	 *
 	 * Notes:	This routine is optimized for minimal register usage.
-	 *               
+	 *
 	 *              What it does is almost simple.
 	 *              It preserves %eax (baring special bits) until it is written
 	 *              out to the appropriate port.  And hides the least significant
@@ -118,7 +118,7 @@
 
 
 
-	
+
 	/*
 	 * Macro:	PCI_READ_CONFIG_BYTE
 	 * Arguments:	%eax address to read from (includes bus, device, function, &offset)
@@ -129,7 +129,7 @@
 	 * Effects:	reads a single byte from pci config space
 	 *
 	 * Notes:	This routine is optimized for minimal register usage.
-	 *               
+	 *
 	 *              What it does is almost simple.
 	 *              It preserves %eax (baring special bits) until it is written
 	 *              out to the appropriate port.  And hides the least significant
@@ -165,7 +165,7 @@
 	 * Effects:	reads a 2 bytes from pci config space
 	 *
 	 * Notes:	This routine is optimized for minimal register usage.
-	 *               
+	 *
 	 *              What it does is almost simple.
 	 *              It preserves %eax (baring special bits) until it is written
 	 *              out to the appropriate port.  And hides the least significant
@@ -201,7 +201,7 @@
 	 * Effects:	reads 4 bytes from pci config space
 	 *
 	 * Notes:	This routine is optimized for minimal register usage.
-	 *               
+	 *
 	 *              What it does is almost simple.
 	 *              It preserves %eax (baring special bits) until it is written
 	 *              out to the appropriate port.  And hides the least significant

Modified: trunk/src/arch/i386/llshell/ramtest.inc
==============================================================================
--- trunk/src/arch/i386/llshell/ramtest.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/arch/i386/llshell/ramtest.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -6,7 +6,7 @@
 
 	jmp	rt_skip
 #define RAMTEST 1
-#if RAMTEST	
+#if RAMTEST
 	.section ".rom.data"
 
 rt_test:	.string "Testing SDRAM : "
@@ -16,7 +16,7 @@
 rt_done:	.string "Done.\r\n"
 	.previous
 #endif
-	
+
 ramtest:
 #if RAMTEST
 	mov %eax, %esi
@@ -41,7 +41,7 @@
 
 	/* Display address being filled */
 	/* CONSOLE_INFO_TX_HEX32(arg) will overwrite %ebx with arg */
-	
+
 	CONSOLE_INFO_TX_HEX32(%ebx)
 	CONSOLE_INFO_TX_CHAR($'\r')
 2:
@@ -110,7 +110,7 @@
 	sub $1, %ecx
 	jz 5f
 	jmp 3b
-5:	
+5:
 	CONSOLE_INFO_TX_STRING($rt_toomany)
 	post_code(0xf1)
 	jmp	.Lhlt

Modified: trunk/src/boot/hardwaremain.c
==============================================================================
--- trunk/src/boot/hardwaremain.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/boot/hardwaremain.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -45,10 +45,10 @@
 /**
  * @brief Main function of the RAM part of coreboot.
  *
- * Coreboot is divided into Pre-RAM part and RAM part. 
- * 
+ * Coreboot is divided into Pre-RAM part and RAM part.
+ *
  * Device Enumeration:
- *	In the dev_enumerate() phase, 
+ *	In the dev_enumerate() phase,
  */
 
 void hardwaremain(int boot_complete);
@@ -61,10 +61,10 @@
 
 	/* console_init() MUST PRECEDE ALL printk()! */
 	console_init();
-	
+
 	post_code(0x39);
 
-	printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n", 
+	printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n",
 		      coreboot_version, coreboot_extra_version, coreboot_build,
 		      (boot_complete)?"rebooting":"booting");
 
@@ -76,7 +76,7 @@
 	}
 
 	/* FIXME: Is there a better way to handle this? */
-	init_timer(); 
+	init_timer();
 
 	/* Find the devices we don't have hard coded knowledge about. */
 	dev_enumerate();

Modified: trunk/src/console/Kconfig
==============================================================================
--- trunk/src/console/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/console/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -98,7 +98,7 @@
 
 	  It also requires a USB2 controller which supports the EHCI
 	  Debug Port capability. Controllers which are known to work:
-	
+
 	    * 10b9:5239 ALi Corporation USB 2.0 (USB PCI card)
 	    * 8086:24cd Intel ICH4/ICH4-M
 	    * 8086:24dd Intel ICH5

Modified: trunk/src/console/btext_console.c
==============================================================================
--- trunk/src/console/btext_console.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/console/btext_console.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -62,8 +62,8 @@
 
 boot_infos_t disp_bi;
 
-#define BTEXT		
-#define BTDATA	
+#define BTEXT
+#define BTDATA
 
 
 /* This function will enable the early boot text when doing OF booting. This
@@ -100,7 +100,7 @@
  *    changes.
  */
 
-void 
+void
 map_boot_text(void)
 {
 #if 0
@@ -111,9 +111,9 @@
 		return;
 	base = ((unsigned long) bi->dispDeviceBase) & 0xFFFFF000UL;
 	offset = ((unsigned long) bi->dispDeviceBase) - base;
-	size = bi->dispDeviceRowBytes * bi->dispDeviceRect[3] + offset 
+	size = bi->dispDeviceRowBytes * bi->dispDeviceRect[3] + offset
 		+ bi->dispDeviceRect[0];
-	bi->logicalDisplayBase = ioremap(base,0x800000 ); 
+	bi->logicalDisplayBase = ioremap(base,0x800000 );
 	if (bi->logicalDisplayBase == 0)
 		return;
 //	bi->logicalDisplayBase += offset;
@@ -360,7 +360,7 @@
     0x0000ffff,0xff00ffff,0x00ffffff,0xffffffff
 #else
 #error FIXME: No endianness??
-#endif                      
+#endif
 };
 #if 0
 static const u32 expand_bits_16[4] BTDATA = {

Modified: trunk/src/console/console.c
==============================================================================
--- trunk/src/console/console.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/console/console.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 /*
- * Bootstrap code for the INTEL 
+ * Bootstrap code for the INTEL
  */
 
 #include <console/console.h>
@@ -18,7 +18,7 @@
 	struct console_driver *driver;
 	if(get_option(&console_loglevel, "debug_level"))
 		console_loglevel=CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
-	
+
 	for(driver = console_drivers; driver < econsole_drivers; driver++) {
 		if (!driver->init)
 			continue;
@@ -38,7 +38,7 @@
 {
 	struct console_driver *driver;
 	for(driver = console_drivers; driver < econsole_drivers; driver++) {
-		if (!driver->tx_flush) 
+		if (!driver->tx_flush)
 			continue;
 		driver->tx_flush();
 	}
@@ -99,7 +99,7 @@
 
 void console_init(void)
 {
-	static const char console_test[] = 
+	static const char console_test[] =
 		"\n\ncoreboot-"
 		COREBOOT_VERSION
 		COREBOOT_EXTRA_VERSION

Modified: trunk/src/console/logbuf_console.c
==============================================================================
--- trunk/src/console/logbuf_console.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/console/logbuf_console.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,7 +2,7 @@
 
 #define LOGBUF_SIZE  1024
 
-// KEEP THIS GLOBAL. 
+// KEEP THIS GLOBAL.
 // I need the address so I can watch it with the ARIUM hardware. RGM.
 char logbuf[LOGBUF_SIZE];
 int logbuf_offset = 0;

Modified: trunk/src/console/uart8250_console.c
==============================================================================
--- trunk/src/console/uart8250_console.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/console/uart8250_console.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -38,17 +38,17 @@
 	uart8250_init(CONFIG_TTYS0_BASE, divisor, CONFIG_TTYS0_LCS);
 }
 
-static void ttyS0_tx_byte(unsigned char data) 
+static void ttyS0_tx_byte(unsigned char data)
 {
 	uart8250_tx_byte(CONFIG_TTYS0_BASE, data);
 }
 
-static unsigned char ttyS0_rx_byte(void) 
+static unsigned char ttyS0_rx_byte(void)
 {
 	return uart8250_rx_byte(CONFIG_TTYS0_BASE);
 }
 
-static int ttyS0_tst_byte(void) 
+static int ttyS0_tst_byte(void)
 {
 	return uart8250_can_rx_byte(CONFIG_TTYS0_BASE);
 }

Modified: trunk/src/console/vsprintf.c
==============================================================================
--- trunk/src/console/vsprintf.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/console/vsprintf.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

Modified: trunk/src/console/vtxprintf.c
==============================================================================
--- trunk/src/console/vtxprintf.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/console/vtxprintf.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -30,7 +30,7 @@
 #define SPECIAL	32		/* 0x */
 #define LARGE	64		/* use 'ABCDEF' instead of 'abcdef' */
 
-static int number(void (*tx_byte)(unsigned char byte), 
+static int number(void (*tx_byte)(unsigned char byte),
 	unsigned long long num, int base, int size, int precision, int type)
 {
 	char c,sign,tmp[66];
@@ -112,7 +112,7 @@
 	int precision;		/* min. # of digits for integers; max
 				   number of chars for from string */
 	int qualifier;		/* 'h', 'l', or 'L' for integer fields */
-	
+
 	int count;
 
 	for (count=0; *fmt ; ++fmt) {
@@ -120,7 +120,7 @@
 			tx_byte(*fmt), count++;
 			continue;
 		}
-			
+
 		/* process flags */
 		flags = 0;
 		repeat:
@@ -132,7 +132,7 @@
 				case '#': flags |= SPECIAL; goto repeat;
 				case '0': flags |= ZEROPAD; goto repeat;
 				}
-		
+
 		/* get field width */
 		field_width = -1;
 		if (is_digit(*fmt))
@@ -150,7 +150,7 @@
 		/* get the precision */
 		precision = -1;
 		if (*fmt == '.') {
-			++fmt;	
+			++fmt;
 			if (is_digit(*fmt))
 				precision = skip_atoi(&fmt);
 			else if (*fmt == '*') {

Modified: trunk/src/cpu/amd/dualcore/Makefile.inc
==============================================================================
--- trunk/src/cpu/amd/dualcore/Makefile.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/dualcore/Makefile.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,2 +1,2 @@
-# This is a leaf Makefile, no conditionals. If it is included it will be used. 
+# This is a leaf Makefile, no conditionals. If it is included it will be used.
 obj-y += amd_sibling.o

Modified: trunk/src/cpu/amd/dualcore/amd_sibling.c
==============================================================================
--- trunk/src/cpu/amd/dualcore/amd_sibling.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/dualcore/amd_sibling.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -27,12 +27,12 @@
 	for(nodeid=0; nodeid<nodes; nodeid++){
 		int j;
 		dev = dev_find_slot(0, PCI_DEVFN(0x18+nodeid, 3));
-		j = (pci_read_config32(dev, 0xe8) >> 12) & 3; 
+		j = (pci_read_config32(dev, 0xe8) >> 12) & 3;
 		if(siblings < j) {
 			siblings = j;
 		}
 	}
-	
+
 	return siblings;
 }
 
@@ -47,7 +47,7 @@
                 dev = dev_find_slot(0, PCI_DEVFN(0x18+nodeid, 0));
                 val = pci_read_config32(dev, 0x68);
 		val |= (1<<17)|(1<<18);
-		pci_write_config32(dev, 0x68, val); 
+		pci_write_config32(dev, 0x68, val);
         }
 }
 
@@ -70,9 +70,9 @@
 	siblings = get_max_siblings(nodes);
 
 	if(bsp_apic_id > 0) { // io apic could start from 0
-		return 0;  
+		return 0;
 	} else if(pci_read_config32(dev, 0x68) & ( (1<<17) | (1<<18)) )  { // enabled ext id but bsp = 0
-		return 1; 
+		return 1;
 	}
 
 	nb_cfg_54 = read_nb_cfg_54();
@@ -100,7 +100,7 @@
 
 	        //4:10 for two way  8:12 for four way 16:16 for eight way
 		//Use CONFIG_MAX_PHYSICAL_CPUS instead of nodes for better consistency?
-	        apicid_base = nb_cfg_54 ? (siblings+1) * nodes :  8 * siblings + nodes; 
+	        apicid_base = nb_cfg_54 ? (siblings+1) * nodes :  8 * siblings + nodes;
 
 	}
 	else {
@@ -112,7 +112,7 @@
 		printk(BIOS_INFO, "if the IO APIC device doesn't support 256 apic id, \n you need to set CONFIG_ENABLE_APIC_EXT_ID in romstage.c so you can spare 16 id for ioapic\n");
 		enable_apic_ext_id(nodes);
 	}
-	
+
 	return apicid_base;
 }
 
@@ -145,7 +145,7 @@
 		siblings);
 #endif
 
-	nb_cfg_54 = read_nb_cfg_54(); 
+	nb_cfg_54 = read_nb_cfg_54();
 #if 1
 	id = get_node_core_id(nb_cfg_54); // pre e0 nb_cfg_54 can not be set
 
@@ -159,7 +159,7 @@
                 return;
 	}
 #endif
-		
+
 	/* I am the primary cpu start up my siblings */
 
 	for(i = 1; i <= siblings; i++) {
@@ -191,7 +191,7 @@
                 new->path.apic.core_id = i;
 
 #if 1
-		printk(BIOS_DEBUG, "CPU: %u has sibling %u\n", 
+		printk(BIOS_DEBUG, "CPU: %u has sibling %u\n",
 			cpu->path.apic.apic_id,
 			new->path.apic.apic_id);
 #endif

Modified: trunk/src/cpu/amd/dualcore/dualcore_id.c
==============================================================================
--- trunk/src/cpu/amd/dualcore/dualcore_id.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/dualcore/dualcore_id.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -14,7 +14,7 @@
         return ( ( msr.hi >> (54-32)) & 1);
 }
 
-static inline unsigned get_initial_apicid(void) 
+static inline unsigned get_initial_apicid(void)
 {
 	return ((cpuid_ebx(1) >> 24) & 0xf);
 }
@@ -22,7 +22,7 @@
 //called by amd_siblings too
 #define CORE_ID_BIT 1
 #define NODE_ID_BIT 3
-struct node_core_id get_node_core_id(unsigned nb_cfg_54) 
+struct node_core_id get_node_core_id(unsigned nb_cfg_54)
 {
 	struct node_core_id id;
 	//    get the apicid via cpuid(1) ebx[27:24]
@@ -31,8 +31,8 @@
                 id.coreid = (cpuid_ebx(1) >> 24) & 0xf;
                 id.nodeid = (id.coreid>>CORE_ID_BIT);
                 id.coreid &= ((1<<CORE_ID_BIT)-1);
-        } 
-	else 
+        }
+	else
 	{
                 // when NB_CFG[54] is clear, nodeid = ebx[26:24], coreid = ebx[27]
                 id.nodeid = (cpuid_ebx(1) >> 24) & 0xf;

Modified: trunk/src/cpu/amd/model_10xxx/Makefile.inc
==============================================================================
--- trunk/src/cpu/amd/model_10xxx/Makefile.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_10xxx/Makefile.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-# no conditionals here. If you include this file from a socket, then you get all the binaries. 
+# no conditionals here. If you include this file from a socket, then you get all the binaries.
 driver-y += model_10xxx_init.o
 obj-y += update_microcode.o
 obj-y += apic_timer.o

Modified: trunk/src/cpu/amd/model_10xxx/mc_patch_01000095.h
==============================================================================
--- trunk/src/cpu/amd/model_10xxx/mc_patch_01000095.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_10xxx/mc_patch_01000095.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -112,7 +112,7 @@
 0x0f, 0xe0, 0xdf, 0xf0, 0x23, 0x03, 0x00, 0x8e, 0x03, 0xff, 0x00, 0xfe,
 0x7f, 0x00, 0xff, 0x86, 0x0f, 0xfc, 0x03, 0xf8, 0xfe, 0x01, 0xfc, 0x1b,
 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,
-    
+
 
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

Modified: trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c
==============================================================================
--- trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -134,12 +134,12 @@
 	{ X86_VENDOR_AMD, 0x100f22 },
 	{ X86_VENDOR_AMD, 0x100f23 },
 	{ X86_VENDOR_AMD, 0x100f40 },		/* RB-C0 */
-	{ X86_VENDOR_AMD, 0x100F42 },           /* RB-C2 */ 
-	{ X86_VENDOR_AMD, 0x100F43 },           /* RB-C3 */ 
-	{ X86_VENDOR_AMD, 0x100F52 },           /* BL-C2 */ 
-	{ X86_VENDOR_AMD, 0x100F62 },           /* DA-C2 */ 
-	{ X86_VENDOR_AMD, 0x100F63 },           /* DA-C3 */ 
-	{ X86_VENDOR_AMD, 0x100F80 },           /* HY-D0 */ 
+	{ X86_VENDOR_AMD, 0x100F42 },           /* RB-C2 */
+	{ X86_VENDOR_AMD, 0x100F43 },           /* RB-C3 */
+	{ X86_VENDOR_AMD, 0x100F52 },           /* BL-C2 */
+	{ X86_VENDOR_AMD, 0x100F62 },           /* DA-C2 */
+	{ X86_VENDOR_AMD, 0x100F63 },           /* DA-C3 */
+	{ X86_VENDOR_AMD, 0x100F80 },           /* HY-D0 */
 	{ 0, 0 },
 };
 

Modified: trunk/src/cpu/amd/model_fxx/Makefile.inc
==============================================================================
--- trunk/src/cpu/amd/model_fxx/Makefile.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_fxx/Makefile.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-# no conditionals here. If you include this file from a socket, then you get all the binaries. 
+# no conditionals here. If you include this file from a socket, then you get all the binaries.
 driver-y += model_fxx_init.o
 obj-y += apic_timer.o
 obj-y += model_fxx_update_microcode.o

Modified: trunk/src/cpu/amd/model_fxx/apic_timer.c
==============================================================================
--- trunk/src/cpu/amd/model_fxx/apic_timer.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_fxx/apic_timer.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -25,5 +25,5 @@
 	do {
 		value = lapic_read(LAPIC_TMCCT);
 	} while((start - value) < ticks);
-	
+
 }

Modified: trunk/src/cpu/amd/model_fxx/fidvid.c
==============================================================================
--- trunk/src/cpu/amd/model_fxx/fidvid.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_fxx/fidvid.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -424,7 +424,7 @@
 
 static u32 calc_common_fidvid(unsigned fidvid, unsigned fidvidx)
 {
-	/* FIXME: need to check the change path to verify if it is reachable 
+	/* FIXME: need to check the change path to verify if it is reachable
 	 * when common fid is small than 1.6G */
 	if ((fidvid & 0xff00) <= (fidvidx & 0xff00)) {
 		return fidvid;
@@ -549,7 +549,7 @@
 	/* let all ap trains to state 1 */
 	lapic_write(LAPIC_MSG_REG, (bsp_apicid << 24) | 1);
 
-	/* calculate the common max fid/vid that could be used for 
+	/* calculate the common max fid/vid that could be used for
 	 * all APs and BSP */
 #if SET_FIDVID_STORE_AP_APICID_AT_FIRST == 1
 	ap_apicidx.num = 0;

Modified: trunk/src/cpu/amd/model_fxx/microcode_rev_c.h
==============================================================================
--- trunk/src/cpu/amd/model_fxx/microcode_rev_c.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_fxx/microcode_rev_c.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -95,7 +95,7 @@
  0xfe, 0x01, 0xfc, 0x1b, 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,
 
 /* 1088=64 * 17 0 */
-0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
+0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

Modified: trunk/src/cpu/amd/model_fxx/microcode_rev_d.h
==============================================================================
--- trunk/src/cpu/amd/model_fxx/microcode_rev_d.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_fxx/microcode_rev_d.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -94,7 +94,7 @@
  0xdf, 0x03, 0x00, 0xff, 0x03, 0xff, 0x00, 0xfe, 0x7f, 0x00, 0xff, 0x86, 0x0f, 0xfc, 0x03, 0xf8,
  0xfe, 0x01, 0xfc, 0x1b, 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,
  /* 1088=64 * 17 0 */
-0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
+0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

Modified: trunk/src/cpu/amd/model_fxx/microcode_rev_e.h
==============================================================================
--- trunk/src/cpu/amd/model_fxx/microcode_rev_e.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_fxx/microcode_rev_e.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -95,7 +95,7 @@
  0xfe, 0x01, 0xfc, 0x1b, 0x3f, 0xf0, 0x0f, 0xe0, 0xf8, 0x07, 0xf0, 0x6f, 0xff, 0xef, 0x01, 0x80,
 
 /* 1088=64 * 17 0 */
-0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
+0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 
 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,

Modified: trunk/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
==============================================================================
--- trunk/src/cpu/amd/model_fxx/model_fxx_update_microcode.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_fxx/model_fxx_update_microcode.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -94,7 +94,7 @@
 	#endif
 
 	#if CONFIG_K8_REV_F_SUPPORT == 1
-	
+
 	#endif
 
 	};
@@ -102,7 +102,7 @@
 
 	unsigned new_id;
 	int i;
-	
+
 	new_id = 0;
 
 	for(i=0; i<sizeof(id_mapping_table); i+=2 ) {
@@ -112,7 +112,7 @@
 		}
 	}
 
-	return new_id;	
+	return new_id;
 
 }
 

Modified: trunk/src/cpu/amd/model_fxx/processor_name.c
==============================================================================
--- trunk/src/cpu/amd/model_fxx/processor_name.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_fxx/processor_name.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -77,7 +77,7 @@
 	/* 0x24 */ "AMD Athlon(tm) 64 FX-ZZ Processor",
 	/* 0x25 */ NULL,
 	/* 0x26 */ "AMD Sempron(tm) Processor TT00+",
-	/* 0x27-0x28 */ NULL, NULL, 
+	/* 0x27-0x28 */ NULL, NULL,
 	/* 0x29 */ "Dual Core AMD Opteron(tm) Processor 1RR SE",
 	/* 0x2A */ "Dual Core AMD Opteron(tm) Processor 2RR SE",
 	/* 0x2B */ "Dual Core AMD Opteron(tm) Processor 8RR SE",
@@ -404,13 +404,13 @@
 
 	memset(program_string, 0, 48);
 	strcpy(program_string, processor_name_string);
-	
+
 	/* Now create a model number - See Table 4. Model Number Calculation
-	 * in the Revision Guide. NOTE: #6, EE was changed to VV because 
+	 * in the Revision Guide. NOTE: #6, EE was changed to VV because
 	 * otherwise it clashes with the brand names.
 	 */
-	
-	for (i=0; i<47; i++) { // 48 -1 
+
+	for (i=0; i<47; i++) { // 48 -1
 		if(program_string[i] == program_string[i+1]) {
 			switch (program_string[i]) {
 #if CONFIG_K8_REV_F_SUPPORT == 0
@@ -430,11 +430,11 @@
 			case 'Y': ModelNumber = 29 + NN; break;
 #endif
 			}
-			
+
 			if(ModelNumber && ModelNumber < 100) {
 				// No idea what to do with RR=100. According
 				// to the revision guide this is possible.
-				// 
+				//
 				// --> "AMD Opteron(tm) Processor 8100"?
 				program_string[i]=(ModelNumber/10)+'0';
 				program_string[i+1]=(ModelNumber%10)+'0';
@@ -442,7 +442,7 @@
 			}
 		}
 	}
-	
+
 	printk(BIOS_DEBUG, "CPU model %s\n", program_string);
 
 	for (i=0; i<6; i++) {

Modified: trunk/src/cpu/amd/model_gx2/cpubug.c
==============================================================================
--- trunk/src/cpu/amd/model_gx2/cpubug.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_gx2/cpubug.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -50,8 +50,8 @@
 	msr_t msr;
 
 	/*
-	 * forces serialization of all load misses. Setting this bit prevents the 
-	 * DM pipe from backing up if a read request has to be held up waiting 
+	 * forces serialization of all load misses. Setting this bit prevents the
+	 * DM pipe from backing up if a read request has to be held up waiting
 	 * for PCI writes to complete.
 	*/
 	msr = rdmsr(CPU_DM_CONFIG0);
@@ -61,14 +61,14 @@
 	wrmsr(CPU_DM_CONFIG0, msr);
 
 	/* interlock instruction fetches to WS regions with data accesses.
-	 * This prevents an instruction fetch from going out to PCI if the 
+	 * This prevents an instruction fetch from going out to PCI if the
 	 * data side is about to make a request.
 	 */
 	msr = rdmsr(CPU_IM_CONFIG);
 	msr.lo |= IM_CONFIG_LOWER_QWT_SET;
 	wrmsr(CPU_IM_CONFIG, msr);
-	
-	/* write serialize memory hole to PCI. Need to unWS when something is 
+
+	/* write serialize memory hole to PCI. Need to unWS when something is
 	 * shadowed regardless of cachablility.
 	 */
 	msr.lo = 0x021212121;
@@ -78,7 +78,7 @@
 	wrmsr( CPU_RCONF_E0_FF, msr);
 }
 
-/**************************************************************************** 
+/****************************************************************************
  *
  *	CPUbug784
  *
@@ -176,7 +176,7 @@
 	wrmsr(0x3003, msr);
 
 	/* change this value to zero if you need to disable this BTB SWAPSiF. */
-	if (1) { 
+	if (1) {
 
 		/* Disable enable_actions in DIAGCTL while setting up GLCP */
 		msr.hi = 0;
@@ -192,16 +192,16 @@
 		msr.lo = 2;
 		wrmsr(MSR_GLCP + 0x0016, msr);
 
-		/* The code below sets up the CPU to stall for 4 GeodeLink 
-		 * clocks when CPU is snooped.  Because setting XSTATE to 0 
-		 * overrides any other XSTATE action, the code will always 
-		 * stall for 4 GeodeLink clocks after a snoop request goes 
-		 * away even if it occured a clock or two later than a 
-		 * different snoop; the stall signal will never 'glitch high' 
+		/* The code below sets up the CPU to stall for 4 GeodeLink
+		 * clocks when CPU is snooped.  Because setting XSTATE to 0
+		 * overrides any other XSTATE action, the code will always
+		 * stall for 4 GeodeLink clocks after a snoop request goes
+		 * away even if it occured a clock or two later than a
+		 * different snoop; the stall signal will never 'glitch high'
 		 * for only one or two CPU clocks with this code.
 		 */
 
-		/* Send mb0 port 3 requests to upper GeodeLink diag bits 
+		/* Send mb0 port 3 requests to upper GeodeLink diag bits
 		   [63:32] */
 		msr.hi = 0;
 		msr.lo = 0x80338041;
@@ -222,25 +222,25 @@
 		msr.lo = 0;
 		wrmsr(MSR_GLCP + 0x004D, msr);
 
-		/* Writing action number 13: XSTATE=0 to occur when CPU is 
+		/* Writing action number 13: XSTATE=0 to occur when CPU is
 		   snooped unless we're stalled */
 		msr.hi = 0;
 		msr.lo = 0x00400000;
 		wrmsr(MSR_GLCP + 0x0075, msr);
 
-		/* Writing action number 11: inc XSTATE every GeodeLink clock 
+		/* Writing action number 11: inc XSTATE every GeodeLink clock
 		   unless we're idle */
 		msr.hi = 0;
 		msr.lo = 0x30000;
 		wrmsr(MSR_GLCP + 0x0073, msr);
 
-		/* Writing action number 5: STALL_CPU_PIPE when exitting idle 
+		/* Writing action number 5: STALL_CPU_PIPE when exitting idle
 		   state or not in idle state */
 		msr.hi = 0;
 		msr.lo = 0x00430000;
 		wrmsr(MSR_GLCP + 0x006D, msr);
 
-		/* Writing DIAGCTL Register to enable the stall action and to 
+		/* Writing DIAGCTL Register to enable the stall action and to
 		   let set5m watch the upper GeodeLink diag bits. */
 		msr.hi = 0;
 		msr.lo = 0x80004000;
@@ -338,7 +338,7 @@
 /***/
 /****************************************************************************/
 static void disablememoryreadorder(void)
-{	
+{
 	msr_t msr;
 	msr = rdmsr(MC_CF8F_DATA);
 
@@ -365,7 +365,7 @@
 		case 0x20:
 			pcideadlock();
 			eng1398();
-			/* cs 5530 bug; ignore 
+			/* cs 5530 bug; ignore
 			bug752();
 			*/
 			break;
@@ -376,7 +376,7 @@
 			bug118339();
 			break;
 		case 0x22:
-		case 0x30: 
+		case 0x30:
 			break;
 		default:
 			printk(BIOS_ERR, "unknown rev %x, bailing\n", rev);

Modified: trunk/src/cpu/amd/model_gx2/cpureginit.c
==============================================================================
--- trunk/src/cpu/amd/model_gx2/cpureginit.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_gx2/cpureginit.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -18,7 +18,7 @@
 	msr = rdmsr(msrnum);
 	msr.lo |=  DM_CONFIG0_LOWER_DCDIS_SET;
 	wrmsr(msrnum, msr);
-	
+
 	msr.lo =  0x00000003F;
 	msr.hi =  0x000000000;
 	msrnum = CPU_DM_BIST;
@@ -29,7 +29,7 @@
 	msr.lo &= 0x0F3FF0000;
 	if (msr.lo != 0xfeff0000)
 		goto BISTFail;
- 
+
 	msrnum = CPU_DM_CONFIG0;
 	msr = rdmsr(msrnum);
 	msr.lo &=  ~ DM_CONFIG0_LOWER_DCDIS_SET;
@@ -89,58 +89,58 @@
 		msr.hi =  0;
 		msr.lo = DIAG_SEL1_SET | DIAG_SET0_SET;
 		wrmsr(msrnum, msr);
-	
+
 		/*  Set up GLCP to grab BTM data.*/
 		msrnum = 0x04C00000C;		/*  GLCP_DBGOUT MSR*/
 		msr.hi =  0x0;
 		msr.lo =  0x08;			/*  reset value (SCOPE_SEL = 0) causes FIFO toshift out,*/
 		wrmsr(msrnum, msr);		/*  exchange it to anything else to prevent this*/
-	
+
 		/* ;Turn off debug clock*/
 		msrnum = 0x04C000016;		/* DBG_CLK_CTL*/
 		msr.lo =  0x00;			/* No clock*/
 		msr.hi =  0x00;
 		wrmsr(msrnum, msr);
-	
+
 		/* ;Set debug clock to CPU*/
 		msrnum = 0x04C000016;		/* DBG_CLK_CTL*/
 		msr.lo =  0x01;			/* CPU CLOCK*/
 		msr.hi =  0x00;
 		wrmsr(msrnum, msr);
-	
+
 		/* ;Set fifo ctl to BTM bits wide*/
 		msrnum = 0x04C00005E;		/*  FIFO_CTL*/
 		msr.lo =  0x003880000;		/*  Bit [25:24] are size (11=BTM, 10 = 64 bit, 01= 32 bit, 00 = 16bit)*/
 		wrmsr(msrnum, msr);	/*  Bit [23:21] are position (100 = CPU downto0)*/
 							/*  Bit [19] sets it up in slow data mode.*/
-	
+
 		/* ;enable fifo loading - BTM sizing will constrain*/
 		/* ; only valid BTM packets to load - this action should always be on*/
-	
+
 		msrnum = 0x04C00006F;		/*  GLCP ACTION7 - load fifo*/
 		msr.lo =  0x00000F000;		/*    Any nibble all 1's will always trigger*/
 		msr.hi =  0x000000000;		/* */
 		wrmsr(msrnum, msr);
-	
+
 		/* ;start storing diag data in the fifo*/
 		msrnum = 0x04C00005F;		/* DIAG CTL*/
 		msr.lo =  0x080000000;		/*  enable actions*/
 		msr.hi =  0x000000000;
 		wrmsr(msrnum, msr);
-	
+
 		/*  Set up delay on data lines, so that the hold time*/
 		/*  is 1 ns.*/
 		msrnum = 0x04C00000D ;	/*  GLCP IO DELAY CONTROLS*/
 		msr.lo =  0x082b5ad68;
 		msr.hi =  0x080ad6b57;	/*  RGB delay = 0x07*/
 		wrmsr(msrnum, msr);
-	
+
 		/*  Set up DF to output diag information on DF pins.*/
 		msrnum = DF_GLD_MSR_MASTER_CONF;
 		msr.lo =  0x0220;
 		msr.hi = 0;
 		wrmsr(msrnum, msr);
-	
+
 		msrnum = 0x04C00000C ;	/*  GLCP_DBGOUT MSR*/
 		msr.hi =  0x0;
 		msr.lo =  0x0;				/*  reset value (SCOPE_SEL = 0) causes FIFO to shift out,*/
@@ -237,7 +237,7 @@
 	/* */
 	/* This code disables the data cache.  Don't execute this
 	 * unless you're testing something.
-	 */ 
+	 */
 	/*  Allow NVRam to override DM Setup*/
 	/*if (getnvram( TOKEN_CACHE_DM_MODE) != 1) {*/
 	{
@@ -249,7 +249,7 @@
 	}
 	/* This code disables the instruction cache.  Don't execute
 	 * this unless you're testing something.
-	*/ 
+	*/
 	/*  Allow NVRam to override IM Setup*/
 	/*if (getnvram( TOKEN_CACHE_IM_MODE) ==1) {*/
 	{

Modified: trunk/src/cpu/amd/model_lx/cpubug.c
==============================================================================
--- trunk/src/cpu/amd/model_lx/cpubug.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_lx/cpubug.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -44,15 +44,15 @@
 	msr_t msr;
 
 	/*
-	 * forces serialization of all load misses. Setting this bit prevents the 
-	 * DM pipe from backing up if a read request has to be held up waiting 
+	 * forces serialization of all load misses. Setting this bit prevents the
+	 * DM pipe from backing up if a read request has to be held up waiting
 	 * for PCI writes to complete.
 	 */
 	msr = rdmsr(CPU_DM_CONFIG0);
 	msr.lo |= DM_CONFIG0_LOWER_MISSER_SET;
 	wrmsr(CPU_DM_CONFIG0, msr);
 
-	/* write serialize memory hole to PCI. Need to unWS when something is 
+	/* write serialize memory hole to PCI. Need to unWS when something is
 	 * shadowed regardless of cachablility.
 	 */
 	msr.lo = 0x021212121;

Modified: trunk/src/cpu/amd/model_lx/cpureginit.c
==============================================================================
--- trunk/src/cpu/amd/model_lx/cpureginit.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_lx/cpureginit.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -248,8 +248,8 @@
 	msr.hi |= ARB_UPPER_QUACK_EN_SET;
 	wrmsr(msrnum, msr);
 
-	/* GLIU port active enable, limit south pole masters 
-	 * (AES and PCI) to one outstanding transaction. 
+	/* GLIU port active enable, limit south pole masters
+	 * (AES and PCI) to one outstanding transaction.
 	 */
 	print_debug(" GLIU port active enable\n");
 	msrnum = GLIU1_PORT_ACTIVE;

Modified: trunk/src/cpu/amd/model_lx/msrinit.c
==============================================================================
--- trunk/src/cpu/amd/model_lx/msrinit.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/model_lx/msrinit.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
@@ -24,7 +24,7 @@
 	msr_t msr;
 };
 
-static const struct msrinit msr_table[] = 
+static const struct msrinit msr_table[] =
 {
 	{CPU_RCONF_DEFAULT, {.hi = 0x24fffc02,.lo = 0x1000A000}}, /* Setup access to cache under 1MB.
 								   * Rom Properties: Write Serialize, WriteProtect.
@@ -35,7 +35,7 @@
 	{CPU_RCONF_A0_BF,   {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xA0000-0xBFFFF : (Write Back) */
 	{CPU_RCONF_C0_DF,   {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xC0000-0xDFFFF : (Write Back) */
 	{CPU_RCONF_E0_FF,   {.hi = 0x00000000,.lo = 0x00000000}}, /* 0xE0000-0xFFFFF : (Write Back) */
-       
+
 	/* Setup access to memory under 1MB. Note: VGA hole at 0xA0000-0xBFFFF */
 	{MSR_GLIU0_BASE1,   {.hi = 0x20000000,.lo = 0x000fff80}}, // 0x00000-0x7FFFF
 	{MSR_GLIU0_BASE2,   {.hi = 0x20000000,.lo = 0x080fffe0}}, // 0x80000-0x9FFFF

Modified: trunk/src/cpu/amd/mtrr/amd_mtrr.c
==============================================================================
--- trunk/src/cpu/amd/mtrr/amd_mtrr.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/mtrr/amd_mtrr.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
 #include <cpu/x86/cache.h>
 #include <cpu/x86/msr.h>
 
-static unsigned long resk(uint64_t value) 
+static unsigned long resk(uint64_t value)
 {
 	unsigned long resultk;
 	if (value < (1ULL << 42)) {
@@ -98,7 +98,7 @@
 	printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: WB, RdMEM, WrMEM\n",
 		start_mtrr, last_mtrr);
 	set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK | MTRR_READ_MEM | MTRR_WRITE_MEM);
-	
+
 }
 
 void amd_setup_mtrrs(void)
@@ -118,7 +118,7 @@
 
 	printk(BIOS_DEBUG, "\n");
 	/* Initialized the fixed_mtrrs to uncached */
-	printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) type: UC\n", 
+	printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) type: UC\n",
 		0, NUM_FIXED_RANGES);
 	set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE);
 
@@ -162,7 +162,7 @@
 		wrmsr(i, msr);
 	}
 
-	/* Enable Variable Mtrrs 
+	/* Enable Variable Mtrrs
 	 * Enable the RdMem and WrMem bits in the fixed mtrrs.
 	 * Disable access to the RdMem and WrMem in the fixed mtrr.
 	 */

Modified: trunk/src/cpu/amd/sc520/raminit.c
==============================================================================
--- trunk/src/cpu/amd/sc520/raminit.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/sc520/raminit.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -65,13 +65,13 @@
 
 	/* do this to see if MMCR will start acting right. we suspect
 	 * you have to do SOMETHING to get things going. I'm really
-	 * starting to hate this processor. 
+	 * starting to hate this processor.
 	 */
-	
-	/* no, that did not help. I wonder what will?  
+
+	/* no, that did not help. I wonder what will?
 	 * outl(0x800df0cb, 0xfffc);
 	 */
-	
+
 	/* well, this is special! You have to do SHORT writes to the
 	 * locations, even though they are CHAR in size and CHAR aligned
 	 * and technically, a SHORT write will result in -- yoo ha! --
@@ -80,7 +80,7 @@
 	 * it now reliably comes up after power cycle with printk. Ah yi
 	 * yi.
    	 */
-	
+
 	/* turn off the write buffer*/
 	/* per the note above, make this a short? Let's try it. */
 	sp = (unsigned short *)0xfffef040;
@@ -92,7 +92,7 @@
 	/*    moved to romstage.c by Stepan, Ron says: */
 	/* NOTE: move this to mainboard.c ASAP */
 	setup_pars();
-  
+
 	/* CPCSF register */
 	sp =  (unsigned short *)0xfffefc24;
 	*sp = 0xfe;
@@ -120,7 +120,7 @@
 	/*set the GP RD offset */
 	sp =  (unsigned short *)0xfffefc0c;
 	*sp = 0x00001;
-	/*set the GP WR pulse width*/ 
+	/*set the GP WR pulse width*/
 	sp =  (unsigned short *)0xfffefc0d;
 	*sp = 0x00003;
 	/*set the GP WR offset*/
@@ -164,19 +164,19 @@
 /*; set the interrupt mapping registers.*/
 	cp = (unsigned char *)0x0fffefd20;
 	*cp = 0x01;
-	
+
 	cp = (unsigned char *)0x0fffefd28;
 	*cp = 0x0c;
-	
+
 	cp = (unsigned char *)0x0fffefd29;
 	*cp = 0x0b;
-	
+
 	cp = (unsigned char *)0x0fffefd30;
 	*cp = 0x07;
-	
+
 	cp = (unsigned char *)0x0fffefd43;
 	*cp = 0x03;
-	
+
 	cp = (unsigned char *)0x0fffefd51;
 	*cp = 0x02;
 #endif
@@ -186,8 +186,8 @@
 	outl(0x08000683c, 0xcf8);
 	outl(0xc, 0xcfc); /* set the interrupt line */
 
-	
-	/* Set the SC520 PCI host bridge to target mode to 
+
+	/* Set the SC520 PCI host bridge to target mode to
 	 * allow external bus mastering events
 	 */
 	/* index the status command register on device 0*/
@@ -195,7 +195,7 @@
 	outl(0x2, 0xcfc);		/*set the memory access enable bit*/
 	OUTC(0x0fffef072, 1);		/* enable req bits in SYSARBMENB */
 }
-	
+
 
 /*
  *
@@ -228,7 +228,7 @@
 #define ROW11_DATA 0x07070707	/*  11 row data/also bank switch (MASK)*/
 #define ROW10_DATA 0xaaaaaaaa	/*  10 row data/also bank switch (MASK)*/
 
-void 
+void
 dummy_write(void){
   volatile unsigned short *ptr = (volatile unsigned short *)CACHELINESZ;
   *ptr = 0;
@@ -247,16 +247,16 @@
   print_err("bendadr3"); print_err_hex8(*drcbendadr); print_err("\n");
 }
 
-/* there is a lot of silliness in the amd code, and it is 
- * causing romcc real headaches, so we're going to be be a little 
+/* there is a lot of silliness in the amd code, and it is
+ * causing romcc real headaches, so we're going to be be a little
  * less silly.
- * so, the order of ops is: 
+ * so, the order of ops is:
  * for i in 3 to 0
- * see if bank is there. 
+ * see if bank is there.
  * if we can write a word, and read it back, to hell with paranoia
- * the bank is there. So write the magic byte, read it back, and 
- * use that to get size, etc. Try to keep things very simple, 
- * so people can actually follow the damned code. 
+ * the bank is there. So write the magic byte, read it back, and
+ * use that to get size, etc. Try to keep things very simple,
+ * so people can actually follow the damned code.
  */
 
 /* cache is assumed to be disabled */
@@ -273,14 +273,14 @@
 	/* no ecc interrupts of any kind. */
 	*eccctl = 0;
 	/* Set SDRAM timing for slowest speed. */
-	*drcmctl = 0x1e; 
+	*drcmctl = 0x1e;
 
 	/* setup dram register for all banks
 	 * with max cols and max banks
 	 * this is the oldest trick in the book. You are going to set up for max rows
-	 * and cols, then do a write, then see if the data is wrapped to low memory. 
-	 * you can actually tell by which data gets to which low memory, 
-	 * exactly how many rows and cols you have. 
+	 * and cols, then do a write, then see if the data is wrapped to low memory.
+	 * you can actually tell by which data gets to which low memory,
+	 * exactly how many rows and cols you have.
 	 */
 	*drccfg=0xbbbb;
 
@@ -339,24 +339,24 @@
 	  *lp = 0xdeadbeef;
 	  print_err("assigned l ... \n");
 	  if (*lp != 0xdeadbeef) {
-	    print_err(" no memory at bank "); 
-	    // print_err_hex8(bank); 
+	    print_err(" no memory at bank ");
+	    // print_err_hex8(bank);
 	    //   print_err(" value "); print_err_hex32(*lp);
-	    print_err("\n"); 
+	    print_err("\n");
 	    //	    continue;
 	  }
 	  *drcctl = 2;
 	  dummy_write();
 	  *drccfg = *drccfg >> 4;
 	  l = *drcbendadr;
-	  l >>= 8; 
+	  l >>= 8;
 	  *drcbendadr = l;
 	  print_err("loop around\n");
 	  *drcctl = 0;
 	  dummy_write();
 	}
 #if 0
-	/* enable last bank and setup ending address 
+	/* enable last bank and setup ending address
 	 * register for max ram in last bank
 	 */
 	*drcbendadr=0x0ff000000;
@@ -410,10 +410,10 @@
 	bank = 3;
 
 
-	/* this is really ugly, it is right from assembly code. 
+	/* this is really ugly, it is right from assembly code.
 	 * we need to clean it up later
 	 */
-	
+
 start:
 	/* write col 11 wrap adr */
 	COL11_ADR=COL11_DATA;
@@ -519,7 +519,7 @@
 	print_err("cols"); print_err_hex32(cols); print_err("\n");
 	cols -= COL08_DATA;
 
-	/* cols now is in the range of 0 1 2 3 ... 
+	/* cols now is in the range of 0 1 2 3 ...
 	 */
 	i = cols&3;
 	//	i = cols + rows;
@@ -533,22 +533,22 @@
 	/* what a fookin' mess this is */
 	if(banks==4)
 		i+=8; /* <-- i holds merged value */
-	/* i now has the col width in bits 0-1 and the bank count (2 or 4) 
+	/* i now has the col width in bits 0-1 and the bank count (2 or 4)
 	 * in bit 3.
-	 * this is the format for the drccfg register 
+	 * this is the format for the drccfg register
 	 */
-	
+
 	/* fix ending addr mask*/
 	/*FIXME*/
 	/* let's just go with this to start ... see if we can get ANYWHERE */
 	/* need to get end addr. Need to do it with the bank in mind. */
 /*
-	al = 3; 
+	al = 3;
 	al -= i&3;
 	*drcbendaddr = rows >> al;
-	print_err("computed ending_adr = "); print_err_hex8(ending_adr); 
+	print_err("computed ending_adr = "); print_err_hex8(ending_adr);
 	print_err("\n");
-	
+
 */
 bad_reinit:
 	/* issue all banks recharge */
@@ -557,7 +557,7 @@
 
 	/* update ending address register */
 //	*drcbendadr = ending_adr;
-	
+
 	/* update config register */
 	*drccfg &= ~(0xff << bank*4);
 	if (ending_adr)
@@ -579,11 +579,11 @@
 	*drcctl=0x18;
 	dummy_write();
 	return bank;
-	
+
 bad_ram:
 	print_info("bad ram!\n");
-	/* you are here because the read-after-write failed, 
-	 * in most cases because: no ram in that bank! 
+	/* you are here because the read-after-write failed,
+	 * in most cases because: no ram in that bank!
 	 * set badbank to 1 and go to reinit
 	 */
 	ending_adr = 0;
@@ -591,7 +591,7 @@
 	while(1)
 	print_err("DONE NEXTBANK\n");
 #endif
-}	
+}
 
 /* note: based on AMD code*/
 /* This code is known to work on the digital logic board and on the technologic
@@ -600,7 +600,7 @@
 int staticmem(void)
 {
 	volatile unsigned long *zero = (unsigned long *) CACHELINESZ;
-	
+
 	/* set up 0x18 .. **/
 	*drcbendadr = 0x88;
 	*drcmctl = 0x1e;
@@ -609,7 +609,7 @@
 	*drcctl = 0x1;
 	/* do the dummy write */
 	*zero = 0;
-	
+
 	/* precharge */
 	*drcctl = 2;
 	*zero = 0;
@@ -625,7 +625,7 @@
 	*drcctl = 3;
 	*zero = 0;
 	print_debug("DONE the load mode reg\n");
-	
+
 	/* normal mode */
 	*drcctl = 0x0;
 	*zero = 0;
@@ -634,7 +634,7 @@
 	*zero = 0;
 	print_debug("DONE the normal\n");
 	*zero = 0xdeadbeef;
-	if (*zero != 0xdeadbeef) 
+	if (*zero != 0xdeadbeef)
 	  print_debug("NO LUCK\n");
 	else
 	  print_debug("did a store and load ...\n");

Modified: trunk/src/cpu/amd/sc520/sc520.c
==============================================================================
--- trunk/src/cpu/amd/sc520/sc520.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/amd/sc520/sc520.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -16,10 +16,10 @@
 #include "chip.h"
 
 /*
- * set up basic things ... 
- * PAR should NOT go here, as it might change with the mainboard. 
+ * set up basic things ...
+ * PAR should NOT go here, as it might change with the mainboard.
  */
-static void cpu_init(device_t dev) 
+static void cpu_init(device_t dev)
 {
   unsigned long *l = (unsigned long *) 0xfffef088;
   int i;
@@ -30,9 +30,9 @@
 }
 
 
-/* Ollie says: make a northbridge/amd/sc520. Ron sez: 
- * there is no real northbridge, keep it here in cpu. 
- * Ron wins, he's writing the code. 
+/* Ollie says: make a northbridge/amd/sc520. Ron sez:
+ * there is no real northbridge, keep it here in cpu.
+ * Ron wins, he's writing the code.
  */
 static void sc520_enable_resources(struct device *dev) {
 	unsigned char command;
@@ -141,16 +141,16 @@
 		for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) {
 			unsigned char reg;
 			reg = pci_read_config8(mc_dev, ramregs[i]);
-			/* these are ENDING addresses, not sizes. 
+			/* these are ENDING addresses, not sizes.
 			 * if there is memory in this slot, then reg will be > rambits.
-			 * So we just take the max, that gives us total. 
+			 * So we just take the max, that gives us total.
 			 * We take the highest one to cover for once and future coreboot
 			 * bugs. We warn about bugs.
 			 */
 			if (reg > rambits)
 				rambits = reg;
 			if (reg < rambits)
-				printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n", 
+				printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n",
 					ramregs[i]);
 		}
 		printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024);
@@ -245,5 +245,5 @@
 
 struct chip_operations cpu_amd_sc520_ops = {
 	CHIP_NAME("AMD Elan SC520 CPU")
-	.enable_dev = enable_dev, 
+	.enable_dev = enable_dev,
 };

Modified: trunk/src/cpu/intel/Makefile.inc
==============================================================================
--- trunk/src/cpu/intel/Makefile.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/Makefile.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 # Note: From here on down, we are socket-centric. Socket choice determines
-# what other cpu files are included. 
+# what other cpu files are included.
 #
 # Therefore: ONLY include Makefile.inc from socket directories!
 

Modified: trunk/src/cpu/intel/car/cache_as_ram.inc
==============================================================================
--- trunk/src/cpu/intel/car/cache_as_ram.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/car/cache_as_ram.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -305,11 +305,11 @@
 	pushl	%eax  /* bist */
 	call	main
 
-	/* 
+	/*
 	FIXME : backup stack in CACHE_AS_RAM into mmx and sse and after we get STACK up, we restore that.
 		It is only needed if we want to go back
 	*/
-	
+
         /* We don't need cache as ram for now on */
         /* disable cache */
 	movl    %cr0, %eax
@@ -396,7 +396,7 @@
 __main:
 	post_code(0x11)
 	cld			/* clear direction flag */
-	
+
 	movl	%ebp, %esi
 
 	movl $ROMSTAGE_STACK, %esp
@@ -404,7 +404,7 @@
 	pushl %esi
 	call copy_and_run
 
-.Lhlt:	
+.Lhlt:
 	post_code(0xee)
 	hlt
 	jmp	.Lhlt

Modified: trunk/src/cpu/intel/hyperthreading/intel_sibling.c
==============================================================================
--- trunk/src/cpu/intel/hyperthreading/intel_sibling.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/hyperthreading/intel_sibling.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -43,7 +43,7 @@
 		}
 		return;
 	}
-	
+
 	/* I am the primary cpu start up my siblings */
 	for(i = 1; i < siblings; i++) {
 		struct device_path cpu_path;
@@ -61,7 +61,7 @@
 		}
 
 #if 1
-		printk(BIOS_DEBUG, "CPU: %u has sibling %u\n", 
+		printk(BIOS_DEBUG, "CPU: %u has sibling %u\n",
 			cpu->path.apic.apic_id,
 			new->path.apic.apic_id);
 #endif
@@ -72,6 +72,6 @@
 				new->path.apic.apic_id);
 		}
 	}
-	
+
 }
 

Modified: trunk/src/cpu/intel/microcode/microcode.c
==============================================================================
--- trunk/src/cpu/intel/microcode/microcode.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/microcode/microcode.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -59,7 +59,7 @@
 	const struct microcode *m;
 	const char *c;
 	msr_t msr;
-	
+
 	/* cpuid sets msr 0x8B iff a microcode update has been loaded. */
 	msr.lo = 0;
 	msr.hi = 0;

Modified: trunk/src/cpu/intel/model_1067x/model_1067x_init.c
==============================================================================
--- trunk/src/cpu/intel/model_1067x/model_1067x_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_1067x/model_1067x_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
@@ -40,7 +40,7 @@
         0x0, 0x0, 0x0, 0x0,
 };
 
-static inline void strcpy(char *dst, char *src) 
+static inline void strcpy(char *dst, char *src)
 {
 	while (*src) *dst++ = *src++;
 }
@@ -77,7 +77,7 @@
 
 	/* Skip leading spaces */
 	processor_name_start = temp_processor_name;
-	while (*processor_name_start == ' ') 
+	while (*processor_name_start == ' ')
 		processor_name_start++;
 
 	memset(processor_name, 0, 49);
@@ -197,7 +197,7 @@
 #if CONFIG_USBDEBUG_DIRECT
 static unsigned ehci_debug_addr;
 #endif
-		
+
 static void model_1067x_init(device_t cpu)
 {
 	char processor_name[49];
@@ -214,7 +214,7 @@
 
 #if CONFIG_USBDEBUG_DIRECT
 	// Is this caution really needed?
-	if(!ehci_debug_addr) 
+	if(!ehci_debug_addr)
 		ehci_debug_addr = get_ehci_debug();
 	set_ehci_debug(0);
 #endif

Modified: trunk/src/cpu/intel/model_106cx/cache_as_ram.inc
==============================================================================
--- trunk/src/cpu/intel/model_106cx/cache_as_ram.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_106cx/cache_as_ram.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,18 +1,18 @@
-/* 
+/*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich at gmail.com>
  * Copyright (C) 2007-2008 coresystems GmbH
- * 
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
- * 
+ *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
@@ -206,7 +206,7 @@
 	xorl	%eax, %eax
 	movl	$((1024*1024) / 4), %ecx
 	rep stosl
-	
+
 	post_code(0x37)
 #endif
 
@@ -254,7 +254,7 @@
 __main:
 	post_code(0x11)
 	cld			/* clear direction flag */
-	
+
 	movl	%ebp, %esi
 
 	movl $ROMSTAGE_STACK, %esp
@@ -262,7 +262,7 @@
 	pushl %esi
 	call copy_and_run
 
-.Lhlt:	
+.Lhlt:
 	post_code(0xee)
 	hlt
 	jmp	.Lhlt

Modified: trunk/src/cpu/intel/model_106cx/model_106cx_init.c
==============================================================================
--- trunk/src/cpu/intel/model_106cx/model_106cx_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_106cx/model_106cx_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
@@ -39,7 +39,7 @@
         0x0, 0x0, 0x0, 0x0,
 };
 
-static inline void strcpy(char *dst, char *src) 
+static inline void strcpy(char *dst, char *src)
 {
 	while (*src) *dst++ = *src++;
 }
@@ -64,7 +64,7 @@
 
 	/* Skip leading spaces */
 	processor_name_start = temp_processor_name;
-	while (*processor_name_start == ' ') 
+	while (*processor_name_start == ' ')
 		processor_name_start++;
 
 	memset(processor_name, 0, 49);
@@ -175,7 +175,7 @@
 
 #if CONFIG_USBDEBUG_DIRECT
 	// Is this caution really needed?
-	if(!ehci_debug_addr) 
+	if(!ehci_debug_addr)
 		ehci_debug_addr = get_ehci_debug();
 	set_ehci_debug(0);
 #endif

Modified: trunk/src/cpu/intel/model_69x/model_69x_init.c
==============================================================================
--- trunk/src/cpu/intel/model_69x/model_69x_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_69x/model_69x_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -26,7 +26,7 @@
 	x86_enable_cache();
 	x86_setup_mtrrs(36);
 	x86_mtrr_check();
-	
+
 	/* Update the microcode */
 	intel_update_microcode(microcode_updates);
 

Modified: trunk/src/cpu/intel/model_6bx/model_6bx_init.c
==============================================================================
--- trunk/src/cpu/intel/model_6bx/model_6bx_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_6bx/model_6bx_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  * Copyright (C) 2010 Joseph Smith <joe at settoplinux.org>
  *
@@ -44,7 +44,7 @@
         0x0, 0x0, 0x0, 0x0,
 };
 
-static inline void strcpy(char *dst, char *src) 
+static inline void strcpy(char *dst, char *src)
 {
 	while (*src) *dst++ = *src++;
 }
@@ -69,7 +69,7 @@
 
 	/* Skip leading spaces */
 	processor_name_start = temp_processor_name;
-	while (*processor_name_start == ' ') 
+	while (*processor_name_start == ' ')
 		processor_name_start++;
 
 	memset(processor_name, 0, 49);
@@ -96,7 +96,7 @@
 
 #if CONFIG_USBDEBUG_DIRECT
 	// Is this caution really needed?
-	if(!ehci_debug_addr) 
+	if(!ehci_debug_addr)
 		ehci_debug_addr = get_ehci_debug();
 	set_ehci_debug(0);
 #endif

Modified: trunk/src/cpu/intel/model_6dx/model_6dx_init.c
==============================================================================
--- trunk/src/cpu/intel/model_6dx/model_6dx_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_6dx/model_6dx_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -26,7 +26,7 @@
 	x86_enable_cache();
 	x86_setup_mtrrs(36);
 	x86_mtrr_check();
-	
+
 	/* Update the microcode */
 	intel_update_microcode(microcode_updates);
 

Modified: trunk/src/cpu/intel/model_6ex/cache_as_ram.inc
==============================================================================
--- trunk/src/cpu/intel/model_6ex/cache_as_ram.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_6ex/cache_as_ram.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,18 +1,18 @@
-/* 
+/*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich at gmail.com>
  * Copyright (C) 2007-2008 coresystems GmbH
- * 
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
- * 
+ *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
@@ -206,7 +206,7 @@
 	xorl	%eax, %eax
 	movl	$((1024*1024) / 4), %ecx
 	rep stosl
-	
+
 	post_code(0x37)
 #endif
 
@@ -254,7 +254,7 @@
 __main:
 	post_code(0x11)
 	cld			/* clear direction flag */
-	
+
 	movl	%ebp, %esi
 
 	movl $ROMSTAGE_STACK, %esp
@@ -262,7 +262,7 @@
 	pushl %esi
 	call copy_and_run
 
-.Lhlt:	
+.Lhlt:
 	post_code(0xee)
 	hlt
 	jmp	.Lhlt

Modified: trunk/src/cpu/intel/model_6ex/model_6ex_init.c
==============================================================================
--- trunk/src/cpu/intel/model_6ex/model_6ex_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_6ex/model_6ex_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
@@ -44,7 +44,7 @@
         0x0, 0x0, 0x0, 0x0,
 };
 
-static inline void strcpy(char *dst, char *src) 
+static inline void strcpy(char *dst, char *src)
 {
 	while (*src) *dst++ = *src++;
 }
@@ -69,7 +69,7 @@
 
 	/* Skip leading spaces */
 	processor_name_start = temp_processor_name;
-	while (*processor_name_start == ' ') 
+	while (*processor_name_start == ' ')
 		processor_name_start++;
 
 	memset(processor_name, 0, 49);
@@ -204,7 +204,7 @@
 
 #if CONFIG_USBDEBUG_DIRECT
 	// Is this caution really needed?
-	if(!ehci_debug_addr) 
+	if(!ehci_debug_addr)
 		ehci_debug_addr = get_ehci_debug();
 	set_ehci_debug(0);
 #endif

Modified: trunk/src/cpu/intel/model_6fx/cache_as_ram.inc
==============================================================================
--- trunk/src/cpu/intel/model_6fx/cache_as_ram.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_6fx/cache_as_ram.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,18 +1,18 @@
-/* 
+/*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich at gmail.com>
  * Copyright (C) 2007-2008 coresystems GmbH
- * 
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; version 2 of the License.
- * 
+ *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- * 
+ *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
@@ -213,7 +213,7 @@
 	xorl	%eax, %eax
 	movl	$((1024*1024) / 4), %ecx
 	rep stosl
-	
+
 	post_code(0x37)
 #endif
 
@@ -268,7 +268,7 @@
 __main:
 	post_code(0x11)
 	cld			/* clear direction flag */
-	
+
 	movl	%ebp, %esi
 
 	movl $ROMSTAGE_STACK, %esp
@@ -276,7 +276,7 @@
 	pushl %esi
 	call copy_and_run
 
-.Lhlt:	
+.Lhlt:
 	post_code(0xee)
 	hlt
 	jmp	.Lhlt

Modified: trunk/src/cpu/intel/model_6fx/model_6fx_init.c
==============================================================================
--- trunk/src/cpu/intel/model_6fx/model_6fx_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_6fx/model_6fx_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
@@ -58,7 +58,7 @@
         0x0, 0x0, 0x0, 0x0,
 };
 
-static inline void strcpy(char *dst, char *src) 
+static inline void strcpy(char *dst, char *src)
 {
 	while (*src) *dst++ = *src++;
 }
@@ -83,7 +83,7 @@
 
 	/* Skip leading spaces */
 	processor_name_start = temp_processor_name;
-	while (*processor_name_start == ' ') 
+	while (*processor_name_start == ' ')
 		processor_name_start++;
 
 	memset(processor_name, 0, 49);
@@ -214,7 +214,7 @@
 #if CONFIG_USBDEBUG_DIRECT
 static unsigned ehci_debug_addr;
 #endif
-		
+
 static void model_6fx_init(device_t cpu)
 {
 	char processor_name[49];
@@ -231,7 +231,7 @@
 
 #if CONFIG_USBDEBUG_DIRECT
 	// Is this caution really needed?
-	if(!ehci_debug_addr) 
+	if(!ehci_debug_addr)
 		ehci_debug_addr = get_ehci_debug();
 	set_ehci_debug(0);
 #endif

Modified: trunk/src/cpu/intel/model_6xx/microcode_MU16810d.h
==============================================================================
--- trunk/src/cpu/intel/model_6xx/microcode_MU16810d.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_6xx/microcode_MU16810d.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,12 +1,12 @@
 	/*
-	  Copyright  Intel Corporation, 1995, 96, 97, 98, 99, 2000. 
+	  Copyright  Intel Corporation, 1995, 96, 97, 98, 99, 2000.
 
-	  These microcode updates are distributed for the sole purpose of 
+	  These microcode updates are distributed for the sole purpose of
 	  installation in the BIOS or Operating System of computer systems
 	  which include an Intel P6 family microprocessor sold or distributed
 	  to or by you.  You are authorized to copy and install this material
 	  on such systems.  You are not authorized to use this material for
-	  any other purpose.  
+	  any other purpose.
 	*/
 
 /*  MU16810d.inc  */

Modified: trunk/src/cpu/intel/model_6xx/microcode_MU16830c.h
==============================================================================
--- trunk/src/cpu/intel/model_6xx/microcode_MU16830c.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_6xx/microcode_MU16830c.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,12 +1,12 @@
 	/*
-	  Copyright  Intel Corporation, 1995, 96, 97, 98, 99, 2000. 
+	  Copyright  Intel Corporation, 1995, 96, 97, 98, 99, 2000.
 
-	  These microcode updates are distributed for the sole purpose of 
+	  These microcode updates are distributed for the sole purpose of
 	  installation in the BIOS or Operating System of computer systems
 	  which include an Intel P6 family microprocessor sold or distributed
 	  to or by you.  You are authorized to copy and install this material
 	  on such systems.  You are not authorized to use this material for
-	  any other purpose.  
+	  any other purpose.
 	*/
 
 /*  MU16830c.inc  */

Modified: trunk/src/cpu/intel/model_6xx/model_6xx_init.c
==============================================================================
--- trunk/src/cpu/intel/model_6xx/model_6xx_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_6xx/model_6xx_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -16,7 +16,7 @@
 	 * microcode update lengths.  They are encoded in int 8 and 9.  A
 	 * dummy header of nulls must terminate the list.
 	 */
-#include "microcode_MU16810d.h"	
+#include "microcode_MU16810d.h"
 #include "microcode_MU16830c.h"
 	/*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
@@ -32,7 +32,7 @@
 	x86_enable_cache();
 	x86_setup_mtrrs(36);
 	x86_mtrr_check();
-	
+
 	/* Update the microcode */
 	intel_update_microcode(microcode_updates);
 

Modified: trunk/src/cpu/intel/model_f0x/model_f0x_init.c
==============================================================================
--- trunk/src/cpu/intel/model_f0x/model_f0x_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_f0x/model_f0x_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,7 +17,7 @@
 	 * microcode update lengths.  They are encoded in int 8 and 9.  A
 	 * dummy header of nulls must terminate the list.
 	 */
-	
+
 	/*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
         0x0, 0x0, 0x0, 0x0,
@@ -32,7 +32,7 @@
 	x86_enable_cache();
 	x86_setup_mtrrs(36);
 	x86_mtrr_check();
-	
+
 	/* Update the microcode */
 	intel_update_microcode(microcode_updates);
 

Modified: trunk/src/cpu/intel/model_f0x/multiplier.h
==============================================================================
--- trunk/src/cpu/intel/model_f0x/multiplier.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_f0x/multiplier.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 
-/* 
+/*
  ** NMI A20M IGNNE INTR
  * X8  H H H H
  * X9  H H H L projected
@@ -8,7 +8,7 @@
  * X12 H L H H
  * X13 H L H L
  * X14 H L L H
- * X15 H L L L 
+ * X15 H L L L
  * X16 L H H H
  * X17 L H H L
  * X18 L H L H
@@ -18,7 +18,7 @@
  * X22 L L L H  projected
  * X23 L L L L  projected
  *
- ** NMI INTR IGNNE A20M 
+ ** NMI INTR IGNNE A20M
  * X8  H H H H
  * X9  H L H H projected
  * X10 H H L H
@@ -26,7 +26,7 @@
  * X12 H H H L
  * X13 H L H L
  * X14 H H L L
- * X15 H L L L 
+ * X15 H L L L
  * X16 L H H H
  * X17 L L H H
  * X18 L H L H

Modified: trunk/src/cpu/intel/model_f1x/model_f1x_init.c
==============================================================================
--- trunk/src/cpu/intel/model_f1x/model_f1x_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_f1x/model_f1x_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,7 +17,7 @@
 	 * microcode update lengths.  They are encoded in int 8 and 9.  A
 	 * dummy header of nulls must terminate the list.
 	 */
-	
+
 	/*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
         0x0, 0x0, 0x0, 0x0,
@@ -32,7 +32,7 @@
 	x86_enable_cache();
 	x86_setup_mtrrs(36);
 	x86_mtrr_check();
-	
+
 	/* Update the microcode */
 	intel_update_microcode(microcode_updates);
 

Modified: trunk/src/cpu/intel/model_f1x/multiplier.h
==============================================================================
--- trunk/src/cpu/intel/model_f1x/multiplier.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_f1x/multiplier.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 
-/* 
+/*
  ** NMI A20M IGNNE INTR
  * X8  H H H H
  * X9  H H H L projected
@@ -8,7 +8,7 @@
  * X12 H L H H
  * X13 H L H L
  * X14 H L L H
- * X15 H L L L 
+ * X15 H L L L
  * X16 L H H H
  * X17 L H H L
  * X18 L H L H
@@ -18,7 +18,7 @@
  * X22 L L L H  projected
  * X23 L L L L  projected
  *
- ** NMI INTR IGNNE A20M 
+ ** NMI INTR IGNNE A20M
  * X8  H H H H
  * X9  H L H H projected
  * X10 H H L H
@@ -26,7 +26,7 @@
  * X12 H H H L
  * X13 H L H L
  * X14 H H L L
- * X15 H L L L 
+ * X15 H L L L
  * X16 L H H H
  * X17 L L H H
  * X18 L H L H

Modified: trunk/src/cpu/intel/model_f2x/model_f2x_init.c
==============================================================================
--- trunk/src/cpu/intel/model_f2x/model_f2x_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_f2x/model_f2x_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -37,7 +37,7 @@
 	x86_enable_cache();
 	x86_setup_mtrrs(36);
 	x86_mtrr_check();
-	
+
 	/* Update the microcode */
 	intel_update_microcode(microcode_updates);
 

Modified: trunk/src/cpu/intel/model_f3x/microcode_M1DF340E.h
==============================================================================
--- trunk/src/cpu/intel/model_f3x/microcode_M1DF340E.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_f3x/microcode_M1DF340E.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -9,7 +9,7 @@
         */
 
 	/*  M1DF340E.TXT - Noconoa D-0  */
-	
+
 
 	0x00000001, /* Header Version	*/
 	0x0000000e, /* Patch ID		*/

Modified: trunk/src/cpu/intel/model_f3x/microcode_M1DF3413.h
==============================================================================
--- trunk/src/cpu/intel/model_f3x/microcode_M1DF3413.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_f3x/microcode_M1DF3413.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,7 +2,7 @@
  * microcode update lengths.  They are encoded in int 8 and 9.  A
  * dummy header of nulls must terminate the list.
  */
-                                                                                
+
         /*
            Copyright  Intel Corporation, 1995, 96, 97, 98, 99, 2000.
            These microcode updates are distributed for the sole purpose of
@@ -12,9 +12,9 @@
            on such systems.  You are not authorized to use this material for
            any other purpose.
         */
-                                                                                
+
         /*  M1DF3413.TXT - Noconoa D-0  */
-                                                                                
+
         0x00000001, /* Header Version   */
         0x00000013, /* Patch ID         */
         0x07302004, /* DATE             */
@@ -27,7 +27,7 @@
         0x00000000, /* reserved         */
         0x00000000, /* reserved         */
         0x00000000, /* reserved         */
- 
+
 	0x9fbf327a,
 	0x2b41b451,
 	0xb2abaca8,

Modified: trunk/src/cpu/intel/model_f3x/model_f3x_init.c
==============================================================================
--- trunk/src/cpu/intel/model_f3x/model_f3x_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_f3x/model_f3x_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,7 +17,7 @@
 	 * microcode update lengths.  They are encoded in int 8 and 9.  A
 	 * dummy header of nulls must terminate the list.
 	 */
-	
+
 #include "microcode_M1DF3413.h"
 	/*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
@@ -33,7 +33,7 @@
 	x86_enable_cache();
 	x86_setup_mtrrs(36);
 	x86_mtrr_check();
-	
+
 	/* Update the microcode */
 	intel_update_microcode(microcode_updates);
 

Modified: trunk/src/cpu/intel/model_f4x/model_f4x_init.c
==============================================================================
--- trunk/src/cpu/intel/model_f4x/model_f4x_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/model_f4x/model_f4x_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,7 +17,7 @@
 	 * microcode update lengths.  They are encoded in int 8 and 9.  A
 	 * dummy header of nulls must terminate the list.
 	 */
-	
+
 #include "microcode_MBDF410D.h"
 	/*  Dummy terminator  */
         0x0, 0x0, 0x0, 0x0,
@@ -33,7 +33,7 @@
 	x86_enable_cache();
 	x86_setup_mtrrs(36);
 	x86_mtrr_check();
-	
+
 	/* Update the microcode */
 	intel_update_microcode(microcode_updates);
 

Modified: trunk/src/cpu/intel/socket_mPGA604/Kconfig
==============================================================================
--- trunk/src/cpu/intel/socket_mPGA604/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/socket_mPGA604/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -8,7 +8,7 @@
 	select UDELAY_TSC
 
 # mPGA604 are usually Intel Netburst CPUs which should have SSE2
-# but the ramtest.c code on the Dell S1850 seems to choke on 
+# but the ramtest.c code on the Dell S1850 seems to choke on
 # enabling it, so disable it for now.
 config SSE2
 	bool

Modified: trunk/src/cpu/intel/speedstep/acpi.c
==============================================================================
--- trunk/src/cpu/intel/speedstep/acpi.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/intel/speedstep/acpi.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

Modified: trunk/src/cpu/via/car/cache_as_ram.inc
==============================================================================
--- trunk/src/cpu/via/car/cache_as_ram.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/via/car/cache_as_ram.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -179,12 +179,12 @@
 	pushl	%eax  /* bist */
 	call	main
 
-	/* 
+	/*
 	 * TODO: Backup stack in CACHE_AS_RAM into MMX and SSE and after we
 	 *       get STACK up, we restore that. It is only needed if we
 	 *       want to go back.
 	 */
-	
+
 	/* We don't need cache as ram for now on */
 	/* disable cache */
 	movl    %cr0, %eax
@@ -207,7 +207,7 @@
 	movl     $(0 | 6), %eax
 	//movl     $(0 | MTRR_TYPE_WRBACK), %eax
 	wrmsr
- 
+
 	/* enable cache for 0-7ffff, 80000-9ffff, e0000-fffff;
 	 * If 1M cacheable, then when S3 resume, there is stange color on
 	 * screen for 2 sec. suppose problem of a0000-dfffff and cache.
@@ -218,7 +218,7 @@
 	movl    $0x0000000f, %edx /* AMD 40 bit 0xff*/
  	movl    $((~(( 0 + 0x80000) - 1)) | 0x800), %eax
 	wrmsr
-	
+
 	movl    $0x202, %ecx
 	xorl    %edx, %edx
 	movl     $(0x80000 | 6), %eax
@@ -229,7 +229,7 @@
 	movl    $0x0000000f, %edx /* AMD 40 bit 0xff*/
  	movl    $((~(( 0 + 0x20000) - 1)) | 0x800), %eax
 	wrmsr
-	
+
 	movl    $0x204, %ecx
 	xorl    %edx, %edx
 	movl     $(0xc0000 | 6), %eax
@@ -239,8 +239,8 @@
 	movl    $0x205, %ecx
 	movl    $0x0000000f, %edx /* AMD 40 bit 0xff*/
 	movl    $((~(( 0 + 0x40000) - 1)) | 0x800), %eax
-	wrmsr        
-	
+	wrmsr
+
 	/* cache XIP_ROM_BASE-SIZE to speedup coreboot code */
 	movl    $0x206, %ecx
 	xorl    %edx, %edx
@@ -267,7 +267,7 @@
 __main:
 	post_code(0x11)
 	cld			/* clear direction flag */
-	
+
 	movl	%ebp, %esi
 
 	movl $ROMSTAGE_STACK, %esp
@@ -275,7 +275,7 @@
 	pushl %esi
 	call copy_and_run
 
-.Lhlt:	
+.Lhlt:
 	post_code(0xee)
 	hlt
 	jmp	.Lhlt

Modified: trunk/src/cpu/via/model_c3/model_c3_init.c
==============================================================================
--- trunk/src/cpu/via/model_c3/model_c3_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/via/model_c3/model_c3_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

Modified: trunk/src/cpu/via/model_c7/model_c7_init.c
==============================================================================
--- trunk/src/cpu/via/model_c7/model_c7_init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/via/model_c7/model_c7_init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
@@ -36,7 +36,7 @@
 #define MSR_IA32_MISC_ENABLE	0x000001a0
 
 static int c7a_speed_translation[] = {
-//      LFM     HFM             
+//      LFM     HFM
 	0x0409, 0x0f13,		// 400MHz, 844mV --> 1500MHz, 1.004V    C7-M
 	0x0409, 0x1018,		// 400MHz, 844mV --> 1600MHz, 1.084V
 	0x0409, 0x0c18,		// 533MHz, 844mV --> 1600MHz, 1.084V
@@ -51,7 +51,7 @@
 };
 
 static int c7d_speed_translation[] = {
-//      LFM     HFM             
+//      LFM     HFM
 	0x0409, 0x1018,		// 400MHz, 844mV --> 1600MHz, 1.084V    C7-M
 	0x0409, 0x121f,		// 400MHz, 844mV --> 1800MHz, 1.196V
 	0x0809, 0x121f,		// 800MHz, 844mV --> 1800MHz, 1.196V

Modified: trunk/src/cpu/x86/16bit/entry16.inc
==============================================================================
--- trunk/src/cpu/x86/16bit/entry16.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/16bit/entry16.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,8 +21,8 @@
  */
 
 
-/** Start code to put an i386 or later processor into 32-bit 
- * protected mode. 
+/** Start code to put an i386 or later processor into 32-bit
+ * protected mode.
  */
 
 /* .section ".rom.text" */
@@ -31,7 +31,7 @@
 .globl _start
 .type _start, @function
 
-_start: 
+_start:
 	cli
 	/* Save the BIST result */
 	movl	%eax, %ebp
@@ -68,13 +68,13 @@
 	 * pratical problem of being able to write code that can
 	 * be relocated.
 	 *
-	 * An lgdt call before we have memory enabled cannot be 
+	 * An lgdt call before we have memory enabled cannot be
 	 * position independent, as we cannot execute a call
 	 * instruction to get our current instruction pointer.
 	 * So while this code is relocateable it isn't arbitrarily
 	 * relocatable.
 	 *
-	 * The criteria for relocation have been relaxed to their 
+	 * The criteria for relocation have been relaxed to their
 	 * utmost, so that we can use the same code for both
 	 * our initial entry point and startup of the second cpu.
 	 * The code assumes when executing at _start that:

Modified: trunk/src/cpu/x86/16bit/reset16.lds
==============================================================================
--- trunk/src/cpu/x86/16bit/reset16.lds	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/16bit/reset16.lds	Tue Apr 27 08:56:47 2010	(r5507)
@@ -12,5 +12,5 @@
 		*(.reset)
 		. = 15 ;
 		BYTE(0x00);
-	} 
+	}
 }

Modified: trunk/src/cpu/x86/32bit/entry32.inc
==============================================================================
--- trunk/src/cpu/x86/32bit/entry32.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/32bit/entry32.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -18,23 +18,23 @@
 	.word	0
 
 	/* selgdt 0x08, flat code segment */
-	.word	0xffff, 0x0000		
-	.byte	0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */	
+	.word	0xffff, 0x0000
+	.byte	0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */
 
 	/* selgdt 0x10,flat data segment */
-	.word	0xffff, 0x0000		
+	.word	0xffff, 0x0000
 	.byte	0x00, 0x93, 0xcf, 0x00
 
 gdt_end:
-	
+
 
 /*
- *	When we come here we are in protected mode. We expand 
+ *	When we come here we are in protected mode. We expand
  *	the stack and copies the data segment from ROM to the
  *	memory.
  *
  *	After that, we call the chipset bootstrap routine that
- *	does what is left of the chipset initialization. 
+ *	does what is left of the chipset initialization.
  *
  *	NOTE aligned to 4 so that we are sure that the prefetch
  *	cache will be reloaded.
@@ -45,7 +45,7 @@
 
 	lgdt	%cs:gdtptr
 	ljmp	$ROM_CODE_SEG, $__protected_start
-	
+
 __protected_start:
 	/* Save the BIST value */
 	movl	%eax, %ebp

Modified: trunk/src/cpu/x86/lapic/lapic.c
==============================================================================
--- trunk/src/cpu/x86/lapic/lapic.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/lapic/lapic.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,11 +5,11 @@
 
 void setup_lapic(void)
 {
-	/* this is so interrupts work. This is very limited scope -- 
+	/* this is so interrupts work. This is very limited scope --
 	 * linux will do better later, we hope ...
 	 */
-	/* this is the first way we learned to do it. It fails on real SMP 
-	 * stuff. So we have to do things differently ... 
+	/* this is the first way we learned to do it. It fails on real SMP
+	 * stuff. So we have to do things differently ...
 	 * see the Intel mp1.4 spec, page A-3
 	 */
 
@@ -33,25 +33,25 @@
 		lapic_read_around(LAPIC_TASKPRI) & ~LAPIC_TPRI_MASK);
 
 	/* Put the local apic in virtual wire mode */
-	lapic_write_around(LAPIC_SPIV, 
+	lapic_write_around(LAPIC_SPIV,
 		(lapic_read_around(LAPIC_SPIV) & ~(LAPIC_VECTOR_MASK))
 		| LAPIC_SPIV_ENABLE);
-	lapic_write_around(LAPIC_LVT0, 
-		(lapic_read_around(LAPIC_LVT0) & 
-			~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | 
-				LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | 
+	lapic_write_around(LAPIC_LVT0,
+		(lapic_read_around(LAPIC_LVT0) &
+			~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
+				LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
 				LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 |
 				LAPIC_DELIVERY_MODE_MASK))
-		| (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING | 
+		| (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING |
 			LAPIC_DELIVERY_MODE_EXTINT)
 		);
-	lapic_write_around(LAPIC_LVT1, 
-		(lapic_read_around(LAPIC_LVT1) & 
-			~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | 
-				LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY | 
+	lapic_write_around(LAPIC_LVT1,
+		(lapic_read_around(LAPIC_LVT1) &
+			~(LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER |
+				LAPIC_LVT_REMOTE_IRR | LAPIC_INPUT_POLARITY |
 				LAPIC_SEND_PENDING |LAPIC_LVT_RESERVED_1 |
 				LAPIC_DELIVERY_MODE_MASK))
-		| (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING | 
+		| (LAPIC_LVT_REMOTE_IRR |LAPIC_SEND_PENDING |
 			LAPIC_DELIVERY_MODE_NMI)
 		);
 

Modified: trunk/src/cpu/x86/lapic/secondary.S
==============================================================================
--- trunk/src/cpu/x86/lapic/secondary.S	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/lapic/secondary.S	Tue Apr 27 08:56:47 2010	(r5507)
@@ -26,7 +26,7 @@
 	movl	%eax, %cr0
 
 	ljmpl	$0x10, $1f
-1:	
+1:
 	.code32
 	movw	$0x18, %ax
 	movw	%ax, %ds

Modified: trunk/src/cpu/x86/mtrr/earlymtrr.c
==============================================================================
--- trunk/src/cpu/x86/mtrr/earlymtrr.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/mtrr/earlymtrr.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -89,13 +89,13 @@
 	set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
 #endif
 
-	/* Set the default memory type and enable fixed and variable MTRRs 
+	/* Set the default memory type and enable fixed and variable MTRRs
 	 */
 	/* Enable Variable MTRRs */
 	msr.hi = 0x00000000;
 	msr.lo = 0x00000800;
 	wrmsr(MTRRdefType_MSR, msr);
-	
+
 }
 
 static inline void early_mtrr_init(void)

Modified: trunk/src/cpu/x86/mtrr/mtrr.c
==============================================================================
--- trunk/src/cpu/x86/mtrr/mtrr.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/mtrr/mtrr.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -68,7 +68,7 @@
 
 /* setting variable mtrr, comes from linux kernel source */
 static void set_var_mtrr(
-	unsigned int reg, unsigned long basek, unsigned long sizek, 
+	unsigned int reg, unsigned long basek, unsigned long sizek,
 	unsigned char type, unsigned address_bits)
 {
 	msr_t base, mask;
@@ -81,7 +81,7 @@
         // do this.
         if (sizek == 0) {
         	disable_cache();
-	
+
                 msr_t zero;
                 zero.lo = zero.hi = 0;
                 /* The invalid bit is kept in the mask, so we simply clear the
@@ -109,8 +109,8 @@
 		mask.lo = 0;
 	}
 
-	// it is recommended that we disable and enable cache when we 
-	// do this. 
+	// it is recommended that we disable and enable cache when we
+	// do this.
 	disable_cache();
 
 	/* Bit 32-35 of MTRRphysMask should be set to 1 */
@@ -228,7 +228,7 @@
 	return index;
 }
 
-static unsigned int range_to_mtrr(unsigned int reg, 
+static unsigned int range_to_mtrr(unsigned int reg,
 	unsigned long range_startk, unsigned long range_sizek,
 	unsigned long next_range_startk, unsigned char type, unsigned address_bits)
 {
@@ -253,7 +253,7 @@
 		unsigned long sizek;
 		/* Compute the maximum size I can make a range */
 		max_align = fls(range_startk);
-		align = fms(range_sizek); 
+		align = fms(range_sizek);
 		if (align > max_align) {
 			align = max_align;
 		}
@@ -274,7 +274,7 @@
 	return reg;
 }
 
-static unsigned long resk(uint64_t value) 
+static unsigned long resk(uint64_t value)
 {
 	unsigned long resultk;
 	if (value < (1ULL << 42)) {
@@ -298,7 +298,7 @@
 	printk(BIOS_DEBUG, "Setting fixed MTRRs(%d-%d) Type: WB\n",
 		start_mtrr, last_mtrr);
 	set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK);
-	
+
 }
 
 #ifndef CONFIG_VAR_MTRR_HOLE
@@ -343,10 +343,10 @@
 			return;
 		}
 #endif
-		state->reg = range_to_mtrr(state->reg, state->range_startk, 
+		state->reg = range_to_mtrr(state->reg, state->range_startk,
 			state->range_sizek, basek, MTRR_TYPE_WRBACK, state->address_bits);
 #if CONFIG_VAR_MTRR_HOLE
-		state->reg = range_to_mtrr(state->reg, state->hole_startk, 
+		state->reg = range_to_mtrr(state->reg, state->hole_startk,
 			state->hole_sizek, basek,  MTRR_TYPE_UNCACHEABLE, state->address_bits);
 #endif
 		state->range_startk = 0;
@@ -356,7 +356,7 @@
                 state->hole_sizek = 0;
 #endif
 	}
-	/* Allocate an msr */  
+	/* Allocate an msr */
 	printk(BIOS_SPEW, " Allocate an msr - basek = %08lx, sizek = %08lx,\n", basek, sizek);
 	state->range_startk = basek;
 	state->range_sizek  = sizek;
@@ -365,7 +365,7 @@
 void x86_setup_fixed_mtrrs(void)
 {
         /* Try this the simple way of incrementally adding together
-         * mtrrs.  If this doesn't work out we can get smart again 
+         * mtrrs.  If this doesn't work out we can get smart again
          * and clear out the mtrrs.
          */
 
@@ -390,20 +390,20 @@
 
 void x86_setup_var_mtrrs(unsigned address_bits)
 /* this routine needs to know how many address bits a given processor
- * supports.  CPUs get grumpy when you set too many bits in 
+ * supports.  CPUs get grumpy when you set too many bits in
  * their mtrr registers :(  I would generically call cpuid here
  * and find out how many physically supported but some cpus are
  * buggy, and report more bits then they actually support.
  */
 {
 	/* Try this the simple way of incrementally adding together
-	 * mtrrs.  If this doesn't work out we can get smart again 
+	 * mtrrs.  If this doesn't work out we can get smart again
 	 * and clear out the mtrrs.
 	 */
 	struct var_mtrr_state var_state;
 
 	/* Cache as many memory areas as possible */
-	/* FIXME is there an algorithm for computing the optimal set of mtrrs? 
+	/* FIXME is there an algorithm for computing the optimal set of mtrrs?
 	 * In some cases it is definitely possible to do better.
 	 */
 	var_state.range_startk = 0;
@@ -431,7 +431,7 @@
 	}
 #endif
 	/* Write the last range */
-	var_state.reg = range_to_mtrr(var_state.reg, var_state.range_startk, 
+	var_state.reg = range_to_mtrr(var_state.reg, var_state.range_startk,
 		var_state.range_sizek, 0, MTRR_TYPE_WRBACK, var_state.address_bits);
 #if CONFIG_VAR_MTRR_HOLE
 	var_state.reg = range_to_mtrr(var_state.reg, var_state.hole_startk,

Modified: trunk/src/cpu/x86/pae/pgtbl.c
==============================================================================
--- trunk/src/cpu/x86/pae/pgtbl.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/pae/pgtbl.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -43,7 +43,7 @@
 		);
 }
 
-void *map_2M_page(unsigned long page) 
+void *map_2M_page(unsigned long page)
 {
 	struct pde {
 		uint32_t addr_lo;
@@ -56,7 +56,7 @@
 
 #if (CONFIG_RAMTOP>0x100000) && (CONFIG_RAMBASE<0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1))
 	/*
-	 pgtbl is too big, so use last one 1M before CONFIG_LB_MEM_TOP, otherwise for 8 way dual core with vga support will push stack and heap cross 0xa0000, 
+	 pgtbl is too big, so use last one 1M before CONFIG_LB_MEM_TOP, otherwise for 8 way dual core with vga support will push stack and heap cross 0xa0000,
 	 and that region need to be used as vga font buffer. Please make sure set CONFIG_RAMTOP=0x200000 in MB Config
 	*/
 	struct pg_table *pgtbl = (struct pg_table*)0x100000; //1M

Modified: trunk/src/cpu/x86/smm/smiutil.c
==============================================================================
--- trunk/src/cpu/x86/smm/smiutil.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/smm/smiutil.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -72,14 +72,14 @@
 
 static void uart_wait_to_tx_byte(void)
 {
-	while(!uart_can_tx_byte()) 
+	while(!uart_can_tx_byte())
 	;
 }
 
 static void uart_wait_until_sent(void)
 {
 	while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
-	; 
+	;
 }
 
 static void uart_tx_byte(unsigned char data)

Modified: trunk/src/cpu/x86/smm/smm.ld
==============================================================================
--- trunk/src/cpu/x86/smm/smm.ld	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/smm/smm.ld	Tue Apr 27 08:56:47 2010	(r5507)
@@ -4,7 +4,7 @@
 
 SECTIONS
 {
-	/* This is the actual SMM handler. 
+	/* This is the actual SMM handler.
 	 *
 	 * We just put code, rodata, data and bss all in a row.
 	 */
@@ -43,7 +43,7 @@
 	. = 0xa8000 - (( CPUS - 1) * 0x400);
 	.jumptable : {
 		*(.jumptable)
-	}	
+	}
 
 	/DISCARD/ : {
 		*(.comment)

Modified: trunk/src/cpu/x86/smm/smmhandler.S
==============================================================================
--- trunk/src/cpu/x86/smm/smmhandler.S	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/smm/smmhandler.S	Tue Apr 27 08:56:47 2010	(r5507)
@@ -38,11 +38,11 @@
  * |                                |
  * |                                |
  * +--------------------------------+ 0xa8400
- * | SMM Entry Node 0 (+ stack)     | 
+ * | SMM Entry Node 0 (+ stack)     |
  * +--------------------------------+ 0xa8000
- * | SMM Entry Node 1 (+ stack)     | 
- * | SMM Entry Node 2 (+ stack)     | 
- * | SMM Entry Node 3 (+ stack)     | 
+ * | SMM Entry Node 1 (+ stack)     |
+ * | SMM Entry Node 2 (+ stack)     |
+ * | SMM Entry Node 3 (+ stack)     |
  * | ...                            |
  * +--------------------------------+ 0xa7400
  * |                                |
@@ -56,7 +56,7 @@
 
 /* SMM_HANDLER_OFFSET is the 16bit offset within the ASEG
  * at which smm_handler_start lives. At the moment the handler
- * lives right at 0xa0000, so the offset is 0. 
+ * lives right at 0xa0000, so the offset is 0.
  */
 
 #define SMM_HANDLER_OFFSET 0x0000
@@ -101,15 +101,15 @@
 	movl $LAPIC_ID, %esi
 	movl (%esi), %ecx
 	shr  $24, %ecx
-	
+
 	/* calculate stack offset by multiplying the APIC ID
 	 * by 1024 (0x400), and save that offset in ebp.
 	 */
 	shl $10, %ecx
 	movl %ecx, %ebp
 
-	/* We put the stack for each core right above 
-	 * its SMM entry point. Core 0 starts at 0xa8000, 
+	/* We put the stack for each core right above
+	 * its SMM entry point. Core 0 starts at 0xa8000,
 	 * we spare 0x10 bytes for the jump to be sure.
 	 */
 	movl $0xa8010, %eax
@@ -155,11 +155,11 @@
 	.long	0x00000000, 0x00000000
 
 	/* gdt selector 0x08, flat code segment */
-	.word	0xffff, 0x0000		
-	.byte	0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, 4GB limit */	
+	.word	0xffff, 0x0000
+	.byte	0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, 4GB limit */
 
 	/* gdt selector 0x10, flat data segment */
-	.word	0xffff, 0x0000		
+	.word	0xffff, 0x0000
 	.byte	0x00, 0x93, 0xcf, 0x00
 
 smm_gdt_end:
@@ -168,7 +168,7 @@
 .section ".jumptable", "a", @progbits
 
 /* This is the SMM jump table. All cores use the same SMM handler
- * for simplicity. But SMM Entry needs to be different due to the 
+ * for simplicity. But SMM Entry needs to be different due to the
  * save state area. The jump table makes sure all CPUs jump into the
  * real handler on SMM entry.
  */
@@ -185,13 +185,13 @@
 .code16
 jumptable:
 	/* core 3 */
-	ljmp $0xa000, $SMM_HANDLER_OFFSET 
+	ljmp $0xa000, $SMM_HANDLER_OFFSET
 .align 1024, 0x00
 	/* core 2 */
-	ljmp $0xa000, $SMM_HANDLER_OFFSET 
+	ljmp $0xa000, $SMM_HANDLER_OFFSET
 .align 1024, 0x00
 	/* core 1 */
-	ljmp $0xa000, $SMM_HANDLER_OFFSET 
+	ljmp $0xa000, $SMM_HANDLER_OFFSET
 .align 1024, 0x00
 	/* core 0 */
 	ljmp $0xa000, $SMM_HANDLER_OFFSET

Modified: trunk/src/cpu/x86/smm/smmrelocate.S
==============================================================================
--- trunk/src/cpu/x86/smm/smmrelocate.S	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/smm/smmrelocate.S	Tue Apr 27 08:56:47 2010	(r5507)
@@ -22,7 +22,7 @@
 // Make sure no stage 2 code is included:
 #define __PRE_RAM__
 
-// FIXME: Is this piece of code southbridge specific, or 
+// FIXME: Is this piece of code southbridge specific, or
 // can it be cleaned up so this include is not required?
 // It's needed right now because we get our PM_BASE from
 // here.
@@ -73,7 +73,7 @@
  * 0xa0000-0xa0400 and the stub plus stack would need to go
  * at 0xa8000-0xa8100 (example for core 0). That is not enough.
  *
- * This means we're basically limited to 16 cpu cores before 
+ * This means we're basically limited to 16 cpu cores before
  * we need to use the TSEG/HSEG for the actual SMM handler plus stack.
  * When we exceed 32 cores, we also need to put SMBASE to TSEG/HSEG.
  *
@@ -101,7 +101,7 @@
 	addr32 mov (%ebx), %al
 	cmp $0x64, %al
 	je 1f
- 
+
 	mov $0x38000 + 0x7ef8, %ebx
 	jmp smm_relocate
 1:
@@ -112,8 +112,8 @@
 	movl $LAPIC_ID, %esi
 	addr32 movl (%esi), %ecx
 	shr  $24, %ecx
-	
-	/* calculate offset by multiplying the 
+
+	/* calculate offset by multiplying the
 	 * apic ID by 1024 (0x400)
 	 */
 	movl %ecx, %edx
@@ -158,7 +158,7 @@
 	outb %al, %dx
 	/* calculate ascii of cpu number. More than 9 cores? -> FIXME */
 	movb %cl, %al
-	addb $'0', %al 
+	addb $'0', %al
 	outb %al, %dx
 	mov $']', %al
 	outb %al, %dx

Modified: trunk/src/cpu/x86/sse_disable.inc
==============================================================================
--- trunk/src/cpu/x86/sse_disable.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/sse_disable.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,7 +2,7 @@
 	 * Put the processor back into a reset state
 	 * with respect to the xmm registers.
 	 */
-	
+
 	xorps %xmm0, %xmm0
 	xorps %xmm1, %xmm1
 	xorps %xmm2, %xmm2

Modified: trunk/src/cpu/x86/tsc/delay_tsc.c
==============================================================================
--- trunk/src/cpu/x86/tsc/delay_tsc.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/cpu/x86/tsc/delay_tsc.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -10,7 +10,7 @@
 #if (CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 == 1)
 #define CLOCK_TICK_RATE	1193180U /* Underlying HZ */
 
-/* ------ Calibrate the TSC ------- 
+/* ------ Calibrate the TSC -------
  * Too much 64-bit arithmetic here to do this cleanly in C, and for
  * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2)
  * output busy loop as low as possible. We avoid reading the CTC registers
@@ -88,13 +88,13 @@
  * this is the "no timer2" version.
  * to calibrate tsc, we get a TSC reading, then do 1,000,000 outbs to port 0x80
  * then we read TSC again, and divide the difference by 1,000,000
- * we have found on a wide range of machines that this gives us a a 
+ * we have found on a wide range of machines that this gives us a a
  * good microsecond value
  * to +- 10%. On a dual AMD 1.6 Ghz box, it gives us .97 microseconds, and on a
  * 267 Mhz. p5, it gives us 1.1 microseconds.
  * also, since gcc now supports long long, we use that.
  * also no unsigned long long / operator, so we play games.
- * about the only thing you can do with long longs, it seems, 
+ * about the only thing you can do with long longs, it seems,
  *is return them and assign them.
  * (and do asm on them, yuck)
  * so avoid all ops on long longs.
@@ -103,7 +103,7 @@
 {
 	unsigned long long start, end, delta;
 	unsigned long result, count;
-	
+
 	printk(BIOS_SPEW, "Calibrating delay loop...\n");
 	start = rdtscll();
 	// no udivdi3 because we don't like libgcc. (only in x86emu)
@@ -130,7 +130,7 @@
 	result = delta;
 	printk(BIOS_SPEW, "end %llx, start %llx\n", end, start);
 	printk(BIOS_SPEW, "32-bit delta %ld\n", (unsigned long) delta);
-	
+
 	printk(BIOS_SPEW, "%s 32-bit result is %ld\n",
 			__func__,
 			result);

Modified: trunk/src/devices/cardbus_device.c
==============================================================================
--- trunk/src/devices/cardbus_device.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/cardbus_device.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -159,8 +159,8 @@
 	uint16_t ctrl;
 	ctrl = pci_read_config16(dev, PCI_CB_BRIDGE_CONTROL);
 	ctrl |= (dev->link[0].bridge_ctrl & (
-			PCI_BRIDGE_CTL_PARITY | 
-			PCI_BRIDGE_CTL_SERR | 
+			PCI_BRIDGE_CTL_PARITY |
+			PCI_BRIDGE_CTL_SERR |
 			PCI_BRIDGE_CTL_NO_ISA |
 			PCI_BRIDGE_CTL_VGA |
 			PCI_BRIDGE_CTL_MASTER_ABORT |
@@ -174,8 +174,8 @@
 	enable_childrens_resources(dev);
 }
 
-unsigned int cardbus_scan_bus(struct bus *bus, 
-	unsigned min_devfn, unsigned max_devfn, 
+unsigned int cardbus_scan_bus(struct bus *bus,
+	unsigned min_devfn, unsigned max_devfn,
 	unsigned int max)
 {
 	return pci_scan_bus(bus, min_devfn, max_devfn, max);
@@ -196,7 +196,7 @@
 
 	/* Set up the primary, secondary and subordinate bus numbers. We have
 	 * no idea how many buses are behind this bridge yet, so we set the
-	 * subordinate bus number to 0xff for the moment. 
+	 * subordinate bus number to 0xff for the moment.
 	 */
 	bus->secondary = ++max;
 	bus->subordinate = 0xff;
@@ -222,7 +222,7 @@
 		((unsigned int) (bus->subordinate) << 16));
 	pci_write_config32(dev, PCI_CB_PRIMARY_BUS, buses);
 
-	/* Now we can scan all subordinate buses 
+	/* Now we can scan all subordinate buses
 	 * i.e. the bus behind the bridge.
 	 */
 	max = cardbus_scan_bus(bus, 0x00, 0xff, max);
@@ -235,7 +235,7 @@
 		((unsigned int) (bus->subordinate) << 16);
 	pci_write_config32(dev, PCI_CB_PRIMARY_BUS, buses);
 	pci_write_config16(dev, PCI_COMMAND, cr);
-	
+
 	printk(BIOS_SPEW, "%s returns max %d\n", __func__, max);
 	return max;
 }

Modified: trunk/src/devices/device_util.c
==============================================================================
--- trunk/src/devices/device_util.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/device_util.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -79,7 +79,7 @@
 	result = 0;
 	for (dev = all_devices; dev; dev = dev->next) {
 		if ((dev->path.type == DEVICE_PATH_PCI) &&
-			(dev->bus->secondary == bus) && 
+			(dev->bus->secondary == bus) &&
 			(dev->path.pci.devfn == devfn)) {
 			result = dev;
 			break;
@@ -92,32 +92,32 @@
  * @brief Given a smbus bus and a device number, find the device structure
  *
  * @param bus The bus number
- * @param addr a device number 
+ * @param addr a device number
  * @return pointer to the device structure
  */
 struct device *dev_find_slot_on_smbus(unsigned int bus, unsigned int addr)
 {
         struct device *dev, *result;
-        
+
         result = 0;
         for (dev = all_devices; dev; dev = dev->next) {
                 if ((dev->path.type == DEVICE_PATH_I2C) &&
-                        (dev->bus->secondary == bus) && 
+                        (dev->bus->secondary == bus) &&
                         (dev->path.i2c.device == addr)) {
                         result = dev;
-                        break; 
-                }       
-        }       
+                        break;
+                }
+        }
         return result;
-}    
+}
 
 /** Find a device of a given vendor and type
  * @param vendor Vendor ID (e.g. 0x8086 for Intel)
  * @param device Device ID
  * @param from Pointer to the device structure, used as a starting point
- *        in the linked list of all_devices, which can be 0 to start at the 
+ *        in the linked list of all_devices, which can be 0 to start at the
  *        head of the list (i.e. all_devices)
- * @return Pointer to the device struct 
+ * @return Pointer to the device struct
  */
 struct device *dev_find_device(unsigned int vendor, unsigned int device, struct device *from)
 {
@@ -134,9 +134,9 @@
 /** Find a device of a given class
  * @param class Class of the device
  * @param from Pointer to the device structure, used as a starting point
- *        in the linked list of all_devices, which can be 0 to start at the 
+ *        in the linked list of all_devices, which can be 0 to start at the
  *        head of the list (i.e. all_devices)
- * @return Pointer to the device struct 
+ * @return Pointer to the device struct
  */
 struct device *dev_find_class(unsigned int class, struct device *from)
 {
@@ -167,11 +167,11 @@
 		case DEVICE_PATH_PCI:
 #if CONFIG_PCI_BUS_SEGN_BITS
 			sprintf(buffer, "PCI: %04x:%02x:%02x.%01x",
-				dev->bus->secondary>>8, dev->bus->secondary & 0xff, 
+				dev->bus->secondary>>8, dev->bus->secondary & 0xff,
 				PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
 #else
 			sprintf(buffer, "PCI: %02x:%02x.%01x",
-				dev->bus->secondary, 
+				dev->bus->secondary,
 				PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
 #endif
 			break;
@@ -408,7 +408,7 @@
 	 * the bridge.  While the granularity is simply how many low bits of the
 	 * address cannot be set.
 	 */
-	
+
 	/* Get the end (rounded up) */
 	end = base + align_up(resource->size, resource->gran) - 1;
 
@@ -468,7 +468,7 @@
 			sprintf(buf, "bus %02x ", dev->link[0].secondary);
 #endif
 		}
-		printk(BIOS_DEBUG, 
+		printk(BIOS_DEBUG,
 			"%s %02lx <- [0x%010Lx - 0x%010Lx] size 0x%08Lx gran 0x%02x %s%s%s\n",
 			dev_path(dev),
 			resource->index,

Modified: trunk/src/devices/hypertransport.c
==============================================================================
--- trunk/src/devices/hypertransport.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/hypertransport.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -39,7 +39,7 @@
  * so don't do it again
  */
 #define OPT_HT_LINK 0
-        
+
 #if OPT_HT_LINK == 1
 #include <cpu/amd/model_fxx_rev.h>
 #endif
@@ -52,9 +52,9 @@
 	/* Extract the chain of devices to (first through last)
 	 * for the next hypertransport device.
 	 */
-	while(last && last->sibling && 
+	while(last && last->sibling &&
 		(last->sibling->path.type == DEVICE_PATH_PCI) &&
-		(last->sibling->path.pci.devfn > last->path.pci.devfn)) 
+		(last->sibling->path.pci.devfn > last->path.pci.devfn))
 	{
 		last = last->sibling;
 	}
@@ -101,11 +101,11 @@
 	}
 	/* AMD K8 Unsupported 1Ghz? */
 	if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
-#if CONFIG_K8_HT_FREQ_1G_SUPPORT == 1 
-	#if CONFIG_K8_REV_F_SUPPORT == 0 
+#if CONFIG_K8_HT_FREQ_1G_SUPPORT == 1
+	#if CONFIG_K8_REV_F_SUPPORT == 0
 		if (is_cpu_pre_e0()) { // only e0 later suupport 1GHz HT
 			freq_cap &= ~(1 << HT_FREQ_1000Mhz);
-		} 
+		}
 	#endif
 #else
 		freq_cap &= ~(1 << HT_FREQ_1000Mhz);
@@ -129,7 +129,7 @@
 	static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
 	unsigned present_width_cap,    upstream_width_cap;
 	unsigned present_freq_cap,     upstream_freq_cap;
-	unsigned ln_present_width_in,  ln_upstream_width_in; 
+	unsigned ln_present_width_in,  ln_upstream_width_in;
 	unsigned ln_present_width_out, ln_upstream_width_out;
 	unsigned freq, old_freq;
 	unsigned present_width, upstream_width, old_width;
@@ -140,7 +140,7 @@
 
 	/* Set the hypertransport link width and frequency */
 	reset_needed = 0;
-	/* See which side of the device our previous write to 
+	/* See which side of the device our previous write to
 	 * set the unitid came from.
 	 */
 	cur->dev = dev;
@@ -164,7 +164,7 @@
 	upstream_freq_cap  = ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
 	present_width_cap  = pci_read_config8(cur->dev, cur->pos + cur->config_off);
 	upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off);
-	
+
 	/* Calculate the highest useable frequency */
 	freq = log2(present_freq_cap & upstream_freq_cap);
 
@@ -242,7 +242,7 @@
 		}
 	}
 #endif
-	
+
 	/* Remember the current link as the previous link,
 	 * But look at the other offsets.
 	 */
@@ -261,7 +261,7 @@
 	}
 
 	return reset_needed;
-		
+
 }
 
 static unsigned ht_lookup_slave_capability(struct device *dev)
@@ -355,7 +355,7 @@
 		dummy.path.type        = DEVICE_PATH_PCI;
 		dummy.path.pci.devfn = devfn;
 		id = pci_read_config32(&dummy, PCI_VENDOR_ID);
-		if (	(id == 0xffffffff) || (id == 0x00000000) || 
+		if (	(id == 0xffffffff) || (id == 0x00000000) ||
 			(id == 0x0000ffff) || (id == 0xffff0000)) {
 			continue;
 		}
@@ -371,12 +371,12 @@
 		flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
 		flags &= ~0x1f;
 		pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
-		printk(BIOS_SPEW, "Collapsing %s [%04x/%04x]\n", 
+		printk(BIOS_SPEW, "Collapsing %s [%04x/%04x]\n",
 			dev_path(&dummy), dummy.vendor, dummy.device);
 	}
 }
 
-unsigned int hypertransport_scan_chain(struct bus *bus, 
+unsigned int hypertransport_scan_chain(struct bus *bus,
 	unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unitid_base, unsigned offset_unitid)
 {
 	//even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
@@ -410,7 +410,7 @@
 	prev.config_off   = PCI_HT_CAP_HOST_WIDTH;
 	prev.freq_off     = PCI_HT_CAP_HOST_FREQ;
 	prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
-	
+
 	/* If present assign unitid to a hypertransport chain */
 	last_unitid = min_unitid -1;
 	max_unitid = next_unitid = min_unitid;
@@ -446,7 +446,7 @@
 				}
 			}
 		} while((ctrl & (1 << 5)) == 0);
-		
+
 
 		/* Get and setup the device_structure */
 		dev = ht_scan_get_devs(&old_devices);
@@ -462,15 +462,15 @@
 		/* Find the hypertransport link capability */
 		pos = ht_lookup_slave_capability(dev);
 		if (pos == 0) {
-			printk(BIOS_ERR, "%s Hypertransport link capability not found", 
+			printk(BIOS_ERR, "%s Hypertransport link capability not found",
 				dev_path(dev));
 			break;
 		}
-		
+
 		/* Update the Unitid of the current device */
 		flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
-        
-		/* If the devices has a unitid set and is at devfn 0 we are done. 
+
+		/* If the devices has a unitid set and is at devfn 0 we are done.
 		 * This can happen with shadow hypertransport devices,
 		 * or if we have reached the bottom of a
 		 * hypertransport device chain.
@@ -492,7 +492,7 @@
 				}
 			}
 
-		} 
+		}
 #endif
 
                 flags |= next_unitid & 0x1f;
@@ -502,12 +502,12 @@
 		static_count = 1;
 		for(func = dev; func; func = func->sibling) {
 			func->path.pci.devfn += (next_unitid << 3);
-			static_count = (func->path.pci.devfn >> 3) 
+			static_count = (func->path.pci.devfn >> 3)
 				- (dev->path.pci.devfn >> 3) + 1;
 			last_func = func;
 		}
 		/* Compute the number of unitids consumed */
-		printk(BIOS_SPEW, "%s count: %04x static_count: %04x\n", 
+		printk(BIOS_SPEW, "%s count: %04x static_count: %04x\n",
 			dev_path(dev), count, static_count);
 		if (count < static_count) {
 			count = static_count;
@@ -534,7 +534,7 @@
 
 		printk(BIOS_DEBUG, "%s [%04x/%04x] %s next_unitid: %04x\n",
 			dev_path(dev),
-			dev->vendor, dev->device, 
+			dev->vendor, dev->device,
 			(dev->enabled? "enabled": "disabled"), next_unitid);
 
 	} while (last_unitid != next_unitid);
@@ -562,7 +562,7 @@
                 }
 
 		ht_unitid_base[ht_dev_num-1] = CONFIG_HT_CHAIN_END_UNITID_BASE; // update last one
-		
+
 		printk(BIOS_DEBUG, " unitid: %04x --> %04x\n",
 				real_last_unitid, CONFIG_HT_CHAIN_END_UNITID_BASE);
 
@@ -573,11 +573,11 @@
 	if (next_unitid > 0x20) {
 		next_unitid = 0x20;
 	}
-	if( (bus->secondary == 0) && (next_unitid > 0x18)) { 
+	if( (bus->secondary == 0) && (next_unitid > 0x18)) {
 		next_unitid = 0x18; /* avoid K8 on bus 0 */
 	}
 
-	/* Die if any leftover Static devices are are found.  
+	/* Die if any leftover Static devices are are found.
 	 * There's probably a problem in the Config.lb.
 	 */
 	if(old_devices) {
@@ -587,14 +587,14 @@
 		}
 		printk(BIOS_ERR, "HT: Left over static devices.  Check your Config.lb\n");
 		if(last_func  && !last_func->sibling) // put back the left over static device, and let pci_scan_bus disable it
-			last_func->sibling = old_devices; 
+			last_func->sibling = old_devices;
 	}
 
 	/* Now that nothing is overlapping it is safe to scan the
-	 * children. 
+	 * children.
 	 */
-	max = pci_scan_bus(bus, 0x00, ((next_unitid-1) << 3)|7, max); 
-	return max; 
+	max = pci_scan_bus(bus, 0x00, ((next_unitid-1) << 3)|7, max);
+	return max;
 }
 
 /**

Modified: trunk/src/devices/oprom/include/x86emu/regs.h
==============================================================================
--- trunk/src/devices/oprom/include/x86emu/regs.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/include/x86emu/regs.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -106,7 +106,7 @@
 	u32 FLAGS;
 	};
 
-/*  
+/*
  * Segment registers here represent the 16 bit quantities
  * CS, DS, ES, SS.
  */
@@ -184,8 +184,8 @@
 #define F_ALWAYS_ON  (0x0002)   /* flag bits always on */
 
 /*
- * Define a mask for only those flag bits we will ever pass back 
- * (via PUSHF) 
+ * Define a mask for only those flag bits we will ever pass back
+ * (via PUSHF)
  */
 #define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
 
@@ -271,8 +271,8 @@
      *  Delayed flag set        3 bits  (zero, signed, parity)
      *  reserved                6 bits
      *  interrupt #             8 bits  instruction raised interrupt
-     *  BIOS video segregs      4 bits  
-     *  Interrupt Pending       1 bits  
+     *  BIOS video segregs      4 bits
+     *  Interrupt Pending       1 bits
      *  Extern interrupt        1 bits
      *  Halted                  1 bits
      */

Modified: trunk/src/devices/oprom/include/x86emu/x86emu.h
==============================================================================
--- trunk/src/devices/oprom/include/x86emu/x86emu.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/include/x86emu/x86emu.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -128,7 +128,7 @@
 extern void X86API wrb(u32 addr, u8 val);
 extern void X86API wrw(u32 addr, u16 val);
 extern void X86API wrl(u32 addr, u32 val);
- 
+
 #pragma	pack()
 
 /*--------------------- type definitions -----------------------------------*/
@@ -175,10 +175,10 @@
 #define DEBUG_SYSINT_F          0x000200 /* bios system interrupts. */
 #define DEBUG_TRACECALL_F       0x000400
 #define DEBUG_INSTRUMENT_F      0x000800
-#define DEBUG_MEM_TRACE_F       0x001000 
-#define DEBUG_IO_TRACE_F        0x002000 
+#define DEBUG_MEM_TRACE_F       0x001000
+#define DEBUG_IO_TRACE_F        0x002000
 #define DEBUG_TRACECALL_REGS_F  0x004000
-#define DEBUG_DECODE_NOPRINT_F  0x008000 
+#define DEBUG_DECODE_NOPRINT_F  0x008000
 #define DEBUG_SAVE_IP_CS_F      0x010000
 #define DEBUG_TRACEJMP_F        0x020000
 #define DEBUG_TRACEJMP_REGS_F   0x040000

Modified: trunk/src/devices/oprom/x86.c
==============================================================================
--- trunk/src/devices/oprom/x86.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/x86.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -45,16 +45,16 @@
 
 static int intXX_exception_handler(struct eregs *regs)
 {
-	printk(BIOS_INFO, "Oops, exception %d while executing option rom\n", 
+	printk(BIOS_INFO, "Oops, exception %d while executing option rom\n",
 			regs->vector);
-	x86_exception(regs);	// Call coreboot exception handler 
+	x86_exception(regs);	// Call coreboot exception handler
 
 	return 0;		// Never returns?
 }
 
 static int intXX_unknown_handler(struct eregs *regs)
 {
-	printk(BIOS_INFO, "Unsupported software interrupt #0x%x\n", 
+	printk(BIOS_INFO, "Unsupported software interrupt #0x%x\n",
 			regs->vector);
 
 	return -1;
@@ -74,12 +74,12 @@
 {
 	int i;
 
-	/* The first 16 intXX functions are not BIOS services, 
+	/* The first 16 intXX functions are not BIOS services,
 	 * but the CPU-generated exceptions ("hardware interrupts")
 	 */
 	for (i = 0; i < 0x10; i++)
 		intXX_handler[i] = &intXX_exception_handler;
-	
+
 	/* Mark all other intXX calls as unknown first */
 	for (i = 0x10; i < 0x100; i++)
 	{
@@ -133,14 +133,14 @@
 	}
 
 	/* Many option ROMs use the hard coded interrupt entry points in the
-	 * system bios. So install them at the known locations. 
+	 * system bios. So install them at the known locations.
 	 */
-	
+
 	/* int42 is the relocated int10 */
 	write_idt_stub((void *)0xff065, 0x42);
 
 	/* VIA's VBIOS calls f000:f859 instead of int15 */
-	write_idt_stub((void *)0xff859, 0x15); 
+	write_idt_stub((void *)0xff859, 0x15);
 }
 
 void run_bios(struct device *dev, unsigned long addr)
@@ -187,7 +187,7 @@
 		"outl	%%eax, %%dx\n"
 		"addb	$2, %%dl\n"
 		"inw	%%dx, %%ax\n"
-		: "=a" (eax), "=b"(ebx), "=c"(ecx), "=d"(edx) 
+		: "=a" (eax), "=b"(ebx), "=c"(ecx), "=d"(edx)
 		: "a"(classIndex)
 	);
 
@@ -245,7 +245,7 @@
 }
 #endif
 
-/* interrupt_handler() is called from assembler code only, 
+/* interrupt_handler() is called from assembler code only,
  * so there is no use in putting the prototype into a header file.
  */
 int __attribute__((regparm(0))) interrupt_handler(u32 intnumber,
@@ -308,7 +308,7 @@
 	// will later pop them.
 	// What happens here is that we force (volatile!) changing
 	// the values of the parameters of this function. We do this
-	// because we know that they stay alive on the stack after 
+	// because we know that they stay alive on the stack after
 	// we leave this function. Don't say this is bollocks.
 	*(volatile u32 *)&eax = reg_info.eax;
 	*(volatile u32 *)&ecx = reg_info.ecx;

Modified: trunk/src/devices/oprom/x86_asm.S
==============================================================================
--- trunk/src/devices/oprom/x86_asm.S	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/x86_asm.S	Tue Apr 27 08:56:47 2010	(r5507)
@@ -25,7 +25,7 @@
 
 /* This is the intXX interrupt handler stub code. It gets copied
  * to the IDT and to some fixed addresses in the F segment. Before
- * the code can used, it gets patched up by the C function copying 
+ * the code can used, it gets patched up by the C function copying
  * it: byte 3 (the $0 in movb $0, %al) is overwritten with the int#.
  */
 
@@ -85,11 +85,11 @@
 	 * protected mode is turned off.
 	 */
 	mov	$0x30, %ax
-	mov	%ax, %ds       
-	mov	%ax, %es       
-	mov	%ax, %fs       
-	mov	%ax, %gs       
-	mov	%ax, %ss       
+	mov	%ax, %ds
+	mov	%ax, %es
+	mov	%ax, %fs
+	mov	%ax, %gs
+	mov	%ax, %ss
 
 	/* Turn off protection */
 	movl	%cr0, %eax
@@ -114,9 +114,9 @@
 	lidt	__realmode_idt
 
 	/* Set all segments to 0x0000, ds to 0x0040 */
-	mov	%ax, %es       
-	mov	%ax, %fs       
-	mov	%ax, %gs       
+	mov	%ax, %es
+	mov	%ax, %fs
+	mov	%ax, %gs
 	mov	$0x40, %ax
 	mov	%ax, %ds
 
@@ -140,8 +140,8 @@
 	data32	ljmp	$0x10, $RELOCATED(1f)
 1:
 	.code32
-	movw	$0x18, %ax     
-	mov	%ax, %ds       
+	movw	$0x18, %ax
+	mov	%ax, %ds
 	mov	%ax, %es
 	mov	%ax, %fs
 	mov	%ax, %gs
@@ -185,11 +185,11 @@
 	 * protected mode is turned off.
 	 */
 	mov	$0x30, %ax
-	mov	%ax, %ds       
-	mov	%ax, %es       
-	mov	%ax, %fs       
-	mov	%ax, %gs       
-	mov	%ax, %ss       
+	mov	%ax, %ds
+	mov	%ax, %es
+	mov	%ax, %fs
+	mov	%ax, %gs
+	mov	%ax, %ss
 
 	/* Turn off protection */
 	movl	%cr0, %eax
@@ -214,9 +214,9 @@
 	lidt	__realmode_idt
 
 	/* Set all segments to 0x0000, ds to 0x0040 */
-	mov	%ax, %es       
-	mov	%ax, %fs       
-	mov	%ax, %gs       
+	mov	%ax, %es
+	mov	%ax, %fs
+	mov	%ax, %gs
 	mov	$0x40, %ax
 	mov	%ax, %ds
 	mov	%cx, %ax	// restore ax
@@ -238,8 +238,8 @@
 	data32	ljmp	$0x10, $RELOCATED(1f)
 1:
 	.code32
-	movw	$0x18, %ax     
-	mov	%ax, %ds       
+	movw	$0x18, %ax
+	mov	%ax, %ds
 	mov	%ax, %es
 	mov	%ax, %fs
 	mov	%ax, %gs
@@ -275,17 +275,17 @@
 	 * descriptors.  They will retain these configurations (limits,
 	 * writability, etc.) once protected mode is turned off.
 	 */
-	mov	$0x30, %ax     
-	mov	%ax, %ds       
-	mov	%ax, %es       
-	mov	%ax, %fs       
-	mov	%ax, %gs       
-	mov	%ax, %ss       
+	mov	$0x30, %ax
+	mov	%ax, %ds
+	mov	%ax, %es
+	mov	%ax, %fs
+	mov	%ax, %gs
+	mov	%ax, %ss
 
 	/* Turn off protected mode */
-	movl	%cr0, %eax     
+	movl	%cr0, %eax
 	andl	$~PE, %eax
-	movl	%eax, %cr0     
+	movl	%eax, %cr0
 
 	/* Now really going into real mode */
 	data32 ljmp	$0, $RELOCATED(1f)
@@ -302,7 +302,7 @@
 	movl	%eax, %esp
 
 	/* Load 16-bit intXX IDT */
-	xor	%ax, %ax       
+	xor	%ax, %ax
 	mov	%ax, %ds
 	lidt	__realmode_idt
 

Modified: trunk/src/devices/oprom/x86_interrupts.c
==============================================================================
--- trunk/src/devices/oprom/x86_interrupts.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/x86_interrupts.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -202,7 +202,7 @@
 		res = 0;
 		break;
 	default:
-		printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", 
+		printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",
 				regs->eax & 0xffff);
 	}
 

Modified: trunk/src/devices/oprom/x86emu/decode.c
==============================================================================
--- trunk/src/devices/oprom/x86emu/decode.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/x86emu/decode.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -732,7 +732,7 @@
 Value of scale * index
 
 REMARKS:
-Decodes scale/index of SIB byte and returns relevant offset part of 
+Decodes scale/index of SIB byte and returns relevant offset part of
 effective address.
 ****************************************************************************/
 static unsigned decode_sib_si(

Modified: trunk/src/devices/oprom/x86emu/ops2.c
==============================================================================
--- trunk/src/devices/oprom/x86emu/ops2.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/x86emu/ops2.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -170,7 +170,7 @@
   M.x86.R_EAX = 0;
   DECODE_CLEAR_SEGOVR();
   END_OF_INSTR();
-}  
+}
 
 #define xorl(a,b)   (((a) && !(b)) || (!(a) && (b)))
 

Modified: trunk/src/devices/oprom/x86emu/sys.c
==============================================================================
--- trunk/src/devices/oprom/x86emu/sys.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/x86emu/sys.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -85,7 +85,7 @@
 Byte value read from emulator memory.
 
 REMARKS:
-Reads a byte value from the emulator memory. 
+Reads a byte value from the emulator memory.
 ****************************************************************************/
 u8 X86API rdb(u32 addr)
 {
@@ -130,7 +130,7 @@
 RETURNS:
 Long value read from emulator memory.
 REMARKS:
-Reads a long value from the emulator memory. 
+Reads a long value from the emulator memory.
 ****************************************************************************/
 u32 X86API rdl(u32 addr)
 {
@@ -189,7 +189,7 @@
 val		- Value to store
 
 REMARKS:
-Writes a long value to emulator memory. 
+Writes a long value to emulator memory.
 ****************************************************************************/
 void X86API wrl(u32 addr, u32 val)
 {

Modified: trunk/src/devices/oprom/x86emu/x86emui.h
==============================================================================
--- trunk/src/devices/oprom/x86emu/x86emui.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/x86emu/x86emui.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -75,7 +75,7 @@
 #include <xf86_ansic.h>
 #else
 #include <string.h>
-#endif                                                                                           
+#endif
 /*--------------------------- Inline Functions ----------------------------*/
 
 #ifdef  __cplusplus

Modified: trunk/src/devices/oprom/yabel/biosemu.c
==============================================================================
--- trunk/src/devices/oprom/yabel/biosemu.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/yabel/biosemu.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -250,7 +250,7 @@
 	X86EMU_setupMemFuncs(&my_mem_funcs);
 
 	//setup PMM struct in BIOS_DATA_SEGMENT, offset 0x0
-	u8 pmm_length = pmm_setup(BIOS_DATA_SEGMENT, 0x0);	
+	u8 pmm_length = pmm_setup(BIOS_DATA_SEGMENT, 0x0);
 	if (pmm_length <= 0) {
 		printf ("\nYABEL: Warning: PMM Area could not be setup. PMM not available (%x)\n",
 		     pmm_length);

Modified: trunk/src/devices/oprom/yabel/biosemu.h
==============================================================================
--- trunk/src/devices/oprom/yabel/biosemu.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/yabel/biosemu.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -38,7 +38,7 @@
 				// Address, there will only be a call to this INT and a RETF
 #define PNP_INT_NUM 0xFD
 
-/* array of funtion pointers to override generic interrupt handlers 
+/* array of funtion pointers to override generic interrupt handlers
  * a YABEL caller can add functions to this array before calling YABEL
  * if a interrupt occurs, YABEL checks wether a function is set in
  * this array and only runs the generic interrupt handler code, if

Modified: trunk/src/devices/oprom/yabel/compat/functions.c
==============================================================================
--- trunk/src/devices/oprom/yabel/compat/functions.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/yabel/compat/functions.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -61,6 +61,6 @@
 	"rdtsc"
         : "=a"(eax), "=d"(edx)
         : /* no inputs, no clobber */);
-    act = ((u64) edx << 32) | eax; 
+    act = ((u64) edx << 32) | eax;
     return act;
 }

Modified: trunk/src/devices/oprom/yabel/compat/of.h
==============================================================================
--- trunk/src/devices/oprom/yabel/compat/of.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/yabel/compat/of.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
 #define phandle_t p32
 #define ihandle_t p32
 
-typedef struct 
+typedef struct
 {
     unsigned int serv;
     int nargs;

Modified: trunk/src/devices/oprom/yabel/compat/time.h
==============================================================================
--- trunk/src/devices/oprom/yabel/compat/time.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/yabel/compat/time.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -15,4 +15,4 @@
 /* TODO: check how this works in x86 */
 extern unsigned long tb_freq;
 u64 get_time(void);
-#endif 
+#endif

Modified: trunk/src/devices/oprom/yabel/debug.h
==============================================================================
--- trunk/src/devices/oprom/yabel/debug.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/yabel/debug.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -39,7 +39,7 @@
  * |||-Currently unused
  * ||||-Currently unused
  * |||||-Currently unused
- * ||||||-DEBUG_PNP - Print Plug And Play access made by option rom 
+ * ||||||-DEBUG_PNP - Print Plug And Play access made by option rom
  * |||||||-DEBUG_DISK - Print Disk I/O related messages, currently unused
  * ||||||||-DEBUG_PMM - Print messages related to POST Memory Manager (PMM)
  * |||||||||-DEBUG_VBE - Print messages related to VESA BIOS Extension (VBE) functions
@@ -47,7 +47,7 @@
  * |||||||||||-DEBUG_INTR - Print messages related to interrupt handling
  * ||||||||||||-DEBUG_CHECK_VMEM_ACCESS - Print messages related to accesse to certain areas of the virtual Memory (e.g. BDA (BIOS Data Area) or Interrupt Vectors)
  * |||||||||||||-DEBUG_MEM - Print memory access made by option rom (NOTE: this also includes accesses to fetch instructions)
- * ||||||||||||||-DEBUG_IO - Print I/O access made by option rom 
+ * ||||||||||||||-DEBUG_IO - Print I/O access made by option rom
  * 11000111111111 - Max Binary Value, Debug All (WARNING: - This could run for hours)
  */
 

Modified: trunk/src/devices/oprom/yabel/interrupt.c
==============================================================================
--- trunk/src/devices/oprom/yabel/interrupt.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/yabel/interrupt.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -410,7 +410,7 @@
 				M.x86.R_CL =
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
 					pci_read_config8(dev, offs);
-#else					
+#else
 				    (u8) rtas_pci_config_read(bios_device.
 								   puid, 1,
 								   bus, devfn,
@@ -425,7 +425,7 @@
 				M.x86.R_CX =
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
 					pci_read_config16(dev, offs);
-#else					
+#else
 				    (u16) rtas_pci_config_read(bios_device.
 								    puid, 2,
 								    bus, devfn,
@@ -440,7 +440,7 @@
 				M.x86.R_ECX =
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
 					pci_read_config32(dev, offs);
-#else					
+#else
 				    (u32) rtas_pci_config_read(bios_device.
 								    puid, 4,
 								    bus, devfn,
@@ -478,7 +478,7 @@
 			case 0xb10b:
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
 					pci_write_config8(bios_device.dev, offs, M.x86.R_CL);
-#else					
+#else
 				rtas_pci_config_write(bios_device.puid, 1, bus,
 						      devfn, offs, M.x86.R_CL);
 #endif
@@ -490,7 +490,7 @@
 			case 0xb10c:
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
 					pci_write_config16(bios_device.dev, offs, M.x86.R_CX);
-#else					
+#else
 				rtas_pci_config_write(bios_device.puid, 2, bus,
 						      devfn, offs, M.x86.R_CX);
 #endif
@@ -502,7 +502,7 @@
 			case 0xb10d:
 #ifdef CONFIG_PCI_OPTION_ROM_RUN_YABEL
 					pci_write_config32(bios_device.dev, offs, M.x86.R_ECX);
-#else					
+#else
 				rtas_pci_config_write(bios_device.puid, 4, bus,
 						      devfn, offs, M.x86.R_ECX);
 #endif
@@ -576,7 +576,7 @@
 			int_handled = 1;
 			break;
 		case PMM_INT_NUM:
-			/* the selfdefined PMM INT number, this is called by the code in PMM struct, it 
+			/* the selfdefined PMM INT number, this is called by the code in PMM struct, it
 			 * is handled by pmm_handleInt()
 			 */
 			pmm_handleInt();

Modified: trunk/src/devices/oprom/yabel/pmm.c
==============================================================================
--- trunk/src/devices/oprom/yabel/pmm.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/yabel/pmm.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,8 +19,8 @@
 #include "device.h"
 
 /* this struct is used to remember which PMM spaces
- * have been assigned. MAX_PMM_AREAS defines how many 
- * PMM areas we can assign. 
+ * have been assigned. MAX_PMM_AREAS defines how many
+ * PMM areas we can assign.
  * All areas are assigned in PMM_CONV_SEGMENT
  */
 typedef struct {
@@ -37,7 +37,7 @@
 /* index into pmm_allocation_array */
 static u32 curr_pmm_allocation_index = 0;
 
-/* This function is used to setup the PMM struct in virtual memory 
+/* This function is used to setup the PMM struct in virtual memory
  * at a certain offset, the length of the PMM struct is returned */
 u8 pmm_setup(u16 segment, u16 offset)
 {
@@ -79,7 +79,7 @@
 	return sizeof(pmm_information_t);
 }
 
-/* handle the selfdefined interrupt, this is executed, when the PMM Entry Point 
+/* handle the selfdefined interrupt, this is executed, when the PMM Entry Point
  * is executed, it must handle all PMM requests
  */
 void pmm_handleInt()
@@ -136,7 +136,7 @@
 					 __func__, next_offset);
 			if (length == 0) {
 				/* largest possible block size requested, we have on segment
-				 * to allocate, so largest possible is segment size (0xFFFF) 
+				 * to allocate, so largest possible is segment size (0xFFFF)
 				 * minus next_offset
 				 */
 				rval = 0xFFFF - next_offset;
@@ -151,7 +151,7 @@
 				}
 				align = 1 << lsb;
 			}
-			/* always align at least to paragraph (16byte) boundary 
+			/* always align at least to paragraph (16byte) boundary
 			 * hm... since the length is always in paragraphs, we cannot
 			 * align outside of paragraphs anyway... so this check might
 			 * be unnecessary...*/

Modified: trunk/src/devices/oprom/yabel/pmm.h
==============================================================================
--- trunk/src/devices/oprom/yabel/pmm.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/yabel/pmm.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -34,7 +34,7 @@
 	u8 code[3];
 } __attribute__ ((__packed__)) pmm_information_t;
 
-/* This function is used to setup the PMM struct in virtual memory 
+/* This function is used to setup the PMM struct in virtual memory
  * at a certain offset */
 u8 pmm_setup(u16 segment, u16 offset);
 

Modified: trunk/src/devices/oprom/yabel/vbe.c
==============================================================================
--- trunk/src/devices/oprom/yabel/vbe.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/oprom/yabel/vbe.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -796,7 +796,7 @@
 
 	mode_info.video_mode = (1 << 14) | CONFIG_FRAMEBUFFER_VESA_MODE;
 	vbe_get_mode_info(&mode_info);
-	unsigned char *framebuffer = 
+	unsigned char *framebuffer =
 		(unsigned char *) le32_to_cpu(mode_info.vesa.phys_base_ptr);
 	DEBUG_PRINTF_VBE("FRAMEBUFFER: 0x%08x\n", framebuffer);
 	vbe_set_mode(&mode_info);
@@ -807,9 +807,9 @@
 	/* Switching Intel IGD to 1MB video memory will break this. Who
 	 * cares. */
 	// int imagesize = 1024*768*2;
-	
+
 	unsigned char *jpeg = cbfs_find_file("bootsplash.jpg", CBFS_TYPE_BOOTSPLASH);
-	if (!jpeg) { 
+	if (!jpeg) {
 		DEBUG_PRINTF_VBE("Could not find bootsplash.jpg\n");
 		return;
 	}

Modified: trunk/src/devices/pci_device.c
==============================================================================
--- trunk/src/devices/pci_device.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/pci_device.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1187,7 +1187,7 @@
 
 #if CONFIG_PC80_SYSTEM == 1
 /**
- * 
+ *
  * @brief Assign IRQ numbers
  *
  * This function assigns IRQs for all functions contained within the indicated
@@ -1199,8 +1199,8 @@
  * @param bus
  * @param slot
  * @param pIntAtoD is an array of IRQ #s that are assigned to PINTA through
- *        PINTD of this slot.  The particular irq #s that are passed in 
- *        depend on the routing inside your southbridge and on your 
+ *        PINTD of this slot.  The particular irq #s that are passed in
+ *        depend on the routing inside your southbridge and on your
  *        motherboard.
  */
 void pci_assign_irqs(unsigned bus, unsigned slot,
@@ -1229,7 +1229,7 @@
 		printk(BIOS_DEBUG, "Assigning IRQ %d to %d:%x.%d\n",
 			irq, bus, slot, funct);
 
-		pci_write_config8(pdev, PCI_INTERRUPT_LINE, 
+		pci_write_config8(pdev, PCI_INTERRUPT_LINE,
 			pIntAtoD[line - 1]);
 
 #ifdef PARANOID_IRQ_ASSIGNMENTS

Modified: trunk/src/devices/pci_rom.c
==============================================================================
--- trunk/src/devices/pci_rom.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/pci_rom.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -87,7 +87,7 @@
 		    rom_data->class_hi, rom_data->class_lo,
 		    rom_data->type);
 	if (dev->class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {
-		printk(BIOS_DEBUG, "Class Code mismatch ROM %08x, dev %08x\n", 
+		printk(BIOS_DEBUG, "Class Code mismatch ROM %08x, dev %08x\n",
 			     (rom_data->class_hi << 8) | rom_data->class_lo,
 			     dev->class);
 		//return NULL;

Modified: trunk/src/devices/pciexp_device.c
==============================================================================
--- trunk/src/devices/pciexp_device.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/pciexp_device.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -46,8 +46,8 @@
 #endif
 }
 
-unsigned int pciexp_scan_bus(struct bus *bus, 
-	unsigned min_devfn, unsigned max_devfn, 
+unsigned int pciexp_scan_bus(struct bus *bus,
+	unsigned min_devfn, unsigned max_devfn,
 	unsigned int max)
 {
 	device_t child;

Modified: trunk/src/devices/pcix_device.c
==============================================================================
--- trunk/src/devices/pcix_device.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/pcix_device.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -86,12 +86,12 @@
 	static const char pcix_266mhz[] = "266MHz PCI-X";
 	static const char pcix_533mhz[] = "533MHZ PCI-X";
 	static const char unknown[] = "Unknown";
-		
+
 	const char *result;
 	result = unknown;
 	switch(PCI_X_SSTATUS_MFREQ(sstatus)) {
-	case PCI_X_SSTATUS_CONVENTIONAL_PCI:	
-		result = conventional; 
+	case PCI_X_SSTATUS_CONVENTIONAL_PCI:
+		result = conventional;
 		break;
 	case PCI_X_SSTATUS_MODE1_66MHZ:
 		result = pcix_66mhz;
@@ -99,17 +99,17 @@
 	case PCI_X_SSTATUS_MODE1_100MHZ:
 		result = pcix_100mhz;
 		break;
-		
+
 	case PCI_X_SSTATUS_MODE1_133MHZ:
 		result = pcix_133mhz;
 		break;
-		
+
 	case PCI_X_SSTATUS_MODE2_266MHZ_REF_66MHZ:
 	case PCI_X_SSTATUS_MODE2_266MHZ_REF_100MHZ:
 	case PCI_X_SSTATUS_MODE2_266MHZ_REF_133MHZ:
 		result = pcix_266mhz;
 		break;
-		
+
 	case PCI_X_SSTATUS_MODE2_533MHZ_REF_66MHZ:
 	case PCI_X_SSTATUS_MODE2_533MHZ_REF_100MHZ:
 	case PCI_X_SSTATUS_MODE2_533MHZ_REF_133MHZ:

Modified: trunk/src/devices/pnp_device.c
==============================================================================
--- trunk/src/devices/pnp_device.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/pnp_device.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -172,11 +172,11 @@
 	unsigned moving, gran, step;
 
 	resource = new_resource(dev, index);
-	
+
 	/* Initilize the resource */
 	resource->limit = 0xffff;
 	resource->flags |= IORESOURCE_IO;
-	
+
 	/* Get the resource size */
 	moving = info->mask;
 	gran = 15;
@@ -259,9 +259,9 @@
 		resource->size = 1;
 		resource->flags |= IORESOURCE_IRQ;
 	}
-} 
+}
 
-void pnp_enable_devices(device_t base_dev, struct device_operations *ops, 
+void pnp_enable_devices(device_t base_dev, struct device_operations *ops,
 	unsigned functions, struct pnp_info *info)
 {
 	struct device_path path;
@@ -270,7 +270,7 @@
 
 	path.type       = DEVICE_PATH_PNP;
 	path.pnp.port = base_dev->path.pnp.port;
-	
+
 	/* Setup the ops and resources on the newly allocated devices */
 	for(i = 0; i < functions; i++) {
 		/* Skip logical devices this Super I/O doesn't have. */
@@ -279,9 +279,9 @@
 
 		path.pnp.device = info[i].function;
 		dev = alloc_find_dev(base_dev->bus, &path);
-		
+
 		/* Don't initialize a device multiple times */
-		if (dev->ops) 
+		if (dev->ops)
 			continue;
 
 		if (info[i].ops == 0) {

Modified: trunk/src/devices/root_device.c
==============================================================================
--- trunk/src/devices/root_device.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/devices/root_device.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -27,7 +27,7 @@
 #include <device/pci.h>
 #include <reset.h>
 
-/** 
+/**
  * Read the resources for the root device,
  * that encompass the resources for the entire system.
  * @param root Pointer to the device structure for the system root device
@@ -54,9 +54,9 @@
  *
  * The enumeration of certain buses is purely static. The existence of
  * devices on those buses can be completely determined at compile time
- * and is specified in the config file. Typical examples are the 'PNP' 
- * devices on a legacy ISA/LPC bus. There is no need of probing of any kind, 
- * the only thing we have to do is to walk through the bus and 
+ * and is specified in the config file. Typical examples are the 'PNP'
+ * devices on a legacy ISA/LPC bus. There is no need of probing of any kind,
+ * the only thing we have to do is to walk through the bus and
  * enable or disable devices as indicated in the config file.
  *
  * On the other hand, some devices are virtual and their existence is
@@ -93,7 +93,7 @@
 				child->ops->enable(child);
 			}
  			if (child->path.type == DEVICE_PATH_I2C) {
- 				printk(BIOS_DEBUG, "smbus: %s[%d]->",  
+ 				printk(BIOS_DEBUG, "smbus: %s[%d]->",
 					dev_path(child->bus->dev), child->bus->link );
 			}
 			printk(BIOS_DEBUG, "%s %s\n",

Modified: trunk/src/drivers/ati/ragexl/atyfb.h
==============================================================================
--- trunk/src/drivers/ati/ragexl/atyfb.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/ati/ragexl/atyfb.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 /*
  *  ATI Frame Buffer Device Driver Core Definitions
  */
-	
+
 #define PLL_CRTC_DECODE 0
 
 #define EINVAL -1

Modified: trunk/src/drivers/ati/ragexl/fb.h
==============================================================================
--- trunk/src/drivers/ati/ragexl/fb.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/ati/ragexl/fb.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -119,7 +119,7 @@
 	u32 smem_len;			/* Length of frame buffer mem */
 	u32 type;			/* see FB_TYPE_*		*/
 	u32 type_aux;			/* Interleave for interleaved Planes */
-	u32 visual;			/* see FB_VISUAL_*		*/ 
+	u32 visual;			/* see FB_VISUAL_*		*/
 	u16 xpanstep;			/* zero if no hardware panning  */
 	u16 ypanstep;			/* zero if no hardware panning  */
 	u16 ywrapstep;		/* zero if no hardware ywrap    */
@@ -142,8 +142,8 @@
 struct fb_bitfield {
 	u32 offset;			/* beginning of bitfield	*/
 	u32 length;			/* length of bitfield		*/
-	u32 msb_right;		/* != 0 : Most significant bit is */ 
-					/* right */ 
+	u32 msb_right;		/* != 0 : Most significant bit is */
+					/* right */
 };
 
 #define FB_NONSTD_HAM		1	/* Hold-And-Modify (HAM)        */
@@ -191,7 +191,7 @@
 	struct fb_bitfield red;		/* bitfield in fb mem if true color, */
 	struct fb_bitfield green;	/* else only length is significant */
 	struct fb_bitfield blue;
-	struct fb_bitfield transp;	/* transparency			*/	
+	struct fb_bitfield transp;	/* transparency			*/
 
 	u32 nonstd;			/* != 0 Non standard pixel format */
 
@@ -326,7 +326,7 @@
    devfs_handle_t devfs_handle;         /* Devfs handle for new name         */
    devfs_handle_t devfs_lhandle;        /* Devfs handle for compat. symlink  */
    int (*changevar)(int);               /* tell console var has changed */
-   int (*switch_con)(int, struct fb_info*); 
+   int (*switch_con)(int, struct fb_info*);
                                         /* tell fb to switch consoles */
    int (*updatevar)(int, struct fb_info*);
                                         /* tell fb to update the vars */
@@ -338,7 +338,7 @@
                                            the cursor's color for non
                                            palette mode */
    /* From here on everything is device dependent */
-   void *par;   
-};  
+   void *par;
+};
 
 #endif /* _LINUX_FB_H */

Modified: trunk/src/drivers/ati/ragexl/fbcon.h
==============================================================================
--- trunk/src/drivers/ati/ragexl/fbcon.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/ati/ragexl/fbcon.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -16,7 +16,7 @@
     struct fb_var_screeninfo var;   /* variable infos. yoffset and vmode */
                                     /* are updated by fbcon.c */
     struct fb_cmap cmap;            /* colormap */
-    char *screen_base;              /* pointer to top of virtual screen */    
+    char *screen_base;              /* pointer to top of virtual screen */
                                     /* (virtual address) */
     int visual;
     int type;                       /* see FB_TYPE_* */
@@ -96,11 +96,11 @@
 	((s) & 0x400)
 #define attr_blink(p,s) \
 	((s) & 0x8000)
-	
+
     /*
      *  Scroll Method
      */
-     
+
 /* Internal flags */
 #define __SCROLL_YPAN		0x001
 #define __SCROLL_YWRAP		0x002

Modified: trunk/src/drivers/ati/ragexl/mach64.h
==============================================================================
--- trunk/src/drivers/ati/ragexl/mach64.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/ati/ragexl/mach64.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
  *  written with much help from Jon Howell
  *
  * Updated for 3D RAGE PRO and 3D RAGE Mobility by Geert Uytterhoeven
- *	
+ *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
  * as published by the Free Software Foundation; either version

Modified: trunk/src/drivers/ati/ragexl/mach64_ct.c
==============================================================================
--- trunk/src/drivers/ati/ragexl/mach64_ct.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/ati/ragexl/mach64_ct.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
 #if 0
 #define FAIL(x) do { printk(BIOS_DEBUG, x); return -EINVAL; } while (0)
 #else
-#define FAIL(x) 
+#define FAIL(x)
 #endif
 
 static int aty_valid_pll_ct(const struct fb_info_aty *info, u32 vclk_per,
@@ -34,7 +34,7 @@
 #if DEBUG_PLL==1
     printk(BIOS_DEBUG, "aty_dsp_gt : mclk_fb_mult=%d\n", pll->mclk_fb_mult);
 #endif
-    
+
     /* (64*xclk/vclk/bpp)<<11 = xclocks_per_row<<11 */
     xclks_per_row = ((u32)pll->mclk_fb_mult * (u32)pll->mclk_fb_div *
 		     (u32)pll->vclk_post_div_real * 64) << 11;
@@ -98,11 +98,11 @@
     t_rp  = ((memcntl >>  8) & 0x03) + 1;
     t_ras = ((memcntl >> 16) & 0x07) + 1;
     t_lat =  (memcntl >>  4) & 0x03;
-    
+
     t_pfc = t_rp + t_rcd + t_crd;
 
     t_rcc = max(t_rp + t_ras, t_pfc + n);
-    
+
     /* fifo_on<<6 */
     fifo_on = (2 * t_rcc + t_pfc + n - 1) << 6;
 
@@ -125,9 +125,9 @@
     int pllmclk, pllsclk;
 #endif
     u32 q;
-    
+
     pll->pll_ref_div = info->pll_per*2*255/info->ref_clk_per;
-    
+
     /* FIXME: use the VTB/GTB /3 post divider if it's better suited */
 
     /* actually 8*q */
@@ -145,14 +145,14 @@
 	pll->mclk_post_div_real = 1;
     pll->sclk_fb_div = q*pll->mclk_post_div_real/8;
 
-#if DEBUG_PLL==1    
+#if DEBUG_PLL==1
     pllsclk = (1000000 * 2 * pll->sclk_fb_div) /
 	    (info->ref_clk_per * pll->pll_ref_div);
 
     printk(BIOS_DEBUG, "aty_valid_pll_ct: pllsclk=%d MHz, mclk=%d MHz\n",
 	   pllsclk, pllsclk / pll->mclk_post_div_real);
 #endif
-    
+
     pll->mclk_fb_mult = M64_HAS(MFB_TIMES_4) ? 4 : 2;
 
     /* actually 8*q */
@@ -177,7 +177,7 @@
     printk(BIOS_DEBUG, "aty_valid_pll_ct: pllmclk=%d MHz, xclk=%d MHz\n",
 	   pllmclk, pllmclk / pll->xclk_post_div_real);
 #endif
-    
+
     /* FIXME: use the VTB/GTB /{3,6,12} post dividers if they're better suited */
     q = info->ref_clk_per*pll->pll_ref_div*4/vclk_per;	/* actually 8*q */
     if (q < 16*8 || q > 255*8)
@@ -199,7 +199,7 @@
     u8 xpostdiv = 0;
     u8 mpostdiv = 0;
     u8 vpostdiv = 0;
-    
+
     if (M64_HAS(SDRAM_MAGIC_PLL) && (info->ram_type >= SDRAM))
 	    pll->pll_gen_cntl = 0x64; /* mclk = sclk */
     else
@@ -221,7 +221,7 @@
     }
 
     pll->spll_cntl2 = mpostdiv << 4; /* sclk == pllsclk / mpostdiv */
-    
+
     switch (pll->xclk_post_div_real) {
 	case 1:
 	    xpostdiv = 0;
@@ -316,12 +316,12 @@
 
     aty_st_pll(PLL_EXT_CNTL, pll->ct.pll_ext_cntl, info);
     aty_st_pll(MCLK_FB_DIV, pll->ct.mclk_fb_div, info); // for XCLK
-    
+
     aty_st_pll(SPLL_CNTL2, pll->ct.spll_cntl2, info);
     aty_st_pll(SCLK_FB_DIV, pll->ct.sclk_fb_div, info); // for MCLK
 
     aty_st_pll(PLL_GEN_CNTL, pll->ct.pll_gen_cntl, info);
-    
+
     aty_st_pll(EXT_VPLL_CNTL, 0, info);
     aty_st_pll(PLL_VCLK_CNTL, pll->ct.pll_vclk_cntl, info);
     aty_st_pll(VCLK_POST_DIV, pll->ct.vclk_post_div, info);

Modified: trunk/src/drivers/ati/ragexl/xlinit.c
==============================================================================
--- trunk/src/drivers/ati/ragexl/xlinit.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/ati/ragexl/xlinit.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -96,7 +96,7 @@
 		0x10, 0x19
 	}
 };
-	  
+
 typedef struct {
 	u8 lcd_reg;
 	u32 val;
@@ -202,7 +202,7 @@
 	u32 temp;
 	union aty_pll pll;
 	const struct xl_card_cfg_t * card = &card_cfg[xl_card];
-	
+
 	aty_st_8(CONFIG_STAT0, 0x85, info);
 	mdelay(10);
 
@@ -222,7 +222,7 @@
 		info->features &= ~M64F_MFB_TIMES_4;
 	}
 #endif
-	
+
 	/*
 	 * Calculate mclk and xclk dividers, etc. The passed
 	 * pixclock and bpp values don't matter yet, the vclk
@@ -243,7 +243,7 @@
 	aty_st_pll(PLL_EXT_CNTL, pll.ct.pll_ext_cntl, info);
 	aty_st_pll(SPLL_CNTL2, 0x03, info);
 	aty_st_pll(PLL_GEN_CNTL, 0x44, info);
-	
+
 	reset_clocks(info, &pll.ct, 0);
 	mdelay(10);
 
@@ -302,7 +302,7 @@
 	aty_st_8(LCD_INDEX, 0x08, info);
 	aty_st_8(LCD_DATA, 0x0B, info);
 	mdelay(2);
-	
+
 	// enable display requests, enable CRTC
 	aty_st_8(CRTC_GEN_CNTL+3, 0x02, info);
 	// disable display
@@ -482,7 +482,7 @@
         info->mem_refresh_rate = i;
 }
 #endif /*CONFIG_CONSOLE_BTEXT */
-static void ati_ragexl_init(device_t dev) 
+static void ati_ragexl_init(device_t dev)
 {
         u32 chip_id;
     	int j;
@@ -513,9 +513,9 @@
 #endif /*CONFIG_CONSOLE_BTEXT==1 */
 
         struct fb_info_aty *info;
-        struct fb_info_aty info_t; 
-        struct resource *res; 
-        info = &info_t; 
+        struct fb_info_aty info_t;
+        struct resource *res;
+        info = &info_t;
 
 #define USE_AUX_REG 1
 
@@ -529,12 +529,12 @@
 	info->frame_buffer = res->base;
 #endif /* CONFIG_CONSOLE_BTEXT */
 
-#if USE_AUX_REG==0   
+#if USE_AUX_REG==0
         info->ati_regbase = res->base+0x7ff000+0xc00;
-#else 
+#else
         res = &dev->resource[2];
         if(res->flags & IORESOURCE_MEM) {
-                info->ati_regbase = res->base+0x400; //using auxiliary register 
+                info->ati_regbase = res->base+0x400; //using auxiliary register
         }
 
 #endif
@@ -570,7 +570,7 @@
         	/* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
         	if (mclk == 67 && info->ram_type < SDRAM)
             		mclk = 63;
-    	}   
+    	}
 #endif
 #if CONFIG_CONSOLE_BTEXT==1
         aty_calc_mem_refresh(info, type, xclk);
@@ -583,14 +583,14 @@
 //        info->dac_ops = &aty_dac_ct;
 //        info->pll_ops = &aty_pll_ct;
         info->bus_type = PCI;
-	
+
 
 	atyfb_xl_init(info);
 
 #if CONFIG_CONSOLE_BTEXT==1
 
 	info->ram_type = (aty_ld_le32(CONFIG_STAT0, info) & 0x07);
-	
+
         info->ref_clk_per = 1000000000000ULL/14318180;
     	xtal = "14.31818";
 #if 0
@@ -719,7 +719,7 @@
     }
 
     if (atyfb_decode_var(&var, &info->default_par, info)) {
-#if 0	
+#if 0
         printk(BIOS_DEBUG, "atyfb: can't set default video mode\n");
 #endif
         return ;
@@ -779,7 +779,7 @@
 #endif
 
  btext_clearscreen();
- 
+
  map_boot_text();
 
 #if 0
@@ -791,7 +791,7 @@
 #endif
 
 #endif /* CONFIG_CONSOLE_BTEXT */
-	
+
 }
 
 #if CONFIG_CONSOLE_BTEXT==1
@@ -856,13 +856,13 @@
 static int aty_var_to_crtc(const struct fb_info_aty *info,
                            const struct fb_var_screeninfo *var,
                            struct crtc *crtc)
-{       
+{
     u32 xres, yres, vxres, vyres, xoffset, yoffset, bpp;
     u32 left, right, upper, lower, hslen, vslen, sync, vmode;
     u32 h_total, h_disp, h_sync_strt, h_sync_dly, h_sync_wid, h_sync_pol;
     u32 v_total, v_disp, v_sync_strt, v_sync_wid, v_sync_pol, c_sync;
     u32 pix_width, dp_pix_width, dp_chain_mask;
-        
+
     /* input */
     xres = var->xres;
     yres = var->yres;
@@ -877,9 +877,9 @@
     lower = var->lower_margin;
     hslen = var->hsync_len;
     vslen = var->vsync_len;
-    sync = var->sync; 
+    sync = var->sync;
     vmode = var->vmode;
-        
+
     /* convert (and round up) and validate */
     xres = (xres+7) & ~7;
     xoffset = (xoffset+7) & ~7;
@@ -887,7 +887,7 @@
     if (vxres < xres+xoffset)
         vxres = xres+xoffset;
     h_disp = xres/8-1;
-    if (h_disp > 0xff) 
+    if (h_disp > 0xff)
         FAIL("h_disp too large");
     h_sync_strt = h_disp+(right/8);
     if (h_sync_strt > 0x1ff)
@@ -924,7 +924,7 @@
         pix_width = CRTC_PIX_WIDTH_8BPP;
         dp_pix_width = HOST_8BPP | SRC_8BPP | DST_8BPP | BYTE_ORDER_LSB_TO_MSB;
         dp_chain_mask = 0x8080;
-    } 
+    }
 #if SUPPORT_8_BPP_ABOVE==1
    else if (bpp <= 16) {
         bpp = 16;
@@ -943,7 +943,7 @@
         dp_pix_width = HOST_32BPP | SRC_32BPP | DST_32BPP |
                        BYTE_ORDER_LSB_TO_MSB;
         dp_chain_mask = 0x8080;
-    } 
+    }
 #endif
 else
         FAIL("invalid bpp");
@@ -1123,7 +1123,7 @@
     fix->smem_start = info->frame_buffer;
     fix->smem_len = (u32)info->total_vram;
 
-    /* 
+    /*
      *  Reg Block 0 (CT-compatible block) is at ati_regbase_phys
      *  Reg Block 1 (multimedia extensions) is at ati_regbase_phys-0x400
      */
@@ -1158,11 +1158,11 @@
 #endif
    /*
      *  Set the User Defined Part of the Display
-     */ 
-#if PLL_CRTC_DECODE==1    
+     */
+#if PLL_CRTC_DECODE==1
 static int atyfb_set_var(struct fb_var_screeninfo *var, int con,
                          struct fb_info *fb)
-{                        
+{
     struct fb_info_aty *info = (struct fb_info_aty *)fb;
     struct atyfb_par par;
 #if 0
@@ -1171,8 +1171,8 @@
 #endif
     int err;
     int activate = var->activate;
-   
-#if 0 
+
+#if 0
     if (con >= 0)
         display = &fb_display[con];
     else
@@ -1180,13 +1180,13 @@
 #if 0
         display = fb->disp;     /* used during initialization */
 #endif
-        
+
     if ((err = atyfb_decode_var(var, &par, info)))
         return err;
-        
+
     atyfb_encode_var(var, &par, (struct fb_info_aty *)info);
-   
-#if 0 
+
+#if 0
     printk(BIOS_INFO, "atyfb_set_var: activate=%d\n", activate & FB_ACTIVATE_MASK);
 #endif
 
@@ -1262,7 +1262,7 @@
 
 #if PLL_CRTC_DECODE==1
     info->current_par = *par;
-#endif 
+#endif
 
     if (info->blitter_may_be_busy)
         wait_for_idle(info);
@@ -1344,7 +1344,7 @@
 
 }
 #if 0
-static u16 red2[] = { 
+static u16 red2[] = {
     0x0000, 0xaaaa
 };
 static u16 green2[] = {
@@ -1356,14 +1356,14 @@
 
 static u16 red4[] = {
     0x0000, 0xaaaa, 0x5555, 0xffff
-};      
+};
 static u16 green4[] = {
     0x0000, 0xaaaa, 0x5555, 0xffff
-};      
+};
 static u16 blue4[] = {
     0x0000, 0xaaaa, 0x5555, 0xffff
-};      
- 
+};
+
 static u16 red8[] = {
     0x0000, 0x0000, 0x0000, 0x0000, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa
 };
@@ -1405,12 +1405,12 @@
 
 static int atyfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
                            u_int transp, struct fb_info_aty *info)
-{                          
+{
     int i, scale;
-    
+
     if (regno > 255)
         return 1;
-    red >>= 8; 
+    red >>= 8;
     green >>= 8;
     blue >>= 8;
 #if 0
@@ -1418,7 +1418,7 @@
     info->palette[regno].red = red;
     info->palette[regno].green = green;
     info->palette[regno].blue = blue;
-#endif 
+#endif
     i = aty_ld_8(DAC_CNTL, info) & 0xfc;
     if (M64_HAS(EXTRA_BRIGHT))
         i |= 0x2;       /*DAC_CNTL|0x2 turns off the extra brightness for gt*/
@@ -1440,11 +1440,11 @@
                 int (*setcolreg)(u_int, u_int, u_int, u_int, u_int,
                                  struct fb_info_aty *),
                 struct fb_info_aty *info)
-{   
+{
     int i, start;
     u16 *red, *green, *blue, *transp;
     u_int hred, hgreen, hblue, htransp;
-    
+
     red = cmap->red;
     green = cmap->green;
     blue = cmap->blue;
@@ -1480,13 +1480,13 @@
         return &default_8_colors;
 #endif
     return &default_16_colors;
-}   
+}
 
 static void do_install_cmap(int con, struct fb_info_aty *info)
 {
 #if PLL_CRTC_DECODE==1
         int size = info->current_par.crtc.bpp == 16 ? 32 : 256;
-#else 
+#else
 	int size = 256;
 #endif
         fb_set_cmap(fb_default_cmap(size), 1, atyfb_setcolreg, info);

Modified: trunk/src/drivers/emulation/qemu/fb.h
==============================================================================
--- trunk/src/drivers/emulation/qemu/fb.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/emulation/qemu/fb.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -119,7 +119,7 @@
 	u32 smem_len;			/* Length of frame buffer mem */
 	u32 type;			/* see FB_TYPE_*		*/
 	u32 type_aux;			/* Interleave for interleaved Planes */
-	u32 visual;			/* see FB_VISUAL_*		*/ 
+	u32 visual;			/* see FB_VISUAL_*		*/
 	u16 xpanstep;			/* zero if no hardware panning  */
 	u16 ypanstep;			/* zero if no hardware panning  */
 	u16 ywrapstep;		/* zero if no hardware ywrap    */
@@ -142,8 +142,8 @@
 struct fb_bitfield {
 	u32 offset;			/* beginning of bitfield	*/
 	u32 length;			/* length of bitfield		*/
-	u32 msb_right;		/* != 0 : Most significant bit is */ 
-					/* right */ 
+	u32 msb_right;		/* != 0 : Most significant bit is */
+					/* right */
 };
 
 #define FB_NONSTD_HAM		1	/* Hold-And-Modify (HAM)        */
@@ -191,7 +191,7 @@
 	struct fb_bitfield red;		/* bitfield in fb mem if true color, */
 	struct fb_bitfield green;	/* else only length is significant */
 	struct fb_bitfield blue;
-	struct fb_bitfield transp;	/* transparency			*/	
+	struct fb_bitfield transp;	/* transparency			*/
 
 	u32 nonstd;			/* != 0 Non standard pixel format */
 
@@ -326,7 +326,7 @@
    devfs_handle_t devfs_handle;         /* Devfs handle for new name         */
    devfs_handle_t devfs_lhandle;        /* Devfs handle for compat. symlink  */
    int (*changevar)(int);               /* tell console var has changed */
-   int (*switch_con)(int, struct fb_info*); 
+   int (*switch_con)(int, struct fb_info*);
                                         /* tell fb to switch consoles */
    int (*updatevar)(int, struct fb_info*);
                                         /* tell fb to update the vars */
@@ -338,7 +338,7 @@
                                            the cursor's color for non
                                            palette mode */
    /* From here on everything is device dependent */
-   void *par;   
-};  
+   void *par;
+};
 
 #endif /* _LINUX_FB_H */

Modified: trunk/src/drivers/emulation/qemu/fbcon.h
==============================================================================
--- trunk/src/drivers/emulation/qemu/fbcon.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/emulation/qemu/fbcon.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
     struct fb_var_screeninfo var;   /* variable infos. yoffset and vmode */
                                     /* are updated by fbcon.c */
     struct fb_cmap cmap;            /* colormap */
-    char *screen_base;              /* pointer to top of virtual screen */    
+    char *screen_base;              /* pointer to top of virtual screen */
                                     /* (virtual address) */
     int visual;
     int type;                       /* see FB_TYPE_* */
@@ -108,11 +108,11 @@
 	((s) & 0x400)
 #define attr_blink(p,s) \
 	((s) & 0x8000)
-	
+
     /*
      *  Scroll Method
      */
-     
+
 /* Internal flags */
 #define __SCROLL_YPAN		0x001
 #define __SCROLL_YWRAP		0x002

Modified: trunk/src/drivers/emulation/qemu/init.c
==============================================================================
--- trunk/src/drivers/emulation/qemu/init.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/emulation/qemu/init.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -57,7 +57,7 @@
     int width=640, height=480, depth=8;
 
     printk(BIOS_DEBUG, "Initializing VGA!\n");
-    
+
     vbe_outw(VBE_DISPI_INDEX_XRES, width);
     vbe_outw(VBE_DISPI_INDEX_YRES, height);
     vbe_outw(VBE_DISPI_INDEX_BPP, depth);

Modified: trunk/src/drivers/generic/debug/debug_dev.c
==============================================================================
--- trunk/src/drivers/generic/debug/debug_dev.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/generic/debug/debug_dev.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -16,7 +16,7 @@
 
       for(i=0;i<256;i++) {
 	      byte = pci_read_config8(dev, i);
-   
+
 	      if((i & 0xf)==0) printk(BIOS_DEBUG, "\n%02x:",i);
 	      printk(BIOS_DEBUG, " %02x",byte);
       }
@@ -51,7 +51,7 @@
 				if(!dev->enabled) {
 					continue;
 				}
-			        printk(BIOS_DEBUG, "\n%02x:%02x:%02x aka %s", 
+			        printk(BIOS_DEBUG, "\n%02x:%02x:%02x aka %s",
 					bus, device, function, dev_path(dev));
 				print_pci_regs(dev);
 			}
@@ -83,7 +83,7 @@
 
 }
 static void print_smbus_regs(struct device *dev)
-{               
+{
 	int j;
 	printk(BIOS_DEBUG, "smbus: %s[%d]->", dev_path(dev->bus->dev), dev->bus->link);
 	printk(BIOS_DEBUG, "%s", dev_path(dev));
@@ -97,7 +97,7 @@
 		}
                 if ((j & 0xf) == 0) {
                         printk(BIOS_DEBUG, "\n%02x: ", j);
-                }  
+                }
 		byte = status & 0xff;
 		printk(BIOS_DEBUG, "%02x ", byte);
 	}
@@ -113,12 +113,12 @@
 		// Here don't need to call smbus_set_link, because we scan it from top to down
 		if( dev->bus->dev->path.type == DEVICE_PATH_I2C) { // it's under i2c MUX so set mux at first
 			if(ops_smbus_bus(get_pbus_smbus(dev->bus->dev))) {
-				if(dev->bus->dev->ops && dev->bus->dev->ops->set_link) 
+				if(dev->bus->dev->ops && dev->bus->dev->ops->set_link)
 					dev->bus->dev->ops->set_link(dev->bus->dev, dev->bus->link);
 			}
 		}
-		
-		if(ops_smbus_bus(get_pbus_smbus(dev))) print_smbus_regs(dev);	
+
+		if(ops_smbus_bus(get_pbus_smbus(dev))) print_smbus_regs(dev);
 	}
 
 	for(i=0; i< dev->links; i++) {
@@ -142,7 +142,7 @@
         printk(BIOS_DEBUG, "cpuid[%08x]: %08x %08x %08x %08x\n",
                 index, eax, ebx, ecx, edx);
 
-        printk(BIOS_DEBUG, "core number %d\n", ecx & 0xff);   
+        printk(BIOS_DEBUG, "core number %d\n", ecx & 0xff);
 
         index = 0xc001001f;
         printk(BIOS_DEBUG, "Reading msr: 0x%08x\n", index);
@@ -217,7 +217,7 @@
 }
 
 static void print_tsc(void) {
-	
+
 	tsc_t tsc;
 	tsc = rdtsc();
         printk(BIOS_DEBUG, "tsc: 0x%08x%08x\n",
@@ -245,29 +245,29 @@
 			printk(BIOS_DEBUG, "\n");
 		}
 		break;
-		
+
 	case 1:
 		print_pci_regs_all();
 		break;
-	case 2: 
+	case 2:
 		print_mem();
 		break;
 	case 3:
 		print_cpuid();
 		break;
-	case 4: 
+	case 4:
 		print_smbus_regs_all(&dev_root);
 		break;
-        case 5: 
+        case 5:
                 print_msr_dualcore();
                 break;
-	case 6: 
+	case 6:
 		print_cache_size();
 		break;
 	case 7:
 		print_tsc();
 		break;
-	case 8: 
+	case 8:
 		hard_reset();
 		break;
 	}
@@ -291,5 +291,5 @@
 
 struct chip_operations drivers_generic_debug_ops = {
 	CHIP_NAME("Debug device")
-	.enable_dev = enable_dev, 
+	.enable_dev = enable_dev,
 };

Modified: trunk/src/drivers/i2c/adm1026/adm1026.c
==============================================================================
--- trunk/src/drivers/i2c/adm1026/adm1026.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/i2c/adm1026/adm1026.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -27,10 +27,10 @@
 	if (dev->enabled && dev->path.type == DEVICE_PATH_I2C)
 	{
 		if(ops_smbus_bus(get_pbus_smbus(dev))) {
-			if( dev->bus->dev->path.type == DEVICE_PATH_I2C) smbus_set_link(dev); // it is under mux 
+			if( dev->bus->dev->path.type == DEVICE_PATH_I2C) smbus_set_link(dev); // it is under mux
 			adm1026_enable_monitoring(dev);
 		}
-		
+
 	}
 
 }
@@ -65,5 +65,5 @@
 
 struct chip_operations drivers_i2c_adm1026_ops = {
 	CHIP_NAME("adm1026")
-	.enable_dev = enable_dev, 
+	.enable_dev = enable_dev,
 };

Modified: trunk/src/drivers/i2c/adm1027/adm1027.c
==============================================================================
--- trunk/src/drivers/i2c/adm1027/adm1027.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/i2c/adm1027/adm1027.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -44,7 +44,7 @@
 	if (dev->enabled && dev->path.type == DEVICE_PATH_I2C) {
 		if (ops_smbus_bus(get_pbus_smbus(dev))) {
 			if (dev->bus->dev->path.type == DEVICE_PATH_I2C)
-				smbus_set_link(dev);	// it is under mux 
+				smbus_set_link(dev);	// it is under mux
 			adm1027_enable_monitoring(dev);
 		}
 

Modified: trunk/src/drivers/i2c/i2cmux/i2cmux.c
==============================================================================
--- trunk/src/drivers/i2c/i2cmux/i2cmux.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/i2c/i2cmux/i2cmux.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -15,7 +15,7 @@
 			smbus_write_byte(dev, 0x01, 1<<link); // output value
 			smbus_write_byte(dev, 0x03, 0); // all output
 		}
-		
+
 	}
 
 }
@@ -40,5 +40,5 @@
 
 struct chip_operations drivers_i2c_i2cmux_ops = {
 	CHIP_NAME("i2cmux")
-	.enable_dev = enable_dev, 
+	.enable_dev = enable_dev,
 };

Modified: trunk/src/drivers/i2c/i2cmux2/i2cmux2.c
==============================================================================
--- trunk/src/drivers/i2c/i2cmux2/i2cmux2.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/i2c/i2cmux2/i2cmux2.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -14,7 +14,7 @@
 		if(ops_smbus_bus(get_pbus_smbus(dev))) {
 			smbus_send_byte(dev, link); // output value
 		}
-		
+
 	}
 
 }
@@ -39,5 +39,5 @@
 
 struct chip_operations drivers_i2c_i2cmux2_ops = {
 	CHIP_NAME("i2cmux2")
-	.enable_dev = enable_dev, 
+	.enable_dev = enable_dev,
 };

Modified: trunk/src/drivers/i2c/lm63/lm63.c
==============================================================================
--- trunk/src/drivers/i2c/lm63/lm63.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/i2c/lm63/lm63.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -14,13 +14,13 @@
 	if (dev->enabled && dev->path.type == DEVICE_PATH_I2C)
 	{
 		if(ops_smbus_bus(get_pbus_smbus(dev))) {
-			if( dev->bus->dev->path.type == DEVICE_PATH_I2C) smbus_set_link(dev); // it is under mux 
+			if( dev->bus->dev->path.type == DEVICE_PATH_I2C) smbus_set_link(dev); // it is under mux
 			result = smbus_read_byte(dev, 0x03);
 //			result &= ~0x04;
 			result |= 0x04;
 			smbus_write_byte(dev, 0x03, result & 0xff); // config lm63
 		}
-		
+
 	}
 
 }
@@ -42,5 +42,5 @@
 
 struct chip_operations drivers_i2c_lm63_ops = {
 	CHIP_NAME("National Semiconductor LM63")
-	.enable_dev = enable_dev, 
+	.enable_dev = enable_dev,
 };

Modified: trunk/src/drivers/si/3114/si_sata.c
==============================================================================
--- trunk/src/drivers/si/3114/si_sata.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/si/3114/si_sata.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -29,10 +29,10 @@
 
 	/* some driver change class code to 0x104, but not change deviceid without reason*/
         /* restore it so we don't need to unplug AC power to restore it*/
-	
+
 	word = pci_read_config16(dev, 0x0a);
 	if(word!=0x0180) {
-		 /* enble change device id and class id*/	
+		 /* enble change device id and class id*/
 	        dword = pci_read_config32(dev,0x40);
 	        dword |= (1<<0);
         	pci_write_config32(dev, 0x40, dword);
@@ -49,7 +49,7 @@
 
 	}
 
-	
+
 }
 static struct device_operations si_sata_ops  = {
 	.read_resources   = pci_dev_read_resources,
@@ -64,4 +64,4 @@
         .vendor = 0x1095,
         .device = 0x3114,
 };
- 
+

Modified: trunk/src/drivers/trident/blade3d/blade3d.c
==============================================================================
--- trunk/src/drivers/trident/blade3d/blade3d.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/drivers/trident/blade3d/blade3d.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -65,7 +65,7 @@
 	BYTE rMask;
 } Def_Reg_struct;
 
-typedef Def_Reg_struct* lpDef_Reg_struct; 
+typedef Def_Reg_struct* lpDef_Reg_struct;
 // , *pDef_Reg_struct, far * lpDef_Reg_struct;
 
 static Def_Reg_struct Mode3_temp[] = {	//mode3 temp
@@ -209,7 +209,7 @@
 	{Port_GRX, 0x33, 0x20, 0x00},
 	{Port_GRX, 0x30, 0x00, 0x00},
 	//
-	{Port_GRX, 0x28, 0x18, 0x00}, 
+	{Port_GRX, 0x28, 0x18, 0x00},
 
 	{Port_CRX, 0x0F, 0x20, 0x40},
 	{Port_CRX, 0x1F, 0x00, 0x00},
@@ -806,7 +806,7 @@
 	lpInit_reg = &Init_reg[0];
 
 	printk(BIOS_DEBUG, "blade3d: config_OEM_regs()\n");
-	
+
 	outp(Port_GRX, 0x24);
 	outp(Port_GRX + 1, 0xe0);
 	//MCLK VCLK to 16 bit
@@ -1025,4 +1025,4 @@
         .vendor = 0x1023,
         .device = 0x9880,
 };
- 
+

Modified: trunk/src/include/boot/coreboot_tables.h
==============================================================================
--- trunk/src/include/boot/coreboot_tables.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/boot/coreboot_tables.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -33,7 +33,7 @@
 
 /* Since coreboot is usually compiled 32bit, gcc will align 64bit
  * types to 32bit boundaries. If the coreboot table is dumped on a
- * 64bit system, a uint64_t would be aligned to 64bit boundaries, 
+ * 64bit system, a uint64_t would be aligned to 64bit boundaries,
  * breaking the table format.
  *
  * lb_uint64 will keep 64bit coreboot table values aligned to 32bit
@@ -216,7 +216,7 @@
 	uint32_t config;             /* e=enumeration, h=hex, r=reserved */
 	uint32_t config_id;          /* a number linking to an enumeration record */
 #define CMOS_MAX_NAME_LENGTH 32
-	uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii, 
+	uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,
 					       variable length int aligned */
 };
 
@@ -232,7 +232,7 @@
 	uint32_t config_id;          /* a number identifying the config id */
 	uint32_t value;              /* the value associated with the text */
 #define CMOS_MAX_TEXT_LENGTH 32
-	uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii, 
+	uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii,
 						variable length int aligned */
 };
 

Modified: trunk/src/include/boot/elf_boot.h
==============================================================================
--- trunk/src/include/boot/elf_boot.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/boot/elf_boot.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
-#ifndef ELF_BOOT_H 
-#define ELF_BOOT_H 
+#ifndef ELF_BOOT_H
+#define ELF_BOOT_H
 
 #include <stdint.h>
 
@@ -32,7 +32,7 @@
 	Elf_Half b_records;
 } Elf_Bhdr;
 
-typedef struct 
+typedef struct
 {
 	Elf_Word n_namesz;		/* Length of the note's name.  */
 	Elf_Word n_descsz;		/* Length of the note's descriptor.  */

Modified: trunk/src/include/cbfs.h
==============================================================================
--- trunk/src/include/cbfs.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/cbfs.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -84,7 +84,7 @@
 
 struct cbfs_header {
 	u32 magic;
-        u32 version; 
+        u32 version;
         u32 romsize;
         u32 bootblocksize;
 	u32 align;

Modified: trunk/src/include/console/btext.h
==============================================================================
--- trunk/src/include/console/btext.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/console/btext.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -3,7 +3,7 @@
  * (for MacOS) when it is used to boot Linux.
  *
  * Written by Benjamin Herrenschmidt.
- *  
+ *
  * Move to coreboot by LYH  yhlu at tyan.com
  *
  */

Modified: trunk/src/include/console/console.h
==============================================================================
--- trunk/src/include/console/console.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/console/console.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -30,7 +30,7 @@
 extern int console_loglevel;
 #else
 /* __PRE_RAM__ */
-/* Using a global varible can cause problems when we reset the stack 
+/* Using a global varible can cause problems when we reset the stack
  * from cache as ram to ram. If we make this a define USE_SHARED_STACK
  * we could use the same code on all architectures.
  */

Modified: trunk/src/include/console/vtxprintf.h
==============================================================================
--- trunk/src/include/console/vtxprintf.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/console/vtxprintf.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify

Modified: trunk/src/include/cpu/amd/amdk8_sysconf.h
==============================================================================
--- trunk/src/include/cpu/amd/amdk8_sysconf.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/cpu/amd/amdk8_sysconf.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -20,7 +20,7 @@
 	int apicid_offset;
 
 	void *mb; // pointer for mb releated struct
-	
+
 };
 
 extern struct amdk8_sysconf_t sysconf;

Modified: trunk/src/include/cpu/amd/gx2def.h
==============================================================================
--- trunk/src/include/cpu/amd/gx2def.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/cpu/amd/gx2def.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -284,20 +284,20 @@
 #define		SMM_INST_EN_SET					(1<<3)
 #define		INTL_SMI_EN_SET					(1<<4)
 #define		EXTL_SMI_EN_SET					(1<<5)
-	
+
 #define	CPU_FPU_MSR_MODE					0x1A00
 #define		FPU_IE_SET						(1<<0)
-	
+
 #define	CPU_FP_UROM_BIST					0x1A03
-	
+
 #define	CPU_BC_CONF_0						0x1900
 #define		TSC_SUSP_SET				 (1<<5)
 #define		SUSP_EN_SET				 (1<<12)
-	
+
 	/**/
 	/*	VG GLIU0 port4*/
 	/**/
-	
+
 #define	VG_GLD_MSR_CAP				(MSR_VG + 0x2000)
 #define	VG_GLD_MSR_CONFIG			(MSR_VG + 0x2001)
 #define	VG_GLD_MSR_PM				(MSR_VG + 0x2004)
@@ -332,7 +332,7 @@
 #define		RSTPLL_UPPER_MDIV_SHIFT				9
 #define		RSTPLL_UPPER_VDIV_SHIFT				6
 #define		RSTPLL_UPPER_FBDIV_SHIFT			0
-	
+
 #define		RSTPLL_LOWER_SWFLAGS_SHIFT			26
 #define		RSTPLL_LOWER_SWFLAGS_MASK			(0x3F<<RSTPLL_LOWER_SWFLAGS_SHIFT)
 

Modified: trunk/src/include/cpu/amd/lxdef.h
==============================================================================
--- trunk/src/include/cpu/amd/lxdef.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/cpu/amd/lxdef.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -285,11 +285,11 @@
 #define	CPU_L2TB_ENTRY						0x189E
 #define	CPU_L2TB_ENTRY_I					0x189F
 #define	CPU_DM_BIST							0x18C0
-	
+
 #define	CPU_BC_CONF_0						0x1900
 #define		TSC_SUSP_SET				 (1<<5)
 #define		SUSP_EN_SET				 (1<<12)
-	
+
 #define CPU_BC_CONF_1						0x1901
 #define CPU_BC_MSR_LOCK						0x1908
 #define CPU_BC_L2_CONF						0x1920
@@ -342,11 +342,11 @@
 #define CPU_CPUID12							0x3012
 #define CPU_CPUID13							0x3013
 
-	
+
 
 
 	/*	VG GLIU0 port4*/
-	
+
 
 #define	VG_GLD_MSR_CAP				(MSR_VG + 0x2000)
 #define	VG_GLD_MSR_CONFIG			(MSR_VG + 0x2001)

Modified: trunk/src/include/cpu/amd/sc520.h
==============================================================================
--- trunk/src/include/cpu/amd/sc520.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/cpu/amd/sc520.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,8 +2,8 @@
 /* default location of the MMCR */
 #define MMCR 0xfffef000
 
-/* the PAR register struct definition, the location in memory, 
-  * and a handy pointer for you to use 
+/* the PAR register struct definition, the location in memory,
+  * and a handy pointer for you to use
   */
 
 struct parreg {
@@ -25,7 +25,7 @@
 /* here is the real mmcr struct */
 
 struct memregs {
-	/* make these shorts, we are lsb and the hardware seems to like it 
+	/* make these shorts, we are lsb and the hardware seems to like it
 	 * better
 	 */
 	unsigned short drcctl;
@@ -46,7 +46,7 @@
 	unsigned char dbctl;
 	unsigned char pad4[15];
 };
-	
+
 struct romregs {
 	unsigned char bootcs;
 	unsigned char pad5[3];
@@ -55,7 +55,7 @@
 	unsigned char romcs2;
 	unsigned char pad7[6];
 };
-	
+
 
 struct hostbridge {
 	unsigned short ctl;
@@ -169,7 +169,7 @@
 	unsigned char pad[0x2b];
 };
 
-	
+
 /* interrupt control registers */
 /* defined this way for portability. Shame we can't just use plan 9 c. */
 struct pic {
@@ -225,7 +225,7 @@
 	unsigned char gp9imap;
 	unsigned char gp10imap;
 	unsigned char padend[0x14];
-}; 
+};
 
 struct reset {
 	unsigned char sysinfo;
@@ -282,7 +282,7 @@
 };
 
 
-	
+
 
 struct mmcr {
 	unsigned short revid;

Modified: trunk/src/include/cpu/amd/vr.h
==============================================================================
--- trunk/src/include/cpu/amd/vr.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/cpu/amd/vr.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -7,7 +7,7 @@
 #ifndef CPU_AMD_VR_H
 #define CPU_AMD_VR_H
 
-#define VRC_INDEX				0xAC1C	// Index register 
+#define VRC_INDEX				0xAC1C	// Index register
 #define VRC_DATA				0xAC1E	// Data register
 #define VR_UNLOCK				0xFC53	// Virtual register unlock code
 #define NO_VR					-1		// No virtual registers
@@ -24,7 +24,7 @@
        #define GET_ERROR        0x05
        #define SET_VSM_TYPE     0x06
 	#define SIGNATURE			0x03
-       #define VSA2_SIGNATURE	0x56534132	// 'VSA2' returned in EAX 
+       #define VSA2_SIGNATURE	0x56534132	// 'VSA2' returned in EAX
 
     #define GET_HW_INFO			0x04
     #define VSM_VERSION			0x05
@@ -32,7 +32,7 @@
     #define MSR_ACCESS          0x07
     #define GET_DESCR_INFO		0x08
     #define PCI_INT_AB			0x09	// GPIO pins for INTA# and INTB#
-    #define PCI_INT_CD			0x0A	// GPIO pins for INTC# and INTD#	
+    #define PCI_INT_CD			0x0A	// GPIO pins for INTC# and INTD#
     #define WATCHDOG			0x0B	// Watchdog timer
 
     #define MAX_MISC           	WATCHDOG
@@ -48,7 +48,7 @@
 	#define CODEC_TYPE      	0x05
 	#define STATE_INDEX     	0x06
 	#define STATE_DATA      	0x07
-	#define AUDIO_IRQ	      	0x08	// For use by native audio drivers 
+	#define AUDIO_IRQ	      	0x08	// For use by native audio drivers
 	#define STATUS_PTR			0x09	// For use by native audio drivers
 	#define MAX_AUDIO           STATUS_PTR
 
@@ -86,7 +86,7 @@
 			#define VG_CFG_DPMS_V		0x0080	// VSYNC mask bit
 		#define VG_VESA_SV_RST		0x0020	// VESA Save/Restore state flag
 			#define VG_VESA_RST			0x0000	// VESA Restore state
-			#define VG_VESA_SV			0x0020	// VESA Save state 
+			#define VG_VESA_SV			0x0020	// VESA Save state
 		#define VG_FRSH_MODE		0x0002	// Mode refresh flag
 		#define VG_FRSH_TIMINGS		0x0001	// Timings only refresh flag
 
@@ -183,7 +183,7 @@
 			#define VG_TV_PAL			0x0010	// PAL output format
 			#define VG_TV_HDTV			0x0020	// HDTV output format
 
-		// The meaning of the VG_TV_RES field is dependent on the selected  
+		// The meaning of the VG_TV_RES field is dependent on the selected
 		// encoder and output format.  The translations are:
 		//		ADV7171 - Not Used
 		//		SAA7127 - Not Used
@@ -191,7 +191,7 @@
 		//			LO  -> 720x480p
 		//	   		MED -> 1280x720p
 		//			HI  -> 1920x1080i
-		// 		FS454   - Both SD and HD resolutions	
+		// 		FS454   - Both SD and HD resolutions
 		// 			SD Resolutions - NTSC and PAL
 		//				LO  -> 640x480
 		//	   			MED -> 800x600
@@ -331,8 +331,8 @@
 	#define RW_PIRQ				0x06	// read/write PCI IRQ router regs in SB Func0 cfg space
 	#define SLPB_CLEAR			0x07	// clear sleep button GPIO status's
 	#define PIRQ_ROUTING		0x08	// read the PCI IRQ routing based on BIOS setup
-	#define ACPI_UNUSED2		0x09	
-	#define ACPI_UNUSED3		0x0A	
+	#define ACPI_UNUSED2		0x09
+	#define ACPI_UNUSED3		0x0A
 	#define PIC_INTERRUPT		0x0B
 	#define ACPI_PRESENT		0x0C
 	#define	ACPI_GEN_COMMAND	0x0D
@@ -380,7 +380,7 @@
 
 #define VRC_DEBUGGER			0x0E
 	#define MAX_DEBUGGER        NO_VR
-						   
+
 
 #define	VRC_STR					0x0F		// Virtual Register class
 	#define RESTORE_ADDR		0x00		// Physical address of MSR restore table
@@ -404,7 +404,7 @@
 
 #define	VRC_SYSINFO				0x12		// Virtual Register class
 	#define	VRC_SI_VERSION				0x00		// Sysinfo VSM version
-	#define	VRC_SI_CPU_MHZ				0x01	// CPU speed in MHZ 
+	#define	VRC_SI_CPU_MHZ				0x01	// CPU speed in MHZ
 	#define	VRC_SI_CHIPSET_BASE_LOW		0x02
 	#define	VRC_SI_CHIPSET_BASE_HI		0x03
 	#define	VRC_SI_CHIPSET_ID			0x04

Modified: trunk/src/include/cpu/x86/cache.h
==============================================================================
--- trunk/src/include/cpu/x86/cache.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/cpu/x86/cache.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2004 Eric W. Biederman
  *
  * This program is free software; you can redistribute it and/or modify

Modified: trunk/src/include/cpu/x86/msr.h
==============================================================================
--- trunk/src/include/cpu/x86/msr.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/cpu/x86/msr.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,7 +17,7 @@
 
 #else
 
-typedef struct msr_struct 
+typedef struct msr_struct
 {
 	unsigned lo;
 	unsigned hi;

Modified: trunk/src/include/cpu/x86/pae.h
==============================================================================
--- trunk/src/include/cpu/x86/pae.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/cpu/x86/pae.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 #ifndef CPU_X86_PAE_H
-#define CPU_X86_PAE_H 
+#define CPU_X86_PAE_H
 
 #define MAPPING_ERROR ((void *)0xffffffffUL)
 void *map_2M_page(unsigned long page);

Modified: trunk/src/include/cpu/x86/smm.h
==============================================================================
--- trunk/src/include/cpu/x86/smm.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/cpu/x86/smm.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,7 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/* AMD64 SMM State-Save Area 
+/* AMD64 SMM State-Save Area
  * starts @ 0x7e00
  */
 typedef struct {
@@ -115,7 +115,7 @@
 } __attribute__((packed)) amd64_smm_state_save_area_t;
 
 
-/* Intel Core 2 (EM64T) SMM State-Save Area 
+/* Intel Core 2 (EM64T) SMM State-Save Area
  * starts @ 0x7d00
  */
 typedef struct {
@@ -193,7 +193,7 @@
 } __attribute__((packed)) em64t_smm_state_save_area_t;
 
 
-/* Legacy x86 SMM State-Save Area 
+/* Legacy x86 SMM State-Save Area
  * starts @ 0x7e00
  */
 

Modified: trunk/src/include/cpu/x86/stack.h
==============================================================================
--- trunk/src/include/cpu/x86/stack.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/cpu/x86/stack.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify

Modified: trunk/src/include/device/agp.h
==============================================================================
--- trunk/src/include/device/agp.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/device/agp.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,7 +2,7 @@
 #define DEVICE_AGP_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 
-unsigned int agp_scan_bus(struct bus *bus, 
+unsigned int agp_scan_bus(struct bus *bus,
 	unsigned min_devfn, unsigned max_devfn, unsigned int max);
 unsigned int agp_scan_bridge(device_t dev, unsigned int max);
 

Modified: trunk/src/include/device/cardbus.h
==============================================================================
--- trunk/src/include/device/cardbus.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/device/cardbus.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -3,7 +3,7 @@
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 
 void cardbus_read_resources(device_t dev);
-unsigned int cardbus_scan_bus(struct bus *bus, 
+unsigned int cardbus_scan_bus(struct bus *bus,
 	unsigned min_devfn, unsigned max_devfn, unsigned int max);
 unsigned int cardbus_scan_bridge(device_t dev, unsigned int max);
 void cardbus_enable_resources(device_t dev);

Modified: trunk/src/include/device/device.h
==============================================================================
--- trunk/src/include/device/device.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/device/device.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -49,8 +49,8 @@
 	unsigned	disable_relaxed_ordering : 1;
 };
 
-#define MAX_RESOURCES 24 
-#define MAX_LINKS    8 
+#define MAX_RESOURCES 24
+#define MAX_LINKS    8
 /*
  * There is one device structure for each slot-number/function-number
  * combination:
@@ -78,7 +78,7 @@
 	unsigned int resources;
 
 	/* links are (downstream) buses attached to the device, usually a leaf
-	 * device with no children have 0 buses attached and a bridge has 1 bus 
+	 * device with no children have 0 buses attached and a bridge has 1 bus
 	 */
 	struct bus link[MAX_LINKS];
 	/* number of buses attached to the device */
@@ -139,10 +139,10 @@
 		       struct resource *resource, const char *comment);
 void show_all_devs_resources(int debug_level, const char* msg);
 
-/* Rounding for boundaries. 
+/* Rounding for boundaries.
  * Due to some chip bugs, go ahead and round IO to 16
  */
-#define DEVICE_IO_ALIGN 16 
+#define DEVICE_IO_ALIGN 16
 #define DEVICE_MEM_ALIGN 4096
 
 extern struct device_operations default_dev_ops_root;

Modified: trunk/src/include/device/hypertransport.h
==============================================================================
--- trunk/src/include/device/hypertransport.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/device/hypertransport.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -3,7 +3,7 @@
 
 #include <device/hypertransport_def.h>
 
-unsigned int hypertransport_scan_chain(struct bus *bus, 
+unsigned int hypertransport_scan_chain(struct bus *bus,
 	unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unit_base, unsigned offset_unitid);
 unsigned int ht_scan_bridge(struct device *dev, unsigned int max);
 extern struct device_operations default_ht_ops_bus;

Modified: trunk/src/include/device/hypertransport_def.h
==============================================================================
--- trunk/src/include/device/hypertransport_def.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/device/hypertransport_def.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -11,7 +11,7 @@
 #define HT_FREQ_1200Mhz  7
 #define HT_FREQ_1400Mhz  8
 #define HT_FREQ_1600Mhz  9
-#define HT_FREQ_1800Mhz 10 
+#define HT_FREQ_1800Mhz 10
 #define HT_FREQ_2000Mhz 11
 #define HT_FREQ_2200Mhz 12
 #define HT_FREQ_2400Mhz 13

Modified: trunk/src/include/device/pci.h
==============================================================================
--- trunk/src/include/device/pci.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/device/pci.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -61,7 +61,7 @@
 void pci_bus_reset(struct bus *bus);
 device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn);
 unsigned int do_pci_scan_bridge(device_t bus, unsigned int max,
-	unsigned int (*do_scan_bus)(struct bus *bus, 
+	unsigned int (*do_scan_bus)(struct bus *bus,
 		unsigned min_devfn, unsigned max_devfn, unsigned int max));
 unsigned int pci_scan_bridge(device_t bus, unsigned int max);
 unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max);

Modified: trunk/src/include/device/pci_def.h
==============================================================================
--- trunk/src/include/device/pci_def.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/device/pci_def.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -26,7 +26,7 @@
 #define  PCI_STATUS_FAST_BACK	0x80	/* Accept fast-back to back */
 #define  PCI_STATUS_PARITY	0x100	/* Detected parity error */
 #define  PCI_STATUS_DEVSEL_MASK	0x600	/* DEVSEL timing */
-#define  PCI_STATUS_DEVSEL_FAST	0x000	
+#define  PCI_STATUS_DEVSEL_FAST	0x000
 #define  PCI_STATUS_DEVSEL_MEDIUM 0x200
 #define  PCI_STATUS_DEVSEL_SLOW 0x400
 #define  PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */
@@ -55,8 +55,8 @@
 
 /*
  * Base addresses specify locations in memory or I/O space.
- * Decoded size can be determined by writing a value of 
- * 0xffffffff to the register, and reading it back.  Only 
+ * Decoded size can be determined by writing a value of
+ * 0xffffffff to the register, and reading it back.  Only
  * 1 bits are decoded.
  */
 #define PCI_BASE_ADDRESS_0	0x10	/* 32 bits */
@@ -80,7 +80,7 @@
 /* Header type 0 (normal devices) */
 #define PCI_CARDBUS_CIS		0x28
 #define PCI_SUBSYSTEM_VENDOR_ID	0x2c
-#define PCI_SUBSYSTEM_ID	0x2e  
+#define PCI_SUBSYSTEM_ID	0x2e
 #define PCI_ROM_ADDRESS		0x30	/* Bits 31..11 are address, 10..1 reserved */
 #define  PCI_ROM_ADDRESS_ENABLE	0x01
 #define PCI_ROM_ADDRESS_MASK	(~0x7ffUL)
@@ -189,7 +189,7 @@
 
 /* Hypertransport Registers */
 #define PCI_HT_CAP_SIZEOF	   4
-#define PCI_HT_CAP_HOST_CTRL       4	/* Host link control */ 
+#define PCI_HT_CAP_HOST_CTRL       4	/* Host link control */
 #define PCI_HT_CAP_HOST_WIDTH	   6	/* width value & capability  */
 #define PCI_HT_CAP_HOST_FREQ	   0x09	/* Host frequency */
 #define PCI_HT_CAP_HOST_FREQ_CAP   0x0a	/* Host Frequency capability  */

Modified: trunk/src/include/device/pciexp.h
==============================================================================
--- trunk/src/include/device/pciexp.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/device/pciexp.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,7 +2,7 @@
 #define DEVICE_PCIEXP_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 
-unsigned int pciexp_scan_bus(struct bus *bus, 
+unsigned int pciexp_scan_bus(struct bus *bus,
 	unsigned min_devfn, unsigned max_devfn, unsigned int max);
 unsigned int pciexp_scan_bridge(device_t dev, unsigned int max);
 

Modified: trunk/src/include/device/pcix.h
==============================================================================
--- trunk/src/include/device/pcix.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/device/pcix.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,7 +2,7 @@
 #define DEVICE_PCIX_H
 /* (c) 2005 Linux Networx GPL see COPYING for details */
 
-unsigned int pcix_scan_bus(struct bus *bus, 
+unsigned int pcix_scan_bus(struct bus *bus,
 	unsigned min_devfn, unsigned max_devfn, unsigned int max);
 unsigned int pcix_scan_bridge(device_t dev, unsigned int max);
 const char *pcix_speed(unsigned sstatus);

Modified: trunk/src/include/smp/atomic.h
==============================================================================
--- trunk/src/include/smp/atomic.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/smp/atomic.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -11,40 +11,40 @@
 /**
  * atomic_read - read atomic variable
  * @v: pointer of type atomic_t
- * 
+ *
  * Atomically reads the value of @v.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
- */ 
+ */
 #define atomic_read(v)		((v)->counter)
 
 /**
  * atomic_set - set atomic variable
  * @v: pointer of type atomic_t
  * @i: required value
- * 
+ *
  * Atomically sets the value of @v to @i.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
- */ 
+ */
 #define atomic_set(v,i)		(((v)->counter) = (i))
 
 
 /**
  * atomic_inc - increment atomic variable
  * @v: pointer of type atomic_t
- * 
+ *
  * Atomically increments @v by 1.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
- */ 
+ */
 #define atomic_inc(v)	(((v)->counter)++)
 
 
 /**
  * atomic_dec - decrement atomic variable
  * @v: pointer of type atomic_t
- * 
+ *
  * Atomically decrements @v by 1.  Note that the guaranteed
  * useful range of an atomic_t is only 24 bits.
- */ 
+ */
 #define atomic_dec(v)	(((v)->counter)--)
 
 

Modified: trunk/src/include/string.h
==============================================================================
--- trunk/src/include/string.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/include/string.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -12,10 +12,10 @@
 int sprintf(char * buf, const char *fmt, ...);
 #endif
 
-// simple string functions 
+// simple string functions
 
-static inline size_t strnlen(const char *src, size_t max) 
-{ 
+static inline size_t strnlen(const char *src, size_t max)
+{
 	size_t i = 0;
 	while((*src++) && (i < max)) {
 		i++;
@@ -37,13 +37,13 @@
 	for (; *s; s++) {
 		if (*s == c)
 			return (char *) s;
-	}       
+	}
 	return 0;
 }
 
 #if !defined(__PRE_RAM__)
 static inline char *strdup(const char *s)
-{   
+{
 	size_t sz = strlen(s) + 1;
 	char *d = malloc(sz);
 	memcpy(d, s, sz);
@@ -69,7 +69,7 @@
 }
 
 static inline int strcmp(const char *s1, const char *s2)
-{   
+{
 	int r;
 
 	while ((r = (*s1 - *s2)) == 0 && *s1) {
@@ -77,7 +77,7 @@
 		s2++;
 	}
 	return r;
-}  
+}
 
 static inline int strncmp(const char *s1, const char *s2, int maxlen)
 {

Modified: trunk/src/lib/cbfs.c
==============================================================================
--- trunk/src/lib/cbfs.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/cbfs.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -160,11 +160,11 @@
 	if (orom == NULL)
 		return NULL;
 
-	/* They might have specified a dest address. If so, we can decompress. 
+	/* They might have specified a dest address. If so, we can decompress.
 	 * If not, there's not much hope of decompressing or relocating the rom.
 	 * in the common case, the expansion rom is uncompressed, we
-	 * pass 0 in for the dest, and all we have to do is find the rom and 
-	 * return a pointer to it. 
+	 * pass 0 in for the dest, and all we have to do is find the rom and
+	 * return a pointer to it.
  	 */
 
 	/* BUG: the cbfstool is (not yet) including a cbfs_optionrom header */
@@ -193,9 +193,9 @@
 	if (stage == NULL)
 		return (void *) -1;
 
-	printk(BIOS_INFO, "Stage: loading %s @ 0x%x (%d bytes), entry @ 0x%llx\n", 
+	printk(BIOS_INFO, "Stage: loading %s @ 0x%x (%d bytes), entry @ 0x%llx\n",
 			name,
-			(u32) stage->load, stage->memlen, 
+			(u32) stage->load, stage->memlen,
 			stage->entry);
 	memset((void *) (u32) stage->load, 0, stage->memlen);
 
@@ -235,9 +235,9 @@
 
 /**
  * run_address is passed the address of a function taking no parameters and
- * jumps to it, returning the result. 
- * @param f the address to call as a function. 
- * @return value returned by the function. 
+ * jumps to it, returning the result.
+ * @param f the address to call as a function.
+ * @return value returned by the function.
  */
 
 int run_address(void *f)

Modified: trunk/src/lib/cbmem.c
==============================================================================
--- trunk/src/lib/cbmem.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/cbmem.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -67,7 +67,7 @@
 #ifndef __PRE_RAM__
 	bss_cbmem_toc = cbmem_toc;
 #endif
-	
+
 	debug("Initializing CBMEM area to 0x%llx (%lld bytes)\n", baseaddr, size);
 
 	if (size < (64 * 1024)) {
@@ -103,7 +103,7 @@
 	struct cbmem_entry *cbmem_toc;
 	int i;
 	cbmem_toc = get_cbmem_toc();
-	
+
 	if (cbmem_toc == NULL) {
 		return NULL;
 	}
@@ -121,7 +121,7 @@
 
 	/* Align size to 512 byte blocks */
 
-	size = ALIGN(size, 512) < cbmem_toc[0].size ? 
+	size = ALIGN(size, 512) < cbmem_toc[0].size ?
 		ALIGN(size, 512) : cbmem_toc[0].size;
 
 	/* Now look for the first free/usable TOC entry */
@@ -155,7 +155,7 @@
 	struct cbmem_entry *cbmem_toc;
 	int i;
 	cbmem_toc = get_cbmem_toc();
-	
+
 	if (cbmem_toc == NULL)
 		return NULL;
 
@@ -197,7 +197,7 @@
 	struct cbmem_entry *cbmem_toc;
 	int i;
 	cbmem_toc = get_cbmem_toc();
-	
+
 	if (cbmem_toc == NULL)
 		return;
 

Modified: trunk/src/lib/compute_ip_checksum.c
==============================================================================
--- trunk/src/lib/compute_ip_checksum.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/compute_ip_checksum.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -39,7 +39,7 @@
 	sum = ~sum & 0xFFFF;
 	new = ~new & 0xFFFF;
 	if (offset & 1) {
-		/* byte swap the sum if it came from an odd offset 
+		/* byte swap the sum if it came from an odd offset
 		 * since the computation is endian independant this
 		 * works.
 		 */

Modified: trunk/src/lib/generic_dump_spd.c
==============================================================================
--- trunk/src/lib/generic_dump_spd.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/generic_dump_spd.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -12,8 +12,8 @@
 		device = ctrl->channel0[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".0: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -38,8 +38,8 @@
 		device = ctrl->channel1[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".1: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {

Modified: trunk/src/lib/generic_sdram.c
==============================================================================
--- trunk/src/lib/generic_sdram.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/generic_sdram.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -45,7 +45,7 @@
 	}
 
 	/* Now that everything is setup enable the SDRAM.
-	 * Some chipsets do the work for us while on others 
+	 * Some chipsets do the work for us while on others
 	 * we need to it by hand.
 	 */
 	print_debug("Ram3\n");

Modified: trunk/src/lib/jpeg.c
==============================================================================
--- trunk/src/lib/jpeg.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/jpeg.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -270,7 +270,7 @@
         return 1;
 }
 
-int jpeg_decode(unsigned char *buf, unsigned char *pic, 
+int jpeg_decode(unsigned char *buf, unsigned char *pic,
 		int width, int height, int depth, struct jpeg_decdata *decdata)
 {
 	int i, j, m, tac, tdc;

Modified: trunk/src/lib/lzma.c
==============================================================================
--- trunk/src/lib/lzma.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/lzma.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* 
+/*
 
 Coreboot interface to memory-saving variant of LZMA decoder
 

Modified: trunk/src/lib/lzmadecode.c
==============================================================================
--- trunk/src/lib/lzmadecode.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/lzmadecode.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,21 +1,21 @@
 /*
   LzmaDecode.c
   LZMA Decoder (optimized for Speed version)
-  
+
   LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
   http://www.7-zip.org/
 
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and
   follow rules of that license.
 
   SPECIAL EXCEPTION:
-  Igor Pavlov, as the author of this Code, expressly permits you to 
-  statically or dynamically link your Code (or bind by name) to the 
-  interfaces of this file without subjecting your linked Code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this Code, expressly permits you to
+  statically or dynamically link your Code (or bind by name) to the
+  interfaces of this file without subjecting your linked Code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions
   to this file, however, are subject to the LGPL or CPL terms.
 */
 
@@ -37,7 +37,7 @@
 #define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
 
 #define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
- 
+
 
 #define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
 
@@ -47,9 +47,9 @@
 
 #define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
   { UpdateBit0(p); mi <<= 1; A0; } else \
-  { UpdateBit1(p); mi = (mi + mi) + 1; A1; } 
-  
-#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)               
+  { UpdateBit1(p); mi = (mi + mi) + 1; A1; }
+
+#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)
 
 #define RangeDecoderBitTreeDecode(probs, numLevels, res) \
   { int i = numLevels; res = 1; \
@@ -72,7 +72,7 @@
 #define LenLow (LenChoice2 + 1)
 #define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
 #define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
-#define kNumLenProbs (LenHigh + kLenNumHighSymbols) 
+#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
 
 
 #define kNumStates 12
@@ -161,7 +161,7 @@
     for (i = 0; i < numProbs; i++)
       p[i] = kBitModelTotal >> 1;
   }
-  
+
   RC_INIT(inStream, inSize);
 
 
@@ -170,7 +170,7 @@
     CProb *prob;
     UInt32 bound;
     int posState = (int)(
-        (nowPos 
+        (nowPos
         )
         & posStateMask);
 
@@ -179,9 +179,9 @@
     {
       int symbol = 1;
       UpdateBit0(prob)
-      prob = p + Literal + (LZMA_LIT_SIZE * 
+      prob = p + Literal + (LZMA_LIT_SIZE *
         (((
-        (nowPos 
+        (nowPos
         )
         & literalPosMask) << lc) + (previousByte >> (8 - lc))));
 
@@ -212,7 +212,7 @@
       else if (state < 10) state -= 3;
       else state -= 6;
     }
-    else             
+    else
     {
       UpdateBit1(prob);
       prob = p + IsRep + state;
@@ -236,10 +236,10 @@
           IfBit0(prob)
           {
             UpdateBit0(prob);
-            
+
             if (nowPos == 0)
               return LZMA_RESULT_DATA_ERROR;
-            
+
             state = state < kNumLitStates ? 9 : 11;
             previousByte = outStream[nowPos - rep0];
             outStream[nowPos++] = previousByte;
@@ -261,7 +261,7 @@
             UpdateBit0(prob);
             distance = rep1;
           }
-          else 
+          else
           {
             UpdateBit1(prob);
             prob = p + IsRepG2 + state;
@@ -322,7 +322,7 @@
         int posSlot;
         state += kNumLitStates;
         prob = p + PosSlot +
-            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << 
+            ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
             kNumPosSlotBits);
         RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
         if (posSlot >= kStartPosModelIndex)

Modified: trunk/src/lib/lzmadecode.h
==============================================================================
--- trunk/src/lib/lzmadecode.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/lzmadecode.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* 
+/*
   LzmaDecode.h
   LZMA Decoder interface
 
@@ -8,14 +8,14 @@
   LZMA SDK is licensed under two licenses:
   1) GNU Lesser General Public License (GNU LGPL)
   2) Common Public License (CPL)
-  It means that you can select one of these two licenses and 
+  It means that you can select one of these two licenses and
   follow rules of that license.
 
   SPECIAL EXCEPTION:
-  Igor Pavlov, as the author of this code, expressly permits you to 
-  statically or dynamically link your code (or bind by name) to the 
-  interfaces of this file without subjecting your linked code to the 
-  terms of the CPL or GNU LGPL. Any modifications or additions 
+  Igor Pavlov, as the author of this code, expressly permits you to
+  statically or dynamically link your code (or bind by name) to the
+  interfaces of this file without subjecting your linked code to the
+  terms of the CPL or GNU LGPL. Any modifications or additions
   to this file, however, are subject to the LGPL or CPL terms.
 */
 

Modified: trunk/src/lib/nrv2b.c
==============================================================================
--- trunk/src/lib/nrv2b.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/nrv2b.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-// This GETBIT is supposed to work on little endian 
+// This GETBIT is supposed to work on little endian
 // 32bit systems. The algorithm will definitely need
 // some fixing on other systems, but it might not be
 // a problem since the nrv2b binary behaves the same..
@@ -37,7 +37,7 @@
 
 	// skip length
 	src += 4;
-	/* FIXME: check olen with the length stored in first 4 bytes */	
+	/* FIXME: check olen with the length stored in first 4 bytes */
 
 	for (;;) {
 		unsigned int m_off, m_len;

Modified: trunk/src/lib/ramtest.c
==============================================================================
--- trunk/src/lib/ramtest.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/ramtest.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -48,7 +48,7 @@
 static void ram_fill(unsigned long start, unsigned long stop)
 {
 	unsigned long addr;
-	/* 
+	/*
 	 * Fill.
 	 */
 #if CONFIG_USE_PRINTK_IN_CAR
@@ -85,7 +85,7 @@
 {
 	unsigned long addr;
 	int i = 0;
-	/* 
+	/*
 	 * Verify.
 	 */
 #if CONFIG_USE_PRINTK_IN_CAR
@@ -168,7 +168,7 @@
 #else
 	print_debug("Testing DRAM : ");
 	print_debug_hex32(start);
-	print_debug("-");	
+	print_debug("-");
 	print_debug_hex32(stop);
 	print_debug("\n");
 #endif

Modified: trunk/src/lib/uart8250.c
==============================================================================
--- trunk/src/lib/uart8250.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/uart8250.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -33,7 +33,7 @@
 
 static inline void uart8250_wait_until_sent(unsigned base_port)
 {
-	while(!(inb(base_port + UART_LSR) & 0x40)) 
+	while(!(inb(base_port + UART_LSR) & 0x40))
 		;
 }
 

Modified: trunk/src/lib/usbdebug_direct.c
==============================================================================
--- trunk/src/lib/usbdebug_direct.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/usbdebug_direct.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -87,7 +87,7 @@
 		/* Stop when the transaction is finished */
 		if (ctrl & DBGP_DONE)
 			break;
-	} while(--loop>0); 
+	} while(--loop>0);
 
 	if (!loop) return -1000;
 
@@ -132,7 +132,7 @@
 	 */
 	if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
 		dbgp_breath();
-	
+
 	/* If I get a NACK reissue the transmission */
 	if (lpid == USB_PID_NAK) {
 		if (--loop > 0) goto retry;
@@ -179,7 +179,7 @@
 
 	pids = read32(&ehci_debug->pids);
 	pids = DBGP_PID_UPDATE(pids, USB_PID_OUT);
-	
+
 	ctrl = read32(&ehci_debug->control);
 	ctrl = DBGP_LEN_UPDATE(ctrl, size);
 	ctrl |= DBGP_OUT;
@@ -213,12 +213,12 @@
 
 	pids = read32(&ehci_debug->pids);
 	pids = DBGP_PID_UPDATE(pids, USB_PID_IN);
-		
+
 	ctrl = read32(&ehci_debug->control);
 	ctrl = DBGP_LEN_UPDATE(ctrl, size);
 	ctrl &= ~DBGP_OUT;
 	ctrl |= DBGP_GO;
-		
+
 	write32(&ehci_debug->address, addr);
 	write32(&ehci_debug->pids, pids);
 	ret = dbgp_wait_until_done(ehci_debug, ctrl);
@@ -234,7 +234,7 @@
 	return dbgp_bulk_read(dbg_info->ehci_debug, dbg_info->devnum, dbg_info->endpoint_in, data, size);
 }
 
-static int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype, int request, 
+static int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype, int request,
 	int value, int index, void *data, int size)
 {
 	unsigned pids, addr, ctrl;
@@ -245,7 +245,7 @@
 	read = (requesttype & USB_DIR_IN) != 0;
 	if (size > (read?DBGP_MAX_PACKET:0))
 		return -1;
-	
+
 	/* Compute the control message */
 	req.bRequestType = requesttype;
 	req.bRequest = request;
@@ -298,7 +298,7 @@
 			loop = 2;
 			write32(&ehci_regs->port_status[port - 1],
 					portsc & ~(PORT_RWC_BITS | PORT_RESET));
-			do {	
+			do {
 				dbgp_mdelay(delay);
 				portsc = read32(&ehci_regs->port_status[port - 1]);
 				delay_time += delay;
@@ -395,7 +395,7 @@
 			set_debug_port(debug_port);
 			goto try_next_time;
 		}
-		return;	
+		return;
 	}
 
 	/* Reset the EHCI controller */
@@ -492,7 +492,7 @@
 			USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
 			USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, (void *)0, 0);
 		if (ret < 0) {
-			dbgp_printk("Could not move attached device to %d.\n", 
+			dbgp_printk("Could not move attached device to %d.\n",
 				USB_DEBUG_DEVNUM);
 			goto err;
 		}
@@ -525,7 +525,7 @@
 	info->devnum = devnum;
 	info->endpoint_out = dbgp_endpoint_out;
 	info->endpoint_in = dbgp_endpoint_in;
-	
+
 	return;
 err:
 	/* Things didn't work so remove my claim */

Modified: trunk/src/lib/xmodem.c
==============================================================================
--- trunk/src/lib/xmodem.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/lib/xmodem.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -143,7 +143,7 @@
 			*p++ = c;
 		}
 
-		if (xbuff[1] == (unsigned char)(~xbuff[2]) && 
+		if (xbuff[1] == (unsigned char)(~xbuff[2]) &&
 			(xbuff[1] == packetno || xbuff[1] == (unsigned char)packetno-1) &&
 			check(crc, &xbuff[3], bufsz)) {
 			if (xbuff[1] == packetno)	{

Modified: trunk/src/mainboard/a-trend/Kconfig
==============================================================================
--- trunk/src/mainboard/a-trend/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/a-trend/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,7 +21,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_A_TREND
-	
+
 source "src/mainboard/a-trend/atc-6220/Kconfig"
 source "src/mainboard/a-trend/atc-6240/Kconfig"
 

Modified: trunk/src/mainboard/abit/Kconfig
==============================================================================
--- trunk/src/mainboard/abit/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/abit/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,7 +21,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_ABIT
-	
+
 source "src/mainboard/abit/be6-ii_v2_0/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/amd/rumba/devicetree.cb
==============================================================================
--- trunk/src/mainboard/amd/rumba/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/rumba/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -6,7 +6,7 @@
 			device apic 0 on end
 		end
 	end
-  	device pci_domain 0 on 
+  	device pci_domain 0 on
     		device pci 1.0 on end
 		device pci 1.1 on end
       		chip southbridge/amd/cs5536

Modified: trunk/src/mainboard/amd/rumba/irq_tables.c
==============================================================================
--- trunk/src/mainboard/amd/rumba/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/rumba/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

Modified: trunk/src/mainboard/amd/rumba/mainboard.c
==============================================================================
--- trunk/src/mainboard/amd/rumba/mainboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/rumba/mainboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
 	printk(BIOS_DEBUG, "AMD RUMBA ENTER %s\n", __func__);
 
 	if (nicirq) {
-		printk(BIOS_DEBUG, "%s (%x,%x)SET PCI interrupt line to %d\n", 
+		printk(BIOS_DEBUG, "%s (%x,%x)SET PCI interrupt line to %d\n",
 			__func__, bus, devfn, nicirq);
 		nic = dev_find_slot(bus, devfn);
 		if (! nic){

Modified: trunk/src/mainboard/amd/rumba/romstage.c
==============================================================================
--- trunk/src/mainboard/amd/rumba/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/rumba/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -35,7 +35,7 @@
         return r;
 }
 
-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)
 {
 	/* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
 	 *                      component Banks (byte 17) * module banks, side (byte 5) *
@@ -86,7 +86,7 @@
 	msr = rdmsr(0x20000019);
 	msr.hi = 0x18000108;
 	msr.lo = 0x696332a3;
-	wrmsr(0x20000019, msr);		
+	wrmsr(0x20000019, msr);
 
 }
 
@@ -122,7 +122,7 @@
 	};
 
 	SystemPreInit();
-	
+
 
 	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 	uart_init();
@@ -134,7 +134,7 @@
 
 	cpuRegInit();
 	print_err("done cpuRegInit\n");
-	
+
 	sdram_initialize(1, memctrl);
 
 	msr_init();

Modified: trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8111.asl
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8111.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8111.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -4,17 +4,17 @@
 //AMD8111
             Name (APIC, Package (0x04)
             {
-                Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present 
-                Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11}, 
-                Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12}, 
+                Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present
+                Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11},
+                Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12},
                 Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13}
             })
 
             Name (PICM, Package (0x04)
             {
-                Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00}, 
-                Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00}, 
-                Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00}, 
+                Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00},
+                Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00},
+                Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00},
                 Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00}
             })
 
@@ -34,16 +34,16 @@
                         Store(Local0, Index (DeRefOf (Index (APIC, 1)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 2)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 3)), 0))
-			
+
 			Store (0x00, ^DNCG)
-			
+
 		}
 
-                If (LNot (PICF)) { 
-			Return (PICM) 
+                If (LNot (PICF)) {
+			Return (PICM)
 		}
                 Else {
-			Return (APIC) 
+			Return (APIC)
 		}
             }
 
@@ -57,7 +57,7 @@
                 OperationRegion (PIRQ, PCI_Config, 0x56, 0x02)
                 Field (PIRQ, ByteAcc, Lock, Preserve)
                 {
-                    PIBA,   8, 
+                    PIBA,   8,
                     PIDC,   8
                 }
 /*
@@ -144,7 +144,7 @@
                     Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x13 },
                     Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x10 }
                 })
-	
+
                 Name (PICM, Package (0x0C)
                 {
                     Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //USB

Modified: trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
 
             Device (ISA)
             {
-                /* lpc  0x00040000 */ 
+                /* lpc  0x00040000 */
                 Method (_ADR, 0, NotSerialized)
                 {
 			Return (DADD(\_SB.PCI0.SBDN, 0x00010000))
@@ -15,11 +15,11 @@
                 Field (PIRY, ByteAcc, NoLock, Preserve)
                 {
                     Z000,   2,  // Parallel Port Range
-                        ,   1, 
+                        ,   1,
                     ECP,    1,  // ECP Enable
                     FDC1,   1,  // Floppy Drive Controller 1
                     FDC2,   1,  // Floppy Drive Controller 2
-                    Offset (0x01), 
+                    Offset (0x01),
                     Z001,   3,  // Serial Port A Range
                     SAEN,   1,  // Serial Post A Enabled
                     Z002,   3,  // Serial Port B Range
@@ -106,7 +106,7 @@
                         IO (Decode16, 0x0090, 0x0090, 0x01, 0x10)
                         IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E)
                         IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10)
-                        IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error 
+                        IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error
                         IO (Decode16, 0x0190, 0x0190, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error
                     })
                     Method (_CRS, 0, NotSerialized)
@@ -134,7 +134,7 @@
                             Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
                             Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
                         })
-			// Read the Video Memory length 
+			// Read the Video Memory length
                         CreateDWordField (BUF0, 0x14, CLEN)
                         CreateDWordField (BUF0, 0x10, CBAS)
 

Modified: trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8131.asl
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8131.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8131.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 /*
  * Copyright 2005 AMD
  */
-		
+
             Device (PG0A)
             {
                 /*  8132 pcix bridge*/
@@ -19,60 +19,60 @@
                 Name (APIC, Package (0x14)
                 {
 		    // Slot A - PIRQ BCDA
-                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 2 
-                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 2
+                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A },
+                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B },
                     Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 },
- 
+
 		    //Cypress Slot A - PIRQ BCDA
                     Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x19 }, //?
-                    Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x1B }, 
-                    Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x18 }, 
+                    Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x1A },
+                    Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x1B },
+                    Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x18 },
 
 		    //Cypress Slot B - PIRQ CDAB
                     Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x1A }, //?
-                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x1B }, 
-                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x18 }, 
-                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x19 }, 
+                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x1B },
+                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x18 },
+                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x19 },
 
 		    //Cypress Slot C - PIRQ DABC
                     Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x1B }, //?
-                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x18 }, 
-                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x19 }, 
-                    Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x1A }, 
+                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x18 },
+                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x19 },
+                    Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x1A },
 
 		    //Cypress Slot D - PIRQ ABCD
                     Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x18 }, //?
-                    Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x19 }, 
-                    Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x1A }, 
+                    Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x19 },
+                    Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x1A },
                     Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x1B }
                 })
                 Name (PICM, Package (0x14)
                 {
-                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, 
-
-                    Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, 
-
-                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }, 
-
-                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 }, 
-
-                    Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 2
+                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 },
+
+                    Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 },
+
+                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 },
+
+                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 },
+
+                    Package (0x04) { 0x0006FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0006FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0006FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
                     Package (0x04) { 0x0006FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)
@@ -100,15 +100,15 @@
                 {
 		    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x1F },// Slot 1
-                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x20 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x21 }, 
+                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x20 },
+                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x21 },
                     Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x22 }
                 })
                 Name (PICM, Package (0x04)
                 {
-                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 
-                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1
+                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
                     Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)

Modified: trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8131_2.asl
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8131_2.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8131_2.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 /*
  * Copyright 2005 AMD
  */
-		
+
             Device (PG0A)
             {
                 /*  8132 pcix bridge*/
@@ -19,18 +19,18 @@
                 Name (APIC, Package (0x04)
                 {
 		    // Slot A - PIRQ BCDA
-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B },
- 
+
                 })
                 Name (PICM, Package (0x04)
                 {
-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 },
                 })
 
 		Name (DNCG, Ones)
@@ -40,7 +40,7 @@
                     If (LEqual (^DNCG, Ones)) {
 			    Multiply (HCIN, 0x0008, Local2) // GSI for 8132 is 4 so we get 8
 		            Store (0x00, Local1)
-            		    While (LLess (Local1, 0x04)) 
+            		    While (LLess (Local1, 0x04))
             		    {
                         	// Update the GSI according to HCIN
 	                        Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0)
@@ -76,15 +76,15 @@
                 {
 		    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, 
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 }
                 })
                 Name (PICM, Package (0x04)
                 {
-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
 

Modified: trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8132_2.asl
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8132_2.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8132_2.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 /*
  * Copyright 2005 AMD
  */
-		
+
             Device (PG0A)
             {
                 /*  8132 pcix bridge*/
@@ -19,18 +19,18 @@
                 Name (APIC, Package (0x04)
                 {
 		    // Slot A - PIRQ BCDA
-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B },
- 
+
                 })
                 Name (PICM, Package (0x04)
                 {
-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 },
                 })
 
 		Name (DNCG, Ones)
@@ -40,7 +40,7 @@
                     If (LEqual (^DNCG, Ones)) {
 			    Multiply (HCIN, 0x000e, Local2) // GSI for 8132 is 7 so we get 14
 		            Store (0x00, Local1)
-            		    While (LLess (Local1, 0x04)) 
+            		    While (LLess (Local1, 0x04))
             		    {
                         	// Update the GSI according to HCIN
 	                        Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0)
@@ -76,15 +76,15 @@
                 {
 		    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, 
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 }
                 })
                 Name (PICM, Package (0x04)
                 {
-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
 

Modified: trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8151.asl
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8151.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/acpi/amd8151.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-// AMD8151 
+// AMD8151
             Device (AGPB)
             {
                 Method (_ADR, 0, NotSerialized)
@@ -8,16 +8,16 @@
 
                 Name (APIC, Package (0x04)
                 {
-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, 
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 },
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 }
                 })
                 Name (PICM, Package (0x04)
                 {
-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)

Modified: trunk/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/ap_romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/ap_romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -4,7 +4,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1

Modified: trunk/src/mainboard/amd/serengeti_cheetah/devicetree.cb
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -6,7 +6,7 @@
         end
 	device pci_domain 0 on
 		chip northbridge/amd/amdk8
-			device pci 18.0 on #  northbridge 
+			device pci 18.0 on #  northbridge
 				#  devices on link 0, link 0 == LDT 0
 				chip southbridge/amd/amd8132
 					# the on/off keyword is mandatory
@@ -56,7 +56,7 @@
 								io 0x60 = 0x220
 								io 0x62 = 0x300
 								irq 0x70 = 9
-							end						
+							end
                 	        			device pnp 2e.8 off end #  GPIO2
                 	        			device pnp 2e.9 off end #  GPIO3
                 	        			device pnp 2e.a off end #  ACPI
@@ -120,7 +120,7 @@
 			end #  device pci 18.0
 
                         device pci 18.0 on end
-                        device pci 18.0 on end  
+                        device pci 18.0 on end
 			device pci 18.1 on end
 			device pci 18.2 on end
 			device pci 18.3 on end

Modified: trunk/src/mainboard/amd/serengeti_cheetah/dsdt.asl
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/dsdt.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/dsdt.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -100,11 +100,11 @@
                 Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
                 Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
                 Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
-                Return (Local3) 
+                Return (Local3)
 	    }
 
 	    #include "acpi/pci0_hc.asl"
-		
+
         }
         Device (PCI1)
         {
@@ -138,7 +138,7 @@
             Notify (\_SB.PCI0.PG0B, 0x02)
         }
 
-        Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A 
+        Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A
         {
             Notify (\_SB.PCI0.PG0A, 0x02)
         }
@@ -183,14 +183,14 @@
     OperationRegion (GRAM, SystemMemory, 0x0400, 0x0100)
     Field (GRAM, ByteAcc, Lock, Preserve)
     {
-        Offset (0x10), 
+        Offset (0x10),
         FLG0,   8
     }
 
     OperationRegion (GSTS, SystemIO, 0xC028, 0x02)
     Field (GSTS, ByteAcc, NoLock, Preserve)
     {
-            ,   4, 
+            ,   4,
         IRQR,   1
     }
 

Modified: trunk/src/mainboard/amd/serengeti_cheetah/fadt.c
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/fadt.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/fadt.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -30,7 +30,7 @@
 	// 3=Workstation,4=Enterprise Server, 7=Performance Server
 	fadt->preferred_pm_profile=0x03;
 	fadt->sci_int=9;
-	// disable system management mode by setting to 0: 
+	// disable system management mode by setting to 0:
 	fadt->smi_cmd = 0;//pm_base+0x2f;
 	fadt->acpi_enable = 0xf0;
 	fadt->acpi_disable = 0xf1;
@@ -53,7 +53,7 @@
 	fadt->gpe0_blk_len =  4;
 	fadt->gpe1_blk_len =  8;
 	fadt->gpe1_base    = 16;
-	
+
 	fadt->cst_cnt    = 0xe3;
 	fadt->p_lvl2_lat =  101;
 	fadt->p_lvl3_lat = 1001;
@@ -66,7 +66,7 @@
 	fadt->century =  0; // 0x7f to make rtc alrm work
 	fadt->iapc_boot_arch = 0x3; // See table 5-11
 	fadt->flags = 0x25;
-	
+
 	fadt->res2 = 0;
 
 	fadt->reset_reg.space_id = 1;

Modified: trunk/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -15,7 +15,7 @@
 // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
 struct mb_sysconf_t mb_sysconf;
 
-static unsigned pci1234x[] = 
+static unsigned pci1234x[] =
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
 	 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
@@ -27,7 +27,7 @@
 //        0x0000ff0,
 //        0x0000ff0
 };
-static unsigned hcdnx[] = 
+static unsigned hcdnx[] =
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
 	0x20202020,
 	0x20202020,
@@ -88,17 +88,17 @@
 	get_bus_conf_done = 1;
 
 	sysconf.mb = &mb_sysconf;
-	
+
 	m = sysconf.mb;
 
-	sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);	
+	sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
 	for(i=0;i<sysconf.hc_possible_num; i++) {
 		sysconf.pci1234[i] = pci1234x[i];
 		sysconf.hcdn[i] = hcdnx[i];
 	}
-	
+
 	get_sblk_pci1234();
-	
+
 	sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
 	m->sbdn3 = sysconf.hcdn[0] & 0xff;
 
@@ -209,8 +209,8 @@
 /*I/O APICs:	APIC ID	Version	State		Address*/
 #if CONFIG_LOGICAL_CPUS==1
 	apicid_base = get_apicid_base(3);
-#else 
-	apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+	apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
 	m->apicid_8111 = apicid_base+0;
 	m->apicid_8132_1 = apicid_base+1;

Modified: trunk/src/mainboard/amd/serengeti_cheetah/irq_tables.c
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
@@ -13,11 +13,11 @@
 
 #include "mb_sysconf.h"
 
-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
 		uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
 		uint8_t slot, uint8_t rfu)
 {
-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;
         pirq_info->devfn = devfn;
 
 	pirq_info->irq[0].link = link0;
@@ -50,7 +50,7 @@
 	struct mb_sysconf_t *m;
 
 	get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
-	
+
 	m = sysconf.mb;
 
         /* Align the table to be 16 byte aligned. */
@@ -62,25 +62,25 @@
 
 	pirq = (void *)(addr);
 	v = (uint8_t *)(addr);
-	
+
 	pirq->signature = PIRQ_SIGNATURE;
 	pirq->version  = PIRQ_VERSION;
-	
+
 	pirq->rtr_bus = m->bus_8111_0;
 	pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
 
 	pirq->exclusive_irqs = 0;
-	
+
 	pirq->rtr_vendor = 0x1022;
 	pirq->rtr_device = 0x746b;
 
 	pirq->miniport_data = 0;
 
 	memset(pirq->rfu, 0, sizeof(pirq->rfu));
-	
+
 	pirq_info = (void *) ( &pirq->checksum + 1);
 	slot_num = 0;
-	
+
         {
                 device_t dev;
                 dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn+1,3));
@@ -126,11 +126,11 @@
                 j++;
 
         }
-	
-	pirq->size = 32 + 16 * slot_num; 
+
+	pirq->size = 32 + 16 * slot_num;
 
         for (i = 0; i < pirq->size; i++)
-                sum += v[i];	
+                sum += v[i];
 
 	sum = pirq->checksum - sum;
 

Modified: trunk/src/mainboard/amd/serengeti_cheetah/mptable.c
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -101,8 +101,8 @@
                 }
 
 	}
-  
-/*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */	
+
+/*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, m->apicid_8111, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x1, m->apicid_8111, 0x1);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x0, m->apicid_8111, 0x2);

Modified: trunk/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt	Tue Apr 27 08:56:47 2010	(r5507)
@@ -6,7 +6,7 @@
 
 The developers need to change for different MB
 
-Change dsdt.asl, according to MB layout 
+Change dsdt.asl, according to MB layout
 	pci1, pci2, pci3, pci4, ...., pci8
 	if there is HT-IO board, may use pci2.asl.... to create ssdt2.c, and ssdt3,c and ssdt4.c, ....ssdt8.c
 
@@ -17,7 +17,7 @@
 Regarding pci bridge apic and pic
 	need to modify entries amd8111.asl and amd8131.asl and amd8151.asl.... acording to your MB laybout, it is like that in mptable.c
 
-About other chipsets, need to develop their special asl such as 
+About other chipsets, need to develop their special asl such as
 	ck804.asl  --- NB ck804
 	bcm5785.asl or bcm5780.asl ---- Serverworks HT1000/HT2000
 
@@ -27,4 +27,4 @@
 yhlu
 
 09/18/2005
-	
+

Modified: trunk/src/mainboard/amd/serengeti_cheetah/resourcemap.c
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -143,7 +143,7 @@
 		 *	   1 = base/limit registers i are read-only
 		 * [ 7: 4] Reserved
 		 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-		 *	   This field defines the upper address bits of a 40bit address 
+		 *	   This field defines the upper address bits of a 40bit address
 		 *	   that defines the start of memory-mapped I/O region i
 		 */
 		PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -199,7 +199,7 @@
 		 * [ 3: 2] Reserved
 		 * [ 4: 4] VGA Enable
 		 *	   0 = VGA matches Disabled
-		 *	   1 = matches all address < 64K and where A[9:0] is in the 
+		 *	   1 = matches all address < 64K and where A[9:0] is in the
 		 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 		 * [ 5: 5] ISA Enable
 		 *	   0 = ISA matches Disabled
@@ -207,7 +207,7 @@
 		 *	       from matching agains this base/limit pair
 		 * [11: 6] Reserved
 		 * [24:12] PCI I/O Base i
-		 *	   This field defines the start of PCI I/O region n 
+		 *	   This field defines the start of PCI I/O region n
 		 * [31:25] Reserved
 		 */
 		PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,

Modified: trunk/src/mainboard/amd/serengeti_cheetah/romstage.c
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
@@ -107,7 +107,7 @@
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */
-#include "resourcemap.c" 
+#include "resourcemap.c"
 
 #include "cpu/amd/dualcore/dualcore.c"
 
@@ -186,7 +186,7 @@
         console_init();
 
 //	dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
-	
+
 	/* Halt if there was a built in self test failure */
 	report_bist_failure(bist);
 
@@ -201,21 +201,21 @@
 	print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
 #if CONFIG_MEM_TRAIN_SEQ == 1
-        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram 
+        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
 #endif
 	setup_coherent_ht_domain(); // routing table and start other core0
 
 	wait_all_core0_started();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
-	/* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, 
+	/* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain,
 	 * So here need to make sure last core0 is started, esp for two way system,
-	 * (there may be apic id conflicts in that case) 
+	 * (there may be apic id conflicts in that case)
 	 */
         start_other_cores();
 	wait_all_other_cores_started(bsp_apicid);
 #endif
-	
+
 	/* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 
@@ -249,7 +249,7 @@
         {
                 msr_t msr;
                 msr=rdmsr(0xc0010042);
-                print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); 
+                print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
 
         }
 

Modified: trunk/src/mainboard/amd/serengeti_cheetah/ssdt2.asl
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/ssdt2.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/ssdt2.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -28,16 +28,16 @@
 
 	    // BUS ? Second HT Chain
 	    Name (HCIN, 0xcc)  // HC2 0x01
-            
+
 	    Name (_UID,  0xdd)  // HC 0x03
 
-	    Name (_HID, "PNP0A03") 
+	    Name (_HID, "PNP0A03")
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
 	    {
 		Return (DADD(GHCN(HCIN), 0x00000000))
 	    }
-	
+
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
@@ -45,7 +45,7 @@
 
             Method (_STA, 0, NotSerialized)
             {
-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))
             }
 
             Method (_CRS, 0, NotSerialized)

Modified: trunk/src/mainboard/amd/serengeti_cheetah/ssdt3.asl
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/ssdt3.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/ssdt3.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -28,16 +28,16 @@
 
 	    // BUS ? Second HT Chain
 	    Name (HCIN, 0xcc)  // HC2 0x01
-            
+
 	    Name (_UID,  0xdd)  // HC 0x03
 
-	    Name (_HID, "PNP0A03") 
+	    Name (_HID, "PNP0A03")
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
 	    {
 		Return (DADD(GHCN(HCIN), 0x00000000))
 	    }
-	
+
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
@@ -45,7 +45,7 @@
 
             Method (_STA, 0, NotSerialized)
             {
-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))
             }
 
             Method (_CRS, 0, NotSerialized)

Modified: trunk/src/mainboard/amd/serengeti_cheetah/ssdt4.asl
==============================================================================
--- trunk/src/mainboard/amd/serengeti_cheetah/ssdt4.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/amd/serengeti_cheetah/ssdt4.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -28,16 +28,16 @@
 
 	    // BUS ? Second HT Chain
 	    Name (HCIN, 0xcc)  // HC2 0x01
-            
+
 	    Name (_UID,  0xdd)  // HC 0x03
 
-	    Name (_HID, "PNP0A03") 
+	    Name (_HID, "PNP0A03")
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
 	    {
 		Return (DADD(GHCN(HCIN), 0x00000000))
 	    }
-	
+
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
@@ -45,7 +45,7 @@
 
             Method (_STA, 0, NotSerialized)
             {
-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))
             }
 
             Method (_CRS, 0, NotSerialized)

Modified: trunk/src/mainboard/arima/Kconfig
==============================================================================
--- trunk/src/mainboard/arima/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/arima/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_ARIMA
-        
+
 source "src/mainboard/arima/hdama/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/arima/hdama/debug.c
==============================================================================
--- trunk/src/mainboard/arima/hdama/debug.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/arima/hdama/debug.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -12,8 +12,8 @@
 static void print_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -32,7 +32,7 @@
 	int i;
 	print_debug_pci_dev(dev);
 	print_debug("\n");
-	
+
 	for(i = 0; i <= 255; i++) {
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
@@ -51,8 +51,8 @@
 static void dump_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -77,10 +77,10 @@
 			device = ctrl[n].channel0[i];
 			if (device) {
 				int j;
-				print_debug("dimm: "); 
+				print_debug("dimm: ");
 				print_debug_hex8(n);
 				print_debug_char('.');
-				print_debug_hex8(i); 
+				print_debug_hex8(i);
 				print_debug(".0: ");
 				print_debug_hex8(device);
 				for(j = 0; j < 256; j++) {
@@ -109,10 +109,10 @@
 			device = ctrl[n].channel1[i];
 			if (device) {
 				int j;
-				print_debug("dimm: "); 
+				print_debug("dimm: ");
 				print_debug_hex8(n);
 				print_debug_char('.');
-				print_debug_hex8(i); 
+				print_debug_hex8(i);
 				print_debug(".1: ");
 				print_debug_hex8(device);
 				for(j = 0; j < 256; j++) {

Modified: trunk/src/mainboard/arima/hdama/devicetree.cb
==============================================================================
--- trunk/src/mainboard/arima/hdama/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/arima/hdama/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -6,14 +6,14 @@
 	end
 	device pci_domain 0 on
 		chip northbridge/amd/amdk8
-			device pci 18.0 on #  northbridge 
-				#  devices on link 0, link 0 == LDT 0 
+			device pci 18.0 on #  northbridge
+				#  devices on link 0, link 0 == LDT 0
 				chip southbridge/amd/amd8131
 					# the on/off keyword is mandatory
 					device pci 0.0 on	# PCIX bridge
 						## On board NIC A
 						#chip drivers/generic/generic
-						#	device pci 3.0 on	
+						#	device pci 3.0 on
 						#		irq 0 = 0x13
 						#	end
 						#end
@@ -31,7 +31,7 @@
 						#		irq 2 = 0x13
 						#		irq 3 = 0x10
 						#	end
-						#end 
+						#end
 						## PCI Slot 4
 						#chip drivers/generic/generic
 						#	device pci 2.0 on
@@ -40,7 +40,7 @@
 						#		irq 2 = 0x10
 						#		irq 3 = 0x11
 						#	end
-						#end 
+						#end
 					end
 					device pci 0.1 on end	# IOAPIC
 					device pci 1.0 on 	# PCIX bridge
@@ -61,7 +61,7 @@
 						#		irq 2 = 0x10
 						#		irq 3 = 0x11
 						#	end
-						#end 
+						#end
 					end
 					device pci 1.1 on end	# IOAPIC
 				end
@@ -82,7 +82,7 @@
 						#		irq 2 = 0x13
 						#		irq 3 = 0x10
 						#	end
-						#end 
+						#end
 						## PCI Slot 6 (correct?)
 						#chip drivers/generic/generic
 						#	device pci 4.0 on
@@ -91,13 +91,13 @@
 						#		irq 2 = 0x12
 						#		irq 3 = 0x13
 						#	end
-						#end 
+						#end
 
 					end
 					# LPC bridge
 					device pci 1.0 on
 						chip superio/nsc/pc87360
-							device	pnp 2e.0 off  # Floppy 
+							device	pnp 2e.0 off  # Floppy
 								 io 0x60 = 0x3f0
 								irq 0x70 = 6
 								drq 0x74 = 2
@@ -124,7 +124,7 @@
 							device pnp 2e.7 off end # GPIO
 							device pnp 2e.8 off end # ACB
 							device pnp 2e.9 off end # FSCM
-							device pnp 2e.a off end # WDT  
+							device pnp 2e.a off end # WDT
 						end
 					end
 					device pci 1.1 on end	# IDE
@@ -132,8 +132,8 @@
 					device pci 1.3 on 	# System Management
 						chip drivers/generic/generic
 							#phillips pca9545 smbus mux
-							device i2c 70 on 
-								# analog_devices adm1026	
+							device i2c 70 on
+								# analog_devices adm1026
 								chip drivers/generic/generic
 									device i2c 2c on end
 								end
@@ -147,33 +147,33 @@
 						end
 						chip drivers/generic/generic #dimm 0-0-1
 							device i2c 51 on end
-						end 
+						end
 						chip drivers/generic/generic #dimm 0-1-0
 							device i2c 52 on end
-						end 
+						end
 						chip drivers/generic/generic #dimm 0-1-1
 							device i2c 53 on end
-						end 
+						end
 						chip drivers/generic/generic #dimm 1-0-0
-							device i2c 54 on end 
+							device i2c 54 on end
 						end
 						chip drivers/generic/generic #dimm 1-0-1
 							device i2c 55 on end
-						end 
+						end
 						chip drivers/generic/generic #dimm 1-1-0
 							device i2c 56 on end
-						end 
+						end
 						chip drivers/generic/generic #dimm 1-1-1
 							device i2c 57 on end
-						end 
+						end
 					end
 					device pci 1.5 off end	# AC97 Audio
 					device pci 1.6 on  end	# AC97 Modem
 					register "ide0_enable" = "1"
 					register "ide1_enable" = "1"
 				end
-			end #  device pci 18.0 
-			
+			end #  device pci 18.0
+
 			device pci 18.0 on end # LDT1
 			device pci 18.0 on end # LDT2
 			device pci 18.1 on end
@@ -188,6 +188,6 @@
 			device pci 19.2 on end
 			device pci 19.3 on end
 		end
-	end 
+	end
 end
 

Modified: trunk/src/mainboard/arima/hdama/irq_tables.c
==============================================================================
--- trunk/src/mainboard/arima/hdama/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/arima/hdama/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -12,7 +12,7 @@
 	{linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
 
 /*  Each IRQ_SLOT entry consists of:
- *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu  
+ *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu
  */
 
 const struct irq_routing_table intel_irq_routing_table = {

Modified: trunk/src/mainboard/arima/hdama/mptable.c
==============================================================================
--- trunk/src/mainboard/arima/hdama/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/arima/hdama/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -4,7 +4,7 @@
 #include <string.h>
 #include <stdint.h>
 #include <cpu/x86/lapic.h>
-#include <arch/cpu.h>                                                                      
+#include <arch/cpu.h>
 #include <arch/io.h>
 
 #define HT_INIT_CONTROL 0x6c
@@ -26,7 +26,7 @@
         unsigned cpu_feature_flags;
         struct cpuid_result result;
         device_t cpu;
-                                                                                
+
         boot_apic_id = lapicid();
         apic_version = lapic_read(LAPIC_LVR) & 0xff;
         result = cpuid(1);
@@ -57,7 +57,7 @@
             }
 	}
 }
-                                                                                
+
 static unsigned node_link_to_bus(unsigned node, unsigned link)
 {
 	device_t dev;
@@ -79,12 +79,12 @@
 		dst_node = (config_map >> 4) & 7;
 		dst_link = (config_map >> 8) & 3;
 		bus_base = (config_map >> 16) & 0xff;
-#if 0				
+#if 0
 		printk(BIOS_DEBUG, "node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
 			dst_node, dst_link, bus_base,
 			reg, config_map);
 #endif
-		if ((dst_node == node) && (dst_link == link)) 
+		if ((dst_node == node) && (dst_link == link))
 		{
 			return bus_base;
 		}

Modified: trunk/src/mainboard/artecgroup/Kconfig
==============================================================================
--- trunk/src/mainboard/artecgroup/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/artecgroup/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_ARTEC_GROUP
-        
+
 source "src/mainboard/artecgroup/dbe61/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/artecgroup/dbe61/spd_table.h
==============================================================================
--- trunk/src/mainboard/artecgroup/dbe61/spd_table.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/artecgroup/dbe61/spd_table.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -27,7 +27,7 @@
 
 /* Save space by using a short list of SPD values used by Geode LX Memory init */
 /* 128MB */
-const struct spd_entry spd_table [] = 
+const struct spd_entry spd_table [] =
 {
 {SPD_MEMORY_TYPE,                     0x07}, /* (Fundamental) memory type */
 {SPD_NUM_ROWS,                        0x0D}, /* Number of row address bits */

Modified: trunk/src/mainboard/asus/a8n_e/irq_tables.c
==============================================================================
--- trunk/src/mainboard/asus/a8n_e/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/asus/a8n_e/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -67,7 +67,7 @@
 	uint8_t *v, sum = 0;
 	int i;
 
-	/* get_bus_conf() will find out all bus num and APIC that share with 
+	/* get_bus_conf() will find out all bus num and APIC that share with
 	 * mptable.c and mptable.c.
 	 */
 	get_bus_conf();

Modified: trunk/src/mainboard/asus/a8v-e_se/acpi_tables.c
==============================================================================
--- trunk/src/mainboard/asus/a8v-e_se/acpi_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/asus/a8v-e_se/acpi_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,7 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Written by Stefan Reinauer <stepan at openbios.org>.
- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by
  *
  * Copyright (C) 2004 Stefan Reinauer <stepan at openbios.org>
  * Copyright (C) 2005 Nick Barker <nick.barker9 at btinternet.com>
@@ -71,7 +71,7 @@
 
 	/* IRQ0 -> APIC IRQ2. */
 	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
-						current, 0, 0, 2, 0x0);	
+						current, 0, 0, 2, 0x0);
 
 	/* Create all subtables for processors. */
 	current = acpi_create_madt_lapic_nmis(current,

Modified: trunk/src/mainboard/asus/a8v-e_se/romstage.c
==============================================================================
--- trunk/src/mainboard/asus/a8v-e_se/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/asus/a8v-e_se/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
  * (Written by Yinghai Lu <yinghailu at amd.com> for AMD)
  * Copyright (C) 2006 MSI
  * (Written by Bingxun Shi <bingxunshi at gmail.com> for MSI)
- * Copyright (C) 2007 Rudolf Marek <r.marek at assembler.cz> 
+ * Copyright (C) 2007 Rudolf Marek <r.marek at assembler.cz>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -180,7 +180,7 @@
 	};
 	unsigned bsp_apicid = 0;
 	int needs_reset = 0;
-	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE 
+	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
 		+ CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
 	sio_init();

Modified: trunk/src/mainboard/asus/m2v-mx_se/acpi_tables.c
==============================================================================
--- trunk/src/mainboard/asus/m2v-mx_se/acpi_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/asus/m2v-mx_se/acpi_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,7 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Written by Stefan Reinauer <stepan at openbios.org>.
- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by
  *
  * Copyright (C) 2004 Stefan Reinauer <stepan at openbios.org>
  * Copyright (C) 2005 Nick Barker <nick.barker9 at btinternet.com>
@@ -73,7 +73,7 @@
 
 	/* IRQ0 -> APIC IRQ2. */
 	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
-						current, 0, 0, 2, 0x0);	
+						current, 0, 0, 2, 0x0);
 
 	/* Create all subtables for processors. */
 	current = acpi_create_madt_lapic_nmis(current,

Modified: trunk/src/mainboard/asus/m2v-mx_se/dsdt.asl
==============================================================================
--- trunk/src/mainboard/asus/m2v-mx_se/dsdt.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/asus/m2v-mx_se/dsdt.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -60,7 +60,7 @@
 			Name (_ADR, 0x00)
 			Name (_UID, 0x00)
 			Name (_BBN, 0x00)
-			
+
 		    External (BUSN)
 		    External (MMIO)
 		    External (PCIO)
@@ -95,7 +95,7 @@
 				Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
 				Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
 				Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
-				Return (Local3) 
+				Return (Local3)
 			}
 
 			/* PCI Routing Table */
@@ -185,7 +185,7 @@
 					/* two LSB bits are blink rate */
 					LEDR,   2,
 				}
-				
+
 				/* PS/2 keyboard (seems to be important for WinXP install) */
 				Device (KBD)
 				{

Modified: trunk/src/mainboard/asus/m2v-mx_se/romstage.c
==============================================================================
--- trunk/src/mainboard/asus/m2v-mx_se/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/asus/m2v-mx_se/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
  * (Written by Yinghai Lu <yinghailu at amd.com> for AMD)
  * Copyright (C) 2006 MSI
  * (Written by Bingxun Shi <bingxunshi at gmail.com> for MSI)
- * Copyright (C) 2008 Rudolf Marek <r.marek at assembler.cz> 
+ * Copyright (C) 2008 Rudolf Marek <r.marek at assembler.cz>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by

Modified: trunk/src/mainboard/asus/mew-vm/devicetree.cb
==============================================================================
--- trunk/src/mainboard/asus/mew-vm/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/asus/mew-vm/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 chip northbridge/intel/i82810
-	device pci_domain 0 on 
+	device pci_domain 0 on
 		device pci 0.0 on end # Host bridge
 		device pci 1.0 on # Onboard Video
 			#	device pci 1.0 on end

Modified: trunk/src/mainboard/asus/mew-vm/irq_tables.c
==============================================================================
--- trunk/src/mainboard/asus/mew-vm/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/asus/mew-vm/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *
@@ -18,7 +18,7 @@
 	0x7120,		 /* Device */
 	0,		 /* Crap (miniport) */
 	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x89,		 /*  u8 checksum , this has to set to some value 
+	0x89,		 /*  u8 checksum , this has to set to some value
 that would give 0 after the sum of all bytes for this structure (including checksum) */
 	{
 		/* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */

Modified: trunk/src/mainboard/azza/Kconfig
==============================================================================
--- trunk/src/mainboard/azza/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/azza/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,7 +21,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_AZZA
-	
+
 source "src/mainboard/azza/pt-6ibd/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/biostar/Kconfig
==============================================================================
--- trunk/src/mainboard/biostar/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/biostar/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,7 +21,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_BIOSTAR
-	
+
 source "src/mainboard/biostar/m6tba/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/broadcom/Kconfig
==============================================================================
--- trunk/src/mainboard/broadcom/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/broadcom/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_BROADCOM
-        
+
 source "src/mainboard/broadcom/blast/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/broadcom/blast/devicetree.cb
==============================================================================
--- trunk/src/mainboard/broadcom/blast/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/broadcom/blast/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -6,7 +6,7 @@
         end
 	device pci_domain 0 on
 		chip northbridge/amd/amdk8
-			device pci 18.0 on #  northbridge 
+			device pci 18.0 on #  northbridge
                               #  devices on link 0
                                 chip southbridge/broadcom/bcm5780 # HT2000
                                         device pci 0.0 on end   # PXB 1 0x0130
@@ -95,7 +95,7 @@
                                                         device pnp 2e.10 on #RTC
 								 io 0x60 = 0x70
 								 io 0x62 = 0x72
-							end 
+							end
                                                 end
                                         end
                                         device pci 1.3 on end # WDTimer    0x0238
@@ -110,7 +110,7 @@
 			end #  device pci 18.0
 
                         device pci 18.0 on end
-                        device pci 18.0 on end  
+                        device pci 18.0 on end
 			device pci 18.1 on end
 			device pci 18.2 on end
 			device pci 18.3 on end

Modified: trunk/src/mainboard/broadcom/blast/get_bus_conf.c
==============================================================================
--- trunk/src/mainboard/broadcom/blast/get_bus_conf.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/broadcom/blast/get_bus_conf.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,7 +21,7 @@
 unsigned apicid_bcm5785[3];
 
 
-unsigned pci1234x[] = 
+unsigned pci1234x[] =
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
 	 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
@@ -115,9 +115,9 @@
 /*I/O APICs:	APIC ID	Version	State		Address*/
 #if CONFIG_LOGICAL_CPUS==1
 	apicid_base = get_apicid_base(3);
-#else 
-	apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+	apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
-	for(i=0;i<3;i++) 
+	for(i=0;i<3;i++)
 		apicid_bcm5785[i] = apicid_base+i;
 }

Modified: trunk/src/mainboard/broadcom/blast/irq_tables.c
==============================================================================
--- trunk/src/mainboard/broadcom/blast/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/broadcom/blast/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
@@ -16,7 +16,7 @@
                 uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                 uint8_t slot, uint8_t rfu)
 {
-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;
         pirq_info->devfn = devfn;
 
 	pirq_info->irq[0].link = link0;
@@ -64,22 +64,22 @@
 
 	pirq = (void *)(addr);
 	v = (uint8_t *)(addr);
-	
+
 	pirq->signature = PIRQ_SIGNATURE;
 	pirq->version  = PIRQ_VERSION;
-	
+
 	pirq->rtr_bus = bus_bcm5785_0;
 	pirq->rtr_devfn = (sysconf.sbdn<<3)|0;
 
 	pirq->exclusive_irqs = 0;
-	
+
 	pirq->rtr_vendor = 0x1166;
 	pirq->rtr_device = 0x0036;
 
 	pirq->miniport_data = 0;
 
 	memset(pirq->rfu, 0, sizeof(pirq->rfu));
-	
+
 	get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
 
 	pirq_info = (void *) ( &pirq->checksum + 1);
@@ -87,11 +87,11 @@
 //pci bridge
 	write_pirq_info(pirq_info, bus_bcm5785_0, (sysconf.sbdn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
 	pirq_info++; slot_num++;
-             
-	pirq->size = 32 + 16 * slot_num; 
+
+	pirq->size = 32 + 16 * slot_num;
 
         for (i = 0; i < pirq->size; i++)
-                sum += v[i];	
+                sum += v[i];
 
 	sum = pirq->checksum - sum;
 

Modified: trunk/src/mainboard/broadcom/blast/mptable.c
==============================================================================
--- trunk/src/mainboard/broadcom/blast/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/broadcom/blast/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -72,12 +72,12 @@
 				}
         	        }
 		}
-		
+
 	}
-	
+
 /*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_bcm5785[0], 0x0);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_bcm5785[0], 0x1); 
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_bcm5785[0], 0x1);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x0, apicid_bcm5785[0], 0x2);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x3, apicid_bcm5785[0], 0x3);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x4, apicid_bcm5785[0], 0x4);
@@ -89,7 +89,7 @@
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xc, apicid_bcm5785[0], 0xc);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0xd, apicid_bcm5785[0], 0xd);
 
-//IDE	
+//IDE
 	outb(0x02, 0xc00); outb(0x0e, 0xc01);
 
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_bcm5785_0, ((1+sysconf.sbdn)<<2)|1, apicid_bcm5785[0], 0xe); // IDE
@@ -97,14 +97,14 @@
 //SATA
 	outb(0x07, 0xc00); outb(0x0f, 0xc01);
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_1, (0x0e<<2)|0, apicid_bcm5785[0], 0xf);
-	
+
 //USB
 	outb(0x01, 0xc00); outb(0x0a, 0xc01);
         for(i=0;i<3;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, ((2+sysconf.sbdn)<<2)|i, apicid_bcm5785[0], 0xa); //
         }
 
-	
+
 
         /* enable int */
         /* why here? must get the BAR and PCI command bit 1 set before enable it ....*/
@@ -127,13 +127,13 @@
         }
 
 
-//pci slot (on bcm5785)  
+//pci slot (on bcm5785)
         for(i=0;i<4;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, (4<<2)|i, apicid_bcm5785[1], i%2); //
         }
 
 
-//onboard ati 
+//onboard ati
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, (5<<2)|0, apicid_bcm5785[1], 0x1);
 
 //PCI-X on bcm5780
@@ -157,7 +157,7 @@
         }
 
 
-// Second PCI-E x8 
+// Second PCI-E x8
         for(i=0;i<4;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[3], (0<<2)|i, apicid_bcm5785[1], 0xc); //
         }

Modified: trunk/src/mainboard/broadcom/blast/resourcemap.c
==============================================================================
--- trunk/src/mainboard/broadcom/blast/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/broadcom/blast/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -119,7 +119,7 @@
 		PCI_ADDR(0, 0x18, 1, 0xA4), 0x00000048, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xAC), 0x00000048, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xB4), 0x00000048, 0x00000000,
-		PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff00, 
+		PCI_ADDR(0, 0x18, 1, 0xBC), 0x00000048, 0x00ffff00,
 
 		/* Memory-Mapped I/O Base i Registers
 		 * F1:0x80 i = 0
@@ -144,7 +144,7 @@
 		 *	   1 = base/limit registers i are read-only
 		 * [ 7: 4] Reserved
 		 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-		 *	   This field defines the upper address bits of a 40bit address 
+		 *	   This field defines the upper address bits of a 40bit address
 		 *	   that defines the start of memory-mapped I/O region i
 		 */
 		PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -181,7 +181,7 @@
 		 *	   This field defines the end of PCI I/O region n
 		 * [31:25] Reserved
 		 */
-		PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff000, 
+		PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff000,
 		PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
@@ -200,7 +200,7 @@
 		 * [ 3: 2] Reserved
 		 * [ 4: 4] VGA Enable
 		 *	   0 = VGA matches Disabled
-		 *	   1 = matches all address < 64K and where A[9:0] is in the 
+		 *	   1 = matches all address < 64K and where A[9:0] is in the
 		 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 		 * [ 5: 5] ISA Enable
 		 *	   0 = ISA matches Disabled
@@ -208,7 +208,7 @@
 		 *	       from matching agains this base/limit pair
 		 * [11: 6] Reserved
 		 * [24:12] PCI I/O Base i
-		 *	   This field defines the start of PCI I/O region n 
+		 *	   This field defines the start of PCI I/O region n
 		 * [31:25] Reserved
 		 */
 		PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
@@ -252,8 +252,8 @@
 		 * [31:24] Bus Number Limit i
 		 *	   This field defines the highest bus number in configuration regin i
 		 */
-		PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x08000003, 
-		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x08000003,
+		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
 	};

Modified: trunk/src/mainboard/broadcom/blast/romstage.c
==============================================================================
--- trunk/src/mainboard/broadcom/blast/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/broadcom/blast/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -3,7 +3,7 @@
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
 #endif
- 
+
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -75,7 +75,7 @@
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */
-#include "resourcemap.c" 
+#include "resourcemap.c"
 
 #include "cpu/amd/dualcore/dualcore.c"
 
@@ -109,7 +109,7 @@
         struct mem_controller ctrl[8];
         unsigned nodes;
 
-        if (!cpu_init_detectedx && boot_cpu()) {  
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 
@@ -130,7 +130,7 @@
 
 	pc87417_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 //	post_code(0x33);
-	
+
         uart_init();
 //	post_code(0x34);
 
@@ -142,7 +142,7 @@
 	print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
         setup_blast_resource_map();
-	
+
 #if 0
         dump_pci_device(PCI_DEV(0, 0x18, 0));
 	dump_pci_device(PCI_DEV(0, 0x19, 0));
@@ -174,7 +174,7 @@
 
 	enable_smbus();
 
-#if 0 
+#if 0
         int i;
         for(i=4;i<8;i++) {
                 change_i2c_mux(i);

Modified: trunk/src/mainboard/compaq/Kconfig
==============================================================================
--- trunk/src/mainboard/compaq/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/compaq/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,7 +21,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_COMPAQ
-	
+
 source "src/mainboard/compaq/deskpro_en_sff_p600/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/dell/s1850/debug.c
==============================================================================
--- trunk/src/mainboard/dell/s1850/debug.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/dell/s1850/debug.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
-                                                                                
+
         outb(index, 0x2e);
         data = inb(0x2f);
 	print_debug("0x");
@@ -15,7 +15,7 @@
 	print_debug("\n");
         return;
 }
-        
+
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
@@ -25,7 +25,7 @@
         outb(0x01, 0x2f);
 	return;
 }
-                                                                        
+
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
@@ -43,27 +43,27 @@
         print_reg(0x75);
         return;
 }
-                                                                                
+
 static void siodump(void)
 {
         int i;
         unsigned char data;
-       
+
 	 print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
-#if 0                                                                         
+#if 0
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
-                                                                                
+
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
@@ -82,13 +82,13 @@
 	print_debug("\nGPDI 4: 0x");
 	print_debug_hex8(data);
 	print_debug("\n");
-	
-#if 0                                                                                
-                                                                                
+
+#if 0
+
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
@@ -103,11 +103,11 @@
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
-                                                                                
+
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
-#endif                                                                           
+#endif
         return;
 }
 
@@ -124,8 +124,8 @@
 static void print_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -144,7 +144,7 @@
 	int i;
 	print_debug_pci_dev(dev);
 	print_debug("\n");
-	
+
 	for(i = 0; i <= 255; i++) {
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
@@ -164,19 +164,19 @@
 {
 	int i;
 	unsigned long bar;
-	
+
 	print_debug("BAR 14 Dump\n");
-	
+
 	bar = pci_read_config32(dev, 0x14);
 	for(i = 0; i <= 0x300; i+=4) {
-#if 0		
+#if 0
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
 			print_debug_hex8(i);
 			print_debug_char(':');
 		}
 		val = pci_read_config8(dev, i);
-#endif		
+#endif
 		if((i%4)==0) {
 		print_debug("\n");
 		print_debug_hex16(i);
@@ -191,8 +191,8 @@
 static void dump_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -215,7 +215,7 @@
         	print_debug("\n");
                 print_debug("dimm ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 256) ; i++) {
 	                unsigned char byte;
                         if ((i % 16) == 0) {
@@ -228,7 +228,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -248,7 +248,7 @@
 		print_debug("\n");
 		print_debug("dimm ");
 		print_debug_hex8(device);
-		
+
 		status = smbus_read_byte(device, 0);
 		if (status < 0) {
 			print_debug("bad device: ");
@@ -272,7 +272,7 @@
         	print_debug("\n");
                 print_debug("ipmi ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 8) ; i++) {
 	                unsigned char byte;
 			status = smbus_read_byte(device, 2);
@@ -280,7 +280,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -288,4 +288,4 @@
 		device += SMBUS_MEM_DEVICE_INC;
 		print_debug("\n");
 	}
-}	
+}

Modified: trunk/src/mainboard/dell/s1850/devicetree.cb
==============================================================================
--- trunk/src/mainboard/dell/s1850/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/dell/s1850/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,23 +1,23 @@
 chip northbridge/intel/e7520 # mch
-	device pci_domain 0 on 
+	device pci_domain 0 on
 		chip southbridge/intel/i82801ex # i82801er
 			# USB ports
 			device pci 1d.0 on end
 			device pci 1d.1 on end
-			device pci 1d.2 on end 
+			device pci 1d.2 on end
 			device pci 1d.3 on end
 			device pci 1d.7 on end
-		
+
 			# -> Bridge
 			device pci 1e.0 on end
-		
+
 			# -> ISA
-			device pci 1f.0 on 
+			device pci 1f.0 on
 				chip superio/nsc/pc8374
 					device pnp 2e.0 off end
 					device pnp 2e.1 off end
 					device pnp 2e.2 off end
-					device pnp 2e.3 on 
+					device pnp 2e.3 on
 						 io 0x60 = 0x3f8
 						irq 0x70 = 4
 					end
@@ -30,22 +30,22 @@
 			end
 			# -> IDE
 			device pci 1f.1 on end
-			# -> SATA 
+			# -> SATA
 			device pci 1f.2 on end
 			device pci 1f.3 on end
 
 			register "pirq_a_d" = "0x8a07030b"
 			register "pirq_e_h" = "0x85808080"
 		end
-		device pci 00.0 on end 
+		device pci 00.0 on end
 		device pci 00.1 on end
-		device pci 01.0 on end 
-		device pci 02.0 on 
+		device pci 01.0 on end
+		device pci 02.0 on
 			chip southbridge/intel/pxhd # pxhd1
 				# Bus bridges and ioapics usually bus 1
-				device pci 0.0 on 
+				device pci 0.0 on
 				# On board gig e1000
-					chip drivers/generic/generic 
+					chip drivers/generic/generic
         		        	        device pci 03.0 on end
         		        	        device pci 03.1 on end
         		        	end

Modified: trunk/src/mainboard/dell/s1850/irq_tables.c
==============================================================================
--- trunk/src/mainboard/dell/s1850/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/dell/s1850/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,8 +1,8 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) by the coreboot pirq tool. 
- * This file was programatically generated. 
+ * Copyright (C) by the coreboot pirq tool.
+ * This file was programatically generated.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by

Modified: trunk/src/mainboard/dell/s1850/mptable.c
==============================================================================
--- trunk/src/mainboard/dell/s1850/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/dell/s1850/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -36,7 +36,7 @@
 	mc->reserved = 0;
 
 	smp_write_processors(mc);
-	
+
 	{
 		device_t dev;
 
@@ -98,9 +98,9 @@
 
 			bus_pxhd_4 = 6;
 		}
-	
+
 	}
-	
+
 	/* define bus and isa numbers */
 	for(bus_num = 0; bus_num < bus_isa; bus_num++) {
 		smp_write_bus(mc, bus_num, "PCI	  ");
@@ -135,7 +135,7 @@
 		else {
 			printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
 		}
-	}	
+	}
 	/* ISA backward compatibility interrupts  */
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
 		bus_isa, 0x00, 0x02, 0x00);

Modified: trunk/src/mainboard/dell/s1850/romstage.c
==============================================================================
--- trunk/src/mainboard/dell/s1850/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/dell/s1850/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -65,7 +65,7 @@
 
 static inline void  ibfzero(void)
 {
-	while(inb(ipmicsr) &  (1<<IBF)) 
+	while(inb(ipmicsr) &  (1<<IBF))
 		;
 }
 static inline void  clearobf(void)
@@ -75,7 +75,7 @@
 
 static inline void  waitobf(void)
 {
-	while((inb(ipmicsr) &  (1<<OBF)) == 0) 
+	while((inb(ipmicsr) &  (1<<OBF)) == 0)
 		;
 }
 /* quite possibly the stupidest interface ever designed. */
@@ -162,8 +162,8 @@
 	u32 l;
 	int do_reset;
 	/*
-	 * 
-	 * 
+	 *
+	 *
 	 */
 	static const struct mem_controller mch[] = {
 		{
@@ -192,9 +192,9 @@
 		0,
 	};
 
-	/* using SerialICE, we've seen this basic reset sequence on the dell. 
+	/* using SerialICE, we've seen this basic reset sequence on the dell.
 	 * we don't understand it as it uses undocumented registers, but
-	 * we're going to clone it. 
+	 * we're going to clone it.
 	 */
 	/* enable a hidden device. */
 	b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
@@ -217,11 +217,11 @@
 	b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
 	b &= ~0x8;
 	pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);
-	
+
 	/* set up LPC bridge bits, some of which reply on undocumented
 	 * registers
 	 */
-	
+
 	b= pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xd8);
 	b |= 4;
 	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd8, b);
@@ -244,9 +244,9 @@
 	w = inw(0x866);
 	outw(w|2, 0x866);
 
-#if 0 
+#if 0
 	/*seriaice shows
-	dell does this so leave it here so I don't forget 
+	dell does this so leave it here so I don't forget
  	 */
 	/* SMBUS */
 	pci_write_config16(PCI_DEV(0, 0x1f, 3), 0x20, 0x08c0);
@@ -260,7 +260,7 @@
 	b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
 	b |= 2;
 	pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);
-	
+
 	/* ?? */
 	l = pci_read_config32(PCI_DEV(0, 8, 0), 0xc0);
 	do_reset = l & 0x8000000;
@@ -334,7 +334,7 @@
 #endif
 	disable_watchdogs();
 //	dump_ipmi_registers();
-	mainboard_set_e7520_leds();	
+	mainboard_set_e7520_leds();
 
 	sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
@@ -345,7 +345,7 @@
 //	dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
-#if 1 // temporarily disabled 
+#if 1 // temporarily disabled
 	/* Check the first 1M */
 //	ram_check(0x00000000, 0x000100000);
 //	ram_check(0x00000000, 0x000a0000);
@@ -357,8 +357,8 @@
 #if 0
 	ram_check(0x00000000, 0x02000000);
 #endif
-	
-#if 0	
+
+#if 0
 	while(1) {
 		hlt();
 	}

Modified: trunk/src/mainboard/dell/s1850/s1850_fixups.c
==============================================================================
--- trunk/src/mainboard/dell/s1850/s1850_fixups.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/dell/s1850/s1850_fixups.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -9,13 +9,13 @@
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {
-	return; 
+	return;
 }
 
 
 static void mainboard_set_e7520_leds(void)
 {
-	return; 
+	return;
 }
 
 static void mainboard_set_ich5(void)
@@ -28,8 +28,8 @@
 	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xe3, 0xc0);
 	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xf0, 0x0);
 	/* disable certain devices -- see data sheet -- this is from
-	 * dell settings via lspci 
-	 * Note that they leave SMBUS disabled -- 8f6f. 
+	 * dell settings via lspci
+	 * Note that they leave SMBUS disabled -- 8f6f.
 	 * we leave it enabled and visible in config space -- 8f66
 	 */
 	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xf2, 0x8f66);
@@ -38,7 +38,7 @@
 	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x5c, 0x10);
 
 	/* now the fun begins ... enable the GPIOs as done on factory */
-	/* factory config from IO ports 
+	/* factory config from IO ports
 	 * It has a few more things enabled than default!
 	 */
 	outl(0x1ae0f183, 0x880);

Modified: trunk/src/mainboard/dell/s1850/watchdog.c
==============================================================================
--- trunk/src/mainboard/dell/s1850/watchdog.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/dell/s1850/watchdog.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -31,17 +31,17 @@
 	value = pci_read_config16(dev, 0x04);
 	value |= (1 << 10);
 	pci_write_config16(dev, 0x04, value);
-	
+
 	/* Set and enable acpibase */
 	pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
 	pci_write_config8(dev, 0x44, 0x10);
 	base = ICH5_WDBASE + 0x60;
-	
+
 	/* Set bit 11 in TCO1_CNT */
 	value = inw(base + 0x08);
 	value |= 1 << 11;
 	outw(value, base + 0x08);
-	
+
 	/* Clear TCO timeout status */
 	outw(0x0008, base + 0x04);
 	outw(0x0002, base + 0x06);

Modified: trunk/src/mainboard/digitallogic/Kconfig
==============================================================================
--- trunk/src/mainboard/digitallogic/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/digitallogic/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_DIGITAL_LOGIC
-        
+
 source "src/mainboard/digitallogic/adl855pc/Kconfig"
 source "src/mainboard/digitallogic/msm586seg/Kconfig"
 source "src/mainboard/digitallogic/msm800sev/Kconfig"

Modified: trunk/src/mainboard/digitallogic/adl855pc/devicetree.cb
==============================================================================
--- trunk/src/mainboard/digitallogic/adl855pc/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/digitallogic/adl855pc/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 chip northbridge/intel/i855
-	device pci_domain 0 on 
+	device pci_domain 0 on
 		device pci 0.0 on end
 		device pci 1.0 on end
 		chip southbridge/intel/i82801dx
@@ -51,7 +51,7 @@
                 	end
 		end
 	end
-	device apic_cluster 0 on 
+	device apic_cluster 0 on
 		chip cpu/intel/socket_mPGA479M
 			device apic 0 on end
 		end

Modified: trunk/src/mainboard/digitallogic/adl855pc/irq_tables.c
==============================================================================
--- trunk/src/mainboard/digitallogic/adl855pc/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/digitallogic/adl855pc/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 

Modified: trunk/src/mainboard/digitallogic/adl855pc/romstage.c
==============================================================================
--- trunk/src/mainboard/digitallogic/adl855pc/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/digitallogic/adl855pc/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -15,7 +15,7 @@
 #include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"
 #include "northbridge/intel/i855/raminit.h"
 #include "northbridge/intel/i855/debug.c"
-#include "superio/winbond/w83627hf/w83627hf_early_serial.c" 
+#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 
@@ -45,7 +45,7 @@
 		init_timer();
 #endif
 	}
-        
+
         w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
@@ -66,7 +66,7 @@
 
 		sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
 
-	} 
+	}
 
 #if 0
 	dump_pci_devices();
@@ -76,7 +76,7 @@
 	ram_check(0x00000000, msr.lo+(msr.hi<<32));
 	// Check 16MB of memory @ 0
 	ram_check(0x00000000, 0x01000000);
-	// Check 16MB of memory @ 2GB 
+	// Check 16MB of memory @ 2GB
 	ram_check(0x80000000, 0x81000000);
 #endif
 }

Modified: trunk/src/mainboard/digitallogic/msm586seg/devicetree.cb
==============================================================================
--- trunk/src/mainboard/digitallogic/msm586seg/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/digitallogic/msm586seg/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 chip cpu/amd/sc520
-	device pci_domain 0 on 
+	device pci_domain 0 on
 		device pci 0.0 on end
 		device pci 12.0 on end # enet
 		device pci 14.0 on end # 69000

Modified: trunk/src/mainboard/digitallogic/msm586seg/irq_tables.c
==============================================================================
--- trunk/src/mainboard/digitallogic/msm586seg/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/digitallogic/msm586seg/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

Modified: trunk/src/mainboard/digitallogic/msm586seg/mainboard.c
==============================================================================
--- trunk/src/mainboard/digitallogic/msm586seg/mainboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/digitallogic/msm586seg/mainboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -14,10 +14,10 @@
   int i;
   int irqlist[] = {0xd00, 0xd02, 0xd03, 0xd04, 0xd08, 0xd0a,
 	        0xd14, 0xd18, 0xd1a, 0xd1b, 0xd1c,
-		0xd20, 0xd21, 0xd22, 0xd28, 0xd29, 
+		0xd20, 0xd21, 0xd22, 0xd28, 0xd29,
 		0xd30, 0xd31, 0xd32, 0xd33,
-		0xd40, 0xd41, 0xd42, 0xd43,0xd44, 0xd45, 0xd46, 
-		0xd50, 0xd51, 0xd52, 0xd53,0xd54, 0xd55, 0xd56, 0xd57,0xd58, 0xd59, 0xd5a, 
+		0xd40, 0xd41, 0xd42, 0xd43,0xd44, 0xd45, 0xd46,
+		0xd50, 0xd51, 0xd52, 0xd53,0xd54, 0xd55, 0xd56, 0xd57,0xd58, 0xd59, 0xd5a,
 		-1};
   mmcr = (void *) 0xfffef000;
 
@@ -37,7 +37,7 @@
 	//volatile struct mmcrpic *pic = MMCRPIC;
 	volatile struct mmcr *mmcr = MMCRDEFAULT;
 
-	/* msm586seg has this register set to a weird value. 
+	/* msm586seg has this register set to a weird value.
 	 * follow the board, not the manual!
 	 */
 
@@ -47,7 +47,7 @@
 
 	/* from fuctory bios */
 	/* NOTE: the following interrupt settings made interrupts work
-	 * for hard drive, and serial, but not for ethernet 
+	 * for hard drive, and serial, but not for ethernet
 	 */
 	/* just do what they say and nobody gets hurt. */
 	mmcr->pic.pcicr = 0 ; // M_GINT_MODE | M_S1_MODE | M_S2_MODE;
@@ -78,7 +78,7 @@
 	printk(BIOS_ERR, "0xc22 0x%x\n", *(unsigned short *) 0xfffefc22);
 
 	/* The following block has NOT proven sufficient to get
-	 * the VGA hardware to talk to us 
+	 * the VGA hardware to talk to us
 	 */
 	/* let's set some mmcr stuff per the BIOS settings */
 	mmcr->dbctl.dbctl = 0x10;
@@ -100,20 +100,20 @@
 	 */
 	mmcr->sysmap.adddecctl = 0x10;
 
-	/* VGA now talks to us, so this adddecctl was the trick. 
-	 * still no interrupts from enet. 
-	 * Let's try fixing the piodata stuff, as there may be 
+	/* VGA now talks to us, so this adddecctl was the trick.
+	 * still no interrupts from enet.
+	 * Let's try fixing the piodata stuff, as there may be
 	 * some wire there not documented.
 	 */
 	mmcr->pio.data31_16 = 0xffbf;
 	/* also, our sl?picmode needs to match fuctory bios */
 	mmcr->pic.sl1picmode = 0x80;
 	mmcr->pic.sl2picmode = 0x0;
-	/* and, finally, they do set gp5imap and we don't. 
+	/* and, finally, they do set gp5imap and we don't.
 	 */
 	mmcr->pic.gp5imap = 0xd;
 	/* remaining problem: almost certainly, the irq table is bogus
-	 * NO SHOCK as it came from fuctory bios. 
+	 * NO SHOCK as it came from fuctory bios.
 	 * but let's try these 4 changes for now and see what shakes.
 	 */
 	/* still not interrupts. */

Modified: trunk/src/mainboard/digitallogic/msm586seg/romstage.c
==============================================================================
--- trunk/src/mainboard/digitallogic/msm586seg/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/digitallogic/msm586seg/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -74,7 +74,7 @@
 /* these values taken from the msm board itself.
  * and they cause the board to not even come out of calibrating_delay_loop
  * if you can believe it. Our problem right now is no IDE or serial interrupts
- * So we'll try to put interrupts in, one at a time. IDE first. 
+ * So we'll try to put interrupts in, one at a time. IDE first.
  */
 	cp = (volatile unsigned char *) 0xfffefd00;
 	*cp =  0x11;
@@ -179,9 +179,9 @@
 		print_err("HI THERE!\n");
 		//			sizemem();
 	staticmem();
-	print_err("c60 is "); print_err_hex16(*(unsigned short *)0xfffefc60); 
+	print_err("c60 is "); print_err_hex16(*(unsigned short *)0xfffefc60);
 	print_err("\n");
-			
+
 	//			while(1)
 	print_err("STATIC MEM DONE\n");
 	outb(0xee, 0x80);
@@ -198,18 +198,18 @@
 			 "jnz 1b\n\t"
 			 :
 			 : "a" (0), "D" (0), "c" (1024*1024)
-			 ); 
-	
-	
+			 );
+
+
 #endif
-	
+
 #if 0
 	dump_pci_devices();
 #endif
 #if 0
 	dump_pci_device(PCI_DEV(0, 0, 0));
 #endif
-	
+
 #if 0
 	print_err("RAM CHECK!\n");
 	// Check 16MB of memory @ 0
@@ -223,10 +223,10 @@
 #if 1
 	{
 	  volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x60000;
-	  volatile unsigned char *dst = (unsigned char *) 0x4000; 
+	  volatile unsigned char *dst = (unsigned char *) 0x4000;
 	  for(i = 0; i < 0x20000; i++) {
 	    /*
-	      print_err("Set dst "); print_err_hex32((unsigned long) dst); 
+	      print_err("Set dst "); print_err_hex32((unsigned long) dst);
 	      print_err(" to "); print_err_hex32(*src); print_err("\n");
 	    */
 	    *dst = *src;
@@ -244,10 +244,10 @@
 			 "jmp *%%edi\n\t"
 			 :
 			 : "a" (0x4000)
-			 ); 
-	
+			 );
+
 	print_err("Oh dear, I'm afraid it didn't work...\n");
-	
+
 	while(1);
 #endif
 }

Modified: trunk/src/mainboard/digitallogic/msm800sev/devicetree.cb
==============================================================================
--- trunk/src/mainboard/digitallogic/msm800sev/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/digitallogic/msm800sev/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 chip northbridge/amd/lx
-  	device pci_domain 0 on 
+  	device pci_domain 0 on
     		device pci 1.0 on end
 		device pci 1.1 on end
       		chip southbridge/amd/cs5536
@@ -57,7 +57,7 @@
 						io 0x60 = 0x220
 						io 0x62 = 0x300
 						irq 0x70 = 9
-					end						
+					end
 					device pnp 2e.8 off end #  GPIO2
 					device pnp 2e.9 off end #  GPIO3
 					device pnp 2e.a off end #  ACPI

Modified: trunk/src/mainboard/digitallogic/msm800sev/romstage.c
==============================================================================
--- trunk/src/mainboard/digitallogic/msm800sev/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/digitallogic/msm800sev/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -93,7 +93,7 @@
 	print_err("POST 02\n");
 	__asm__("wbinvd\n");
 	print_err("Past wbinvd\n");
-	/* we are finding the return does not work on this board. Explicitly call the label that is 
+	/* we are finding the return does not work on this board. Explicitly call the label that is
 	 * after the call to us. This is gross, but sometimes at this level it is the only way out
 	 */
 	void done_cache_as_ram_main(void);

Modified: trunk/src/mainboard/eaglelion/5bcm/devicetree.cb
==============================================================================
--- trunk/src/mainboard/eaglelion/5bcm/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/eaglelion/5bcm/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 chip northbridge/amd/gx1
-  device pci_domain 0 on 
+  device pci_domain 0 on
     device pci 0.0 on end
       chip southbridge/amd/cs5530
         device pci 12.0 on

Modified: trunk/src/mainboard/eaglelion/5bcm/irq_tables.c
==============================================================================
--- trunk/src/mainboard/eaglelion/5bcm/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/eaglelion/5bcm/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

Modified: trunk/src/mainboard/eaglelion/5bcm/romstage.c
==============================================================================
--- trunk/src/mainboard/eaglelion/5bcm/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/eaglelion/5bcm/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -28,11 +28,11 @@
 
 	/* Halt if there was a built in self test failure */
 	report_bist_failure(bist);
-	
+
 	cs5530_enable_rom();
 
 	sdram_init();
-	
+
 	/* Check all of memory */
 #if 0
 	ram_check(0x00000000, msr.lo);

Modified: trunk/src/mainboard/emulation/qemu-x86/devicetree.cb
==============================================================================
--- trunk/src/mainboard/emulation/qemu-x86/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/emulation/qemu-x86/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 chip mainboard/emulation/qemu-x86
-	device pci_domain 0 on 
+	device pci_domain 0 on
 		device pci 0.0 on end
 
 		chip southbridge/intel/i82371eb # southbridge

Modified: trunk/src/mainboard/emulation/qemu-x86/irq_tables.c
==============================================================================
--- trunk/src/mainboard/emulation/qemu-x86/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/emulation/qemu-x86/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

Modified: trunk/src/mainboard/emulation/qemu-x86/mainboard.c
==============================================================================
--- trunk/src/mainboard/emulation/qemu-x86/mainboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/emulation/qemu-x86/mainboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -25,8 +25,8 @@
 	 */
 	pc_keyboard_init(0);
 
-	/* The PIRQ table is not working well for interrupt routing purposes. 
-	 * so we'll just set the IRQ directly. 
+	/* The PIRQ table is not working well for interrupt routing purposes.
+	 * so we'll just set the IRQ directly.
 	*/
 	printk(BIOS_INFO, "setting ethernet\n");
 	pci_assign_irqs(0, 3, enetIrqs);

Modified: trunk/src/mainboard/emulation/qemu-x86/romstage.c
==============================================================================
--- trunk/src/mainboard/emulation/qemu-x86/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/emulation/qemu-x86/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,10 +17,10 @@
 {
 	/*	init_timer();*/
 	post_code(0x05);
-	
+
 	uart_init();
 	console_init();
-	
+
 	//print_pci_devices();
 	//dump_pci_devices();
 }

Modified: trunk/src/mainboard/gigabyte/Kconfig
==============================================================================
--- trunk/src/mainboard/gigabyte/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,7 +21,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_GIGABYTE
-        
+
 source "src/mainboard/gigabyte/ga_2761gxdk/Kconfig"
 source "src/mainboard/gigabyte/ga-6bxc/Kconfig"
 source "src/mainboard/gigabyte/m57sli/Kconfig"

Modified: trunk/src/mainboard/gigabyte/ga_2761gxdk/Kconfig
==============================================================================
--- trunk/src/mainboard/gigabyte/ga_2761gxdk/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/ga_2761gxdk/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -14,7 +14,7 @@
 	select LIFT_BSP_APIC_ID
 	select K8_REV_F_SUPPORT
 	select BOARD_ROMSIZE_KB_512
- 
+
 config MAINBOARD_DIR
 	string
 	default gigabyte/ga_2761gxdk
@@ -24,7 +24,7 @@
 	hex
 	default 0xc8000
 	depends on BOARD_GIGABYTE_GA_2761GXDK
-	
+
 config DCACHE_RAM_SIZE
 	hex
 	default 0x08000
@@ -36,7 +36,7 @@
 	depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config APIC_ID_OFFSET
-	hex	
+	hex
 	default 0x10
 	depends on BOARD_GIGABYTE_GA_2761GXDK
 
@@ -76,7 +76,7 @@
 	depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
-	bool	
+	bool
 	default n
 	depends on BOARD_GIGABYTE_GA_2761GXDK
 
@@ -86,12 +86,12 @@
 	depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config HT_CHAIN_END_UNITID_BASE
-	hex	
+	hex
 	default 0x20
 	depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config SERIAL_CPU_INIT
-	bool	
+	bool
 	default n
 	depends on BOARD_GIGABYTE_GA_2761GXDK
 

Modified: trunk/src/mainboard/gigabyte/m57sli/Kconfig
==============================================================================
--- trunk/src/mainboard/gigabyte/m57sli/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/m57sli/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,17 +17,17 @@
 	select HAVE_ACPI_TABLES
 	select K8_REV_F_SUPPORT
 	select BOARD_ROMSIZE_KB_512
- 
+
 config MAINBOARD_DIR
 	string
-	default gigabyte/m57sli 
+	default gigabyte/m57sli
 	depends on BOARD_GIGABYTE_M57SLI
 
 config DCACHE_RAM_BASE
 	hex
 	default 0xc8000
 	depends on BOARD_GIGABYTE_M57SLI
-	
+
 config DCACHE_RAM_SIZE
 	hex
 	default 0x08000
@@ -39,7 +39,7 @@
 	depends on BOARD_GIGABYTE_M57SLI
 
 config APIC_ID_OFFSET
-	hex	
+	hex
 	default 0x10
 	depends on BOARD_GIGABYTE_M57SLI
 
@@ -79,7 +79,7 @@
 	depends on BOARD_GIGABYTE_M57SLI
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
-	bool	
+	bool
 	default n
 	depends on BOARD_GIGABYTE_M57SLI
 
@@ -89,12 +89,12 @@
 	depends on BOARD_GIGABYTE_M57SLI
 
 config HT_CHAIN_END_UNITID_BASE
-	hex	
+	hex
 	default 0x20
 	depends on BOARD_GIGABYTE_M57SLI
 
 config SERIAL_CPU_INIT
-	bool	
+	bool
 	default n
 	depends on BOARD_GIGABYTE_M57SLI
 

Modified: trunk/src/mainboard/gigabyte/m57sli/Makefile.inc
==============================================================================
--- trunk/src/mainboard/gigabyte/m57sli/Makefile.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/m57sli/Makefile.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 ##
 ## This file is part of the coreboot project.
-## 
+##
 ## Copyright (C) 2007-2008 coresystems GmbH
 ##
 ## This program is free software; you can redistribute it and/or modify

Modified: trunk/src/mainboard/gigabyte/m57sli/acpi_tables.c
==============================================================================
--- trunk/src/mainboard/gigabyte/m57sli/acpi_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/m57sli/acpi_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,7 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Written by Stefan Reinauer <stepan at openbios.org>.
- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by
  *
  * Copyright (C) 2004 Stefan Reinauer <stepan at openbios.org>
  * Copyright (C) 2005 Nick Barker <nick.barker9 at btinternet.com>
@@ -47,14 +47,14 @@
 	unsigned int gsi_base = 0x18;
 	extern unsigned char bus_mcp55[8];
 	extern unsigned apicid_mcp55;
-	
+
 	unsigned sbdn;
 	struct resource *res;
 	device_t dev;
 
 	get_bus_conf();
 	sbdn = sysconf.sbdn;
-	
+
 	/* Create all subtables for processors. */
 	current = acpi_create_madt_lapics(current);
 
@@ -84,7 +84,7 @@
 
 	/* IRQ0 -> APIC IRQ2. */
 	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
-		current, 0, 0, 2, 0x0);	
+		current, 0, 0, 2, 0x0);
 
 	/* Create all subtables for processors. */
 	current = acpi_create_madt_lapic_nmis(current,

Modified: trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c
==============================================================================
--- trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/m57sli/ap_romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -25,7 +25,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1

Modified: trunk/src/mainboard/gigabyte/m57sli/cmos.layout
==============================================================================
--- trunk/src/mainboard/gigabyte/m57sli/cmos.layout	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/m57sli/cmos.layout	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,23 +1,23 @@
-## 
+##
 ## This file is part of the coreboot project.
-## 
+##
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu at amd.com> for AMD.
-## 
+##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
-## 
+##
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
-## 
+##
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-## 
+##
 
 entries
 

Modified: trunk/src/mainboard/gigabyte/m57sli/dsdt.asl
==============================================================================
--- trunk/src/mainboard/gigabyte/m57sli/dsdt.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/m57sli/dsdt.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -53,7 +53,7 @@
 			External (HCLK)
 			External (SBDN)
 			External (HCDN)
-                    
+
 			Method (_CRS, 0, NotSerialized)
                         {
 				Name (BUF0, ResourceTemplate ()
@@ -274,7 +274,7 @@
 				Method (_CRS, 0, NotSerialized)
 				{
 					Name (BUF1, ResourceTemplate () {
-						IO (Decode16, 0x0378, 0x0378, 0x01, 0x08) 
+						IO (Decode16, 0x0378, 0x0378, 0x01, 0x08)
 						IRQNoFlags () {7}
 					})
 					Return (BUF1)
@@ -291,7 +291,7 @@
 				Method (_CRS, 0, NotSerialized)
 				{
 					Name (BUF1, ResourceTemplate () {
-						IO (Decode16, 0x0378, 0x0378, 0x01, 0x04) 
+						IO (Decode16, 0x0378, 0x0378, 0x01, 0x04)
 						IO (Decode16, 0x0778, 0x0778, 0x01, 0x04)
 						IRQNoFlags() {7}
 						DMA (Compatibility, NotBusMaster, Transfer8) {0,1,3}

Modified: trunk/src/mainboard/gigabyte/m57sli/get_bus_conf.c
==============================================================================
--- trunk/src/mainboard/gigabyte/m57sli/get_bus_conf.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/m57sli/get_bus_conf.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -39,7 +39,7 @@
         unsigned apicid_mcp55;
 
 
-unsigned pci1234x[] = 
+unsigned pci1234x[] =
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
 	 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
@@ -51,7 +51,7 @@
 //        0x0000ff0,
 //        0x0000ff0
 };
-unsigned hcdnx[] = 
+unsigned hcdnx[] =
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
 	0x20202020,
 //	0x20202020,
@@ -62,7 +62,7 @@
 //        0x20202020,
 //        0x20202020,
 };
-unsigned bus_type[256]; 
+unsigned bus_type[256];
 
 
 
@@ -95,13 +95,13 @@
 	for(i=0; i<8; i++) {
 		bus_mcp55[i] = 0;
 	}
-	
+
 	for(i=0;i<256; i++) {
 		bus_type[i] = 0;
 	}
 
 	bus_type[0] = 1; //pci
-	
+
 	bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
 
 	bus_type[bus_mcp55[0]] = 1;
@@ -139,8 +139,8 @@
 /*I/O APICs:	APIC ID	Version	State		Address*/
 #if CONFIG_LOGICAL_CPUS==1
 	apicid_base = get_apicid_base(1);
-#else 
-	apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+	apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
 	apicid_mcp55 = apicid_base+0;
 

Modified: trunk/src/mainboard/gigabyte/m57sli/irq_tables.c
==============================================================================
--- trunk/src/mainboard/gigabyte/m57sli/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/m57sli/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
@@ -33,11 +33,11 @@
 
 #include <cpu/amd/amdk8_sysconf.h>
 
-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
 		uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
 		uint8_t slot, uint8_t rfu)
 {
-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
@@ -79,15 +79,15 @@
 
 	pirq = (void *)(addr);
 	v = (uint8_t *)(addr);
-	
+
 	pirq->signature = PIRQ_SIGNATURE;
 	pirq->version  = PIRQ_VERSION;
-	
+
 	pirq->rtr_bus = bus_mcp55[0];
 	pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
 	pirq->exclusive_irqs = 0;
-	
+
 	pirq->rtr_vendor = 0x10de;
 	pirq->rtr_device = 0x0370;
 
@@ -100,11 +100,11 @@
 //pci bridge
 	write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
 	pirq_info++; slot_num++;
-        
-	pirq->size = 32 + 16 * slot_num; 
+
+	pirq->size = 32 + 16 * slot_num;
 
         for (i = 0; i < pirq->size; i++)
-                sum += v[i];	
+                sum += v[i];
 
 	sum = pirq->checksum - sum;
 

Modified: trunk/src/mainboard/gigabyte/m57sli/mptable.c
==============================================================================
--- trunk/src/mainboard/gigabyte/m57sli/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/m57sli/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -32,7 +32,7 @@
 
 extern unsigned apicid_mcp55;
 
-extern unsigned bus_type[256]; 
+extern unsigned bus_type[256];
 
 
 
@@ -94,7 +94,7 @@
                 }
 	}
 
-	/*I/O Ints:	     Type	Trigger    Polarity	                  Bus ID   IRQ	APIC ID	      PIN# */	
+	/*I/O Ints:	     Type	Trigger    Polarity	                  Bus ID   IRQ	APIC ID	      PIN# */
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0);
 
 /* ISA ints are edge-triggered, and usually originate from the ISA bus,
@@ -122,7 +122,7 @@
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,\
 			 bus_mcp55[bus], (((dev)<<2)|(fn)), apicid_mcp55, (pin))
 
-	PCI_INT(0,sbdn+1,1, 10); /* SMBus */ 
+	PCI_INT(0,sbdn+1,1, 10); /* SMBus */
 	PCI_INT(0,sbdn+2,0, 22); /* USB */
 	PCI_INT(0,sbdn+2,1, 23); /* USB */
 	PCI_INT(0,sbdn+4,0, 21); /* IDE */
@@ -144,8 +144,8 @@
         }
 
 	/* On bus 1: the PCI bus slots...
-	   pyhsical PCI slots are j = 7,8 
-	   FireWire is j = 10		
+	   pyhsical PCI slots are j = 7,8
+	   FireWire is j = 10
 	*/
         k=2;
         for(i=0; i<4; i++){

Modified: trunk/src/mainboard/gigabyte/m57sli/resourcemap.c
==============================================================================
--- trunk/src/mainboard/gigabyte/m57sli/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/m57sli/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -161,7 +161,7 @@
 		 *	   1 = base/limit registers i are read-only
 		 * [ 7: 4] Reserved
 		 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-		 *	   This field defines the upper address bits of a 40bit address 
+		 *	   This field defines the upper address bits of a 40bit address
 		 *	   that defines the start of memory-mapped I/O region i
 		 */
 		PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -199,7 +199,7 @@
 		 * [31:25] Reserved
 		 */
 //		PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x00007000,
-		PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000, 
+		PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
 
@@ -217,7 +217,7 @@
 		 * [ 3: 2] Reserved
 		 * [ 4: 4] VGA Enable
 		 *	   0 = VGA matches Disabled
-		 *	   1 = matches all address < 64K and where A[9:0] is in the 
+		 *	   1 = matches all address < 64K and where A[9:0] is in the
 		 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 		 * [ 5: 5] ISA Enable
 		 *	   0 = ISA matches Disabled
@@ -225,7 +225,7 @@
 		 *	       from matching agains this base/limit pair
 		 * [11: 6] Reserved
 		 * [24:12] PCI I/O Base i
-		 *	   This field defines the start of PCI I/O region n 
+		 *	   This field defines the start of PCI I/O region n
 		 * [31:25] Reserved
 		 */
 //		PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
@@ -270,9 +270,9 @@
 		 *	   This field defines the highest bus number in configuration region i
 		 */
 //		PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0xff000003, /* link 0 of cpu 0 --> Nvidia MCP55 */
-		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
-		PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
 
 	};
 

Modified: trunk/src/mainboard/gigabyte/m57sli/romstage.c
==============================================================================
--- trunk/src/mainboard/gigabyte/m57sli/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/gigabyte/m57sli/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -39,7 +39,7 @@
 #endif
 
 #define DBGP_DEFAULT 7
- 
+
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -123,7 +123,7 @@
 #include "northbridge/amd/amdk8/raminit_f.c"
 #include "lib/generic_sdram.c"
 
-#include "resourcemap.c" 
+#include "resourcemap.c"
 
 #include "cpu/amd/dualcore/dualcore.c"
 
@@ -142,13 +142,13 @@
         uint8_t byte;
 
         byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b);
-        byte |= 0x20; 
+        byte |= 0x20;
         pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte);
-        
+
         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<0);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);
-        
+
         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4);
         dword |= (1<<16);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword);
@@ -165,7 +165,7 @@
 			(0xa<<3)|5, (0xa<<3)|7, 0, 0,
 	};
 
-        struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE 
+        struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
 		+ CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
         int needs_reset = 0;
@@ -209,7 +209,7 @@
         setup_mb_resource_map();
 
         uart_init();
-	
+
 	/* Halt if there was a built in self test failure */
 	report_bist_failure(bist);
 
@@ -281,7 +281,7 @@
         //It's the time to set ctrl in sysinfo now;
 	fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
 
-        enable_smbus(); 
+        enable_smbus();
 
         /* all ap stopped? */
 

Modified: trunk/src/mainboard/hp/Kconfig
==============================================================================
--- trunk/src/mainboard/hp/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/hp/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_HP
-        
+
 source "src/mainboard/hp/dl145_g3/Kconfig"
 source "src/mainboard/hp/e_vectra_p2706t/Kconfig"
 

Modified: trunk/src/mainboard/hp/dl145_g3/romstage.c
==============================================================================
--- trunk/src/mainboard/hp/dl145_g3/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/hp/dl145_g3/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -185,7 +185,7 @@
 		DIMM5, DIMM7, 0, 0,
 	};
 
-	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE 
+	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
 		+ CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
 	int needs_reset;

Modified: trunk/src/mainboard/ibm/Kconfig
==============================================================================
--- trunk/src/mainboard/ibm/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/ibm/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_IBM
-        
+
 source "src/mainboard/ibm/e325/Kconfig"
 source "src/mainboard/ibm/e326/Kconfig"
 

Modified: trunk/src/mainboard/ibm/e325/devicetree.cb
==============================================================================
--- trunk/src/mainboard/ibm/e325/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/ibm/e325/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -18,7 +18,7 @@
 					end
 					device pci 1.0 on
 						chip superio/nsc/pc87366
-							device	pnp 2e.0 off  # Floppy 
+							device	pnp 2e.0 off  # Floppy
 								 io 0x60 = 0x3f0
 								irq 0x70 = 6
 								drq 0x74 = 2
@@ -45,7 +45,7 @@
 							device pnp 2e.7 off end # GPIO
 							device pnp 2e.8 off end # ACB
 							device pnp 2e.9 off end # FSCM
-							device pnp 2e.a off end # WDT  
+							device pnp 2e.a off end # WDT
 						end
 					end
 					device pci 1.1 on end
@@ -54,7 +54,7 @@
 					device pci 1.5 off end
 					device pci 1.6 off end
 				end
-			end #  device pci 18.0 
+			end #  device pci 18.0
 			device pci 18.0 on end # LDT2
 			device pci 18.1 on end
 			device pci 18.2 on end
@@ -68,7 +68,7 @@
 			device pci 19.2 on end
 			device pci 19.3 on end
 		end
-	end 
+	end
 	device apic_cluster 0 on
 		chip cpu/amd/socket_940
 			device apic 0 on end

Modified: trunk/src/mainboard/ibm/e325/irq_tables.c
==============================================================================
--- trunk/src/mainboard/ibm/e325/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/ibm/e325/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -12,7 +12,7 @@
 	{linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
 
 /*  Each IRQ_SLOT entry consists of:
- *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu  
+ *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu
  */
 
 const struct irq_routing_table intel_irq_routing_table = {

Modified: trunk/src/mainboard/ibm/e325/resourcemap.c
==============================================================================
--- trunk/src/mainboard/ibm/e325/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/ibm/e325/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -134,7 +134,7 @@
 	 *	   1 = base/limit registers i are read-only
 	 * [ 7: 4] Reserved
 	 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-	 *	   This field defines the upper address bits of a 40bit address 
+	 *	   This field defines the upper address bits of a 40bit address
 	 *	   that defines the start of memory-mapped I/O region i
 	 */
 
@@ -143,8 +143,8 @@
 	//PCI_ADDR(0, 0x18, 1, 0xbc), 0x48, 0x0,
 	// PCI_ADDR(0, 0x18, 1, 0xb8), 0xf0, 0x0,
 
-	PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0xfec010, 
-	PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0xfec003, 
+	PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0xfec010,
+	PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0xfec003,
 	//PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0x0,
 	//PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0x0,
 
@@ -153,19 +153,19 @@
 	//PCI_ADDR(0, 0x18, 1, 0xac), 0x48, 0x0,
 	//PCI_ADDR(0, 0x18, 1, 0xa8), 0xf0, 0x0,
 
-	PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0xfed010, 
+	PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0xfed010,
 	PCI_ADDR(0, 0x18, 1, 0xa0), 0xf0, 0xfed003,
 	//PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0x0,
 	//PCI_ADDR(0, 0x18, 1, 0xa0), 0xf0, 0x0,
 
-	PCI_ADDR(0, 0x18, 1, 0x9c), 0x48, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x98), 0xf0, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x94), 0x48, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x90), 0xf0, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x8c), 0x48, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x88), 0xf0, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x84), 0x48, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x80), 0xf0, 0x0, 
+	PCI_ADDR(0, 0x18, 1, 0x9c), 0x48, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x98), 0xf0, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x94), 0x48, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x90), 0xf0, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x8c), 0x48, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x88), 0xf0, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x84), 0x48, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x80), 0xf0, 0x0,
 	/* PCI I/O Limit i Registers
 	 * F1:0xC4 i = 0
 	 * F1:0xCC i = 1
@@ -205,7 +205,7 @@
 	 * [ 3: 2] Reserved
 	 * [ 4: 4] VGA Enable
 	 *	   0 = VGA matches Disabled
-	 *	   1 = matches all address < 64K and where A[9:0] is in the 
+	 *	   1 = matches all address < 64K and where A[9:0] is in the
 	 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 	 * [ 5: 5] ISA Enable
 	 *	   0 = ISA matches Disabled
@@ -213,17 +213,17 @@
 	 *	       from matching agains this base/limit pair
 	 * [11: 6] Reserved
 	 * [24:12] PCI I/O Base i
-	 *	   This field defines the start of PCI I/O region n 
+	 *	   This field defines the start of PCI I/O region n
 	 * [31:25] Reserved
 	 */
-	PCI_ADDR(0, 0x18, 1, 0xdc), 0xFE000FC8, 0x1fff010, 
-	PCI_ADDR(0, 0x18, 1, 0xd8), 0xFE000FCC, 0x33, 
-	PCI_ADDR(0, 0x18, 1, 0xd4), 0xFE000FC8, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0xd0), 0xFE000FCC, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0xcc), 0xFE000FC8, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0xc8), 0xFE000FCC, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0xc4), 0xFE000FC8, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0xc0), 0xFE000FCC, 0x0, 
+	PCI_ADDR(0, 0x18, 1, 0xdc), 0xFE000FC8, 0x1fff010,
+	PCI_ADDR(0, 0x18, 1, 0xd8), 0xFE000FCC, 0x33,
+	PCI_ADDR(0, 0x18, 1, 0xd4), 0xFE000FC8, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0xd0), 0xFE000FCC, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0xcc), 0xFE000FC8, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0xc8), 0xFE000FCC, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0xc4), 0xFE000FC8, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0xc0), 0xFE000FCC, 0x0,
 	/* Config Base and Limit i Registers
 	 * F1:0xE0 i = 0
 	 * F1:0xE4 i = 1
@@ -260,10 +260,10 @@
 	 * [31:24] Bus Number Limit i
 	 *	   This field defines the highest bus number in configuration regin i
 	 */
-	PCI_ADDR(0, 0x18, 1, 0xe0), 0x0000FC88, 0xff040103, 
-	PCI_ADDR(0, 0x18, 1, 0xe4), 0x0000FC88, 0, 
-	PCI_ADDR(0, 0x18, 1, 0xe8), 0x0000FC88, 0, 
-	PCI_ADDR(0, 0x18, 1, 0xec), 0x0000FC88, 0, 
+	PCI_ADDR(0, 0x18, 1, 0xe0), 0x0000FC88, 0xff040103,
+	PCI_ADDR(0, 0x18, 1, 0xe4), 0x0000FC88, 0,
+	PCI_ADDR(0, 0x18, 1, 0xe8), 0x0000FC88, 0,
+	PCI_ADDR(0, 0x18, 1, 0xec), 0x0000FC88, 0,
         };
         int max;
         max = ARRAY_SIZE(register_values);

Modified: trunk/src/mainboard/ibm/e325/romstage.c
==============================================================================
--- trunk/src/mainboard/ibm/e325/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/ibm/e325/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
- 
+
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -142,7 +142,7 @@
         setup_ibm_e325_resource_map();
 
 	needs_reset = setup_coherent_ht_domain();
-	
+
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();

Modified: trunk/src/mainboard/ibm/e326/devicetree.cb
==============================================================================
--- trunk/src/mainboard/ibm/e326/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/ibm/e326/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -25,7 +25,7 @@
 					end
 					device pci 1.0 on
 						chip superio/nsc/pc87366
-							device	pnp 2e.0 off  # Floppy 
+							device	pnp 2e.0 off  # Floppy
 								 io 0x60 = 0x3f0
 								irq 0x70 = 6
 								drq 0x74 = 2
@@ -52,7 +52,7 @@
 							device pnp 2e.7 off end # GPIO
 							device pnp 2e.8 off end # ACB
 							device pnp 2e.9 off end # FSCM
-							device pnp 2e.a off end # WDT  
+							device pnp 2e.a off end # WDT
 						end
 					end
 					device pci 1.1 on end
@@ -63,12 +63,12 @@
 					register "ide0_enable" = "1"
 					register "ide1_enable" = "1"
 				end
-			end #  device pci 18.0 
+			end #  device pci 18.0
 			device pci 18.0 on end # LDT2
 			device pci 18.1 on end
 			device pci 18.2 on end
 			device pci 18.3 on end
 		end
-	end 
+	end
 end
 

Modified: trunk/src/mainboard/ibm/e326/irq_tables.c
==============================================================================
--- trunk/src/mainboard/ibm/e326/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/ibm/e326/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -12,7 +12,7 @@
 	{linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
 
 /*  Each IRQ_SLOT entry consists of:
- *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu  
+ *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu
  */
 
 const struct irq_routing_table intel_irq_routing_table = {

Modified: trunk/src/mainboard/ibm/e326/resourcemap.c
==============================================================================
--- trunk/src/mainboard/ibm/e326/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/ibm/e326/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -134,7 +134,7 @@
 	 *	   1 = base/limit registers i are read-only
 	 * [ 7: 4] Reserved
 	 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-	 *	   This field defines the upper address bits of a 40bit address 
+	 *	   This field defines the upper address bits of a 40bit address
 	 *	   that defines the start of memory-mapped I/O region i
 	 */
 
@@ -143,8 +143,8 @@
 	//PCI_ADDR(0, 0x18, 1, 0xbc), 0x48, 0x0,
 	// PCI_ADDR(0, 0x18, 1, 0xb8), 0xf0, 0x0,
 
-	PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0xfec010, 
-	PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0xfec003, 
+	PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0xfec010,
+	PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0xfec003,
 	//PCI_ADDR(0, 0x18, 1, 0xb4), 0x48, 0x0,
 	//PCI_ADDR(0, 0x18, 1, 0xb0), 0xf0, 0x0,
 
@@ -153,19 +153,19 @@
 	//PCI_ADDR(0, 0x18, 1, 0xac), 0x48, 0x0,
 	//PCI_ADDR(0, 0x18, 1, 0xa8), 0xf0, 0x0,
 
-	PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0xfed010, 
+	PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0xfed010,
 	PCI_ADDR(0, 0x18, 1, 0xa0), 0xf0, 0xfed003,
 	//PCI_ADDR(0, 0x18, 1, 0xa4), 0x48, 0x0,
 	//PCI_ADDR(0, 0x18, 1, 0xa0), 0xf0, 0x0,
 
-	PCI_ADDR(0, 0x18, 1, 0x9c), 0x48, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x98), 0xf0, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x94), 0x48, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x90), 0xf0, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x8c), 0x48, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x88), 0xf0, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x84), 0x48, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0x80), 0xf0, 0x0, 
+	PCI_ADDR(0, 0x18, 1, 0x9c), 0x48, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x98), 0xf0, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x94), 0x48, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x90), 0xf0, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x8c), 0x48, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x88), 0xf0, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x84), 0x48, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0x80), 0xf0, 0x0,
 	/* PCI I/O Limit i Registers
 	 * F1:0xC4 i = 0
 	 * F1:0xCC i = 1
@@ -205,7 +205,7 @@
 	 * [ 3: 2] Reserved
 	 * [ 4: 4] VGA Enable
 	 *	   0 = VGA matches Disabled
-	 *	   1 = matches all address < 64K and where A[9:0] is in the 
+	 *	   1 = matches all address < 64K and where A[9:0] is in the
 	 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 	 * [ 5: 5] ISA Enable
 	 *	   0 = ISA matches Disabled
@@ -213,17 +213,17 @@
 	 *	       from matching agains this base/limit pair
 	 * [11: 6] Reserved
 	 * [24:12] PCI I/O Base i
-	 *	   This field defines the start of PCI I/O region n 
+	 *	   This field defines the start of PCI I/O region n
 	 * [31:25] Reserved
 	 */
-	PCI_ADDR(0, 0x18, 1, 0xdc), 0xFE000FC8, 0x1fff010, 
-	PCI_ADDR(0, 0x18, 1, 0xd8), 0xFE000FCC, 0x33, 
-	PCI_ADDR(0, 0x18, 1, 0xd4), 0xFE000FC8, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0xd0), 0xFE000FCC, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0xcc), 0xFE000FC8, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0xc8), 0xFE000FCC, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0xc4), 0xFE000FC8, 0x0, 
-	PCI_ADDR(0, 0x18, 1, 0xc0), 0xFE000FCC, 0x0, 
+	PCI_ADDR(0, 0x18, 1, 0xdc), 0xFE000FC8, 0x1fff010,
+	PCI_ADDR(0, 0x18, 1, 0xd8), 0xFE000FCC, 0x33,
+	PCI_ADDR(0, 0x18, 1, 0xd4), 0xFE000FC8, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0xd0), 0xFE000FCC, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0xcc), 0xFE000FC8, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0xc8), 0xFE000FCC, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0xc4), 0xFE000FC8, 0x0,
+	PCI_ADDR(0, 0x18, 1, 0xc0), 0xFE000FCC, 0x0,
 	/* Config Base and Limit i Registers
 	 * F1:0xE0 i = 0
 	 * F1:0xE4 i = 1
@@ -260,10 +260,10 @@
 	 * [31:24] Bus Number Limit i
 	 *	   This field defines the highest bus number in configuration regin i
 	 */
-	PCI_ADDR(0, 0x18, 1, 0xe0), 0x0000FC88, 0xff040103, 
-	PCI_ADDR(0, 0x18, 1, 0xe4), 0x0000FC88, 0, 
-	PCI_ADDR(0, 0x18, 1, 0xe8), 0x0000FC88, 0, 
-	PCI_ADDR(0, 0x18, 1, 0xec), 0x0000FC88, 0, 
+	PCI_ADDR(0, 0x18, 1, 0xe0), 0x0000FC88, 0xff040103,
+	PCI_ADDR(0, 0x18, 1, 0xe4), 0x0000FC88, 0,
+	PCI_ADDR(0, 0x18, 1, 0xe8), 0x0000FC88, 0,
+	PCI_ADDR(0, 0x18, 1, 0xec), 0x0000FC88, 0,
         };
         int max;
         max = ARRAY_SIZE(register_values);

Modified: trunk/src/mainboard/ibm/e326/romstage.c
==============================================================================
--- trunk/src/mainboard/ibm/e326/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/ibm/e326/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
- 
+
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -142,7 +142,7 @@
         setup_ibm_e326_resource_map();
 
 	needs_reset = setup_coherent_ht_domain();
-	
+
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();

Modified: trunk/src/mainboard/iei/nova4899r/irq_tables.c
==============================================================================
--- trunk/src/mainboard/iei/nova4899r/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iei/nova4899r/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -118,7 +118,7 @@
 			.slot = 0x2,
 		},
  */
- 
+
 /*
  * Definition for "slot#2". There is no real slot,
  * the network device is soldered...

Modified: trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
==============================================================================
--- trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iei/pcisa-lx-800-r10/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -13,7 +13,7 @@
 
 config MAINBOARD_DIR
 	string
-	default iei/pcisa-lx-800-r10 
+	default iei/pcisa-lx-800-r10
 	depends on BOARD_IEI_PCISA_LX_800_R10
 
 config MAINBOARD_PART_NUMBER

Modified: trunk/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,7 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the
  * i945
  */
 

Modified: trunk/src/mainboard/intel/d945gclf/acpi/ich7_pci_irqs.asl
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/acpi/ich7_pci_irqs.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/acpi/ich7_pci_irqs.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,7 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the
  * 0:1e.0 PCI bridge of the ICH7
  */
 

Modified: trunk/src/mainboard/intel/d945gclf/acpi/mainboard.asl
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/acpi/mainboard.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/acpi/mainboard.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -28,7 +28,7 @@
 Device (PWRB)
 {
 	Name(_HID, EisaId("PNP0C0C"))
-	
+
 	// Wake
 	Name(_PRW, Package(){0x1d, 0x04})
 }

Modified: trunk/src/mainboard/intel/d945gclf/acpi/platform.asl
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/acpi/platform.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/acpi/platform.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -42,9 +42,9 @@
 	Return (SMIF)		// Return value of SMI handler
 }
 
-/* The _PIC method is called by the OS to choose between interrupt 
+/* The _PIC method is called by the OS to choose between interrupt
  * routing via the i8259 interrupt controller or the APIC.
- * 
+ *
  * _PIC is called with a parameter of 0 for i8259 configuration and
  * with a parameter of 1 for Local Apic/IOAPIC configuration.
  */
@@ -74,12 +74,12 @@
 	// Notify PCI Express slots in case a card
 	// was inserted while a sleep state was active.
 
-	// Are we going to S3? 
+	// Are we going to S3?
 	If (LEqual(Arg0, 3)) {
 		// ..
 	}
 
-	// Are we going to S4? 
+	// Are we going to S4?
 	If (LEqual(Arg0, 4)) {
 		// ..
 	}

Modified: trunk/src/mainboard/intel/d945gclf/acpi/thermal.asl
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/acpi/thermal.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/acpi/thermal.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -25,7 +25,7 @@
 	{
 
 		// FIXME these could/should be read from the
-		// GNVS area, so they can be controlled by 
+		// GNVS area, so they can be controlled by
 		// coreboot
 		Name(TC1V, 0x04)
 		Name(TC2V, 0x03)

Modified: trunk/src/mainboard/intel/d945gclf/acpi_tables.c
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/acpi_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/acpi_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

Modified: trunk/src/mainboard/intel/d945gclf/chip.h
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/chip.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/chip.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or

Modified: trunk/src/mainboard/intel/d945gclf/cmos.layout
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/cmos.layout	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/cmos.layout	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 #
 # This file is part of the coreboot project.
-# 
+#
 # Copyright (C) 2007-2008 coresystems GmbH
 #
 # This program is free software; you can redistribute it and/or

Modified: trunk/src/mainboard/intel/d945gclf/devicetree.cb
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 ##
 ## This file is part of the coreboot project.
-## 
+##
 ## Copyright (C) 2007-2008 coresystems GmbH
 ##
 ## This program is free software; you can redistribute it and/or
@@ -25,7 +25,7 @@
                 end
         end
 
-        device pci_domain 0 on 
+        device pci_domain 0 on
                 device pci 00.0 on end # host bridge
 		device pci 01.0 off end # i945 PCIe root port
 		device pci 02.0 on end # vga controller
@@ -66,7 +66,7 @@
                 	device pci 1d.3 on end # USB UHCI
                 	device pci 1d.7 on end # USB2 EHCI
                 	device pci 1e.0 on end # PCI bridge
-			#device pci 1e.2 off end # AC'97 Audio 
+			#device pci 1e.2 off end # AC'97 Audio
 			#device pci 1e.3 off end # AC'97 Modem
                         device pci 1f.0 on # LPC bridge
                                 chip superio/smsc/lpc47m15x

Modified: trunk/src/mainboard/intel/d945gclf/dsdt.asl
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/dsdt.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/dsdt.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -34,7 +34,7 @@
 
 	// General Purpose Events
 	//#include "acpi/gpe.asl"
-	
+
 	// mainboard specific devices
 	#include "acpi/mainboard.asl"
 

Modified: trunk/src/mainboard/intel/d945gclf/mainboard_smi.c
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/mainboard_smi.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/mainboard_smi.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -23,7 +23,7 @@
 #include <cpu/x86/smm.h>
 #include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
 
-/* The southbridge SMI handler checks whether gnvs has a 
+/* The southbridge SMI handler checks whether gnvs has a
  * valid pointer before calling the trap handler
  */
 extern global_nvs_t *gnvs;

Modified: trunk/src/mainboard/intel/d945gclf/mptable.c
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -69,7 +69,7 @@
 
 	/* Legacy Interrupts */
 
-	/* I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */	
+	/* I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, 0x2, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x1, 0x2, 0x1);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, 0x2, 0x2);

Modified: trunk/src/mainboard/intel/d945gclf/romstage.c
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
@@ -105,7 +105,7 @@
 static void early_superio_config_lpc47m15x(void)
 {
 	device_t dev;
-	
+
 	dev=PNP_DEV(0x2e, LPC47M15X_SP1);
 	pnp_enter_conf_state(dev);
 
@@ -276,7 +276,7 @@
 
 	/* Enable SPD ROMs and DDR-II DRAM */
 	enable_smbus();
-	
+
 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
 	dump_spd_registers();
 #endif
@@ -286,8 +286,8 @@
 	/* Perform some initialization that must run before stage2 */
 	early_ich7_init();
 
-	/* This should probably go away. Until now it is required 
-	 * and mainboard specific 
+	/* This should probably go away. Until now it is required
+	 * and mainboard specific
 	 */
 	rcba_config();
 
@@ -331,7 +331,7 @@
 		 * memory completely, but that's a wonderful clean up task for another
 		 * day.
 		 */
-		if (resume_backup_memory) 
+		if (resume_backup_memory)
 			memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
 
 		/* Magic for S3 resume */

Modified: trunk/src/mainboard/intel/d945gclf/rtl8168.c
==============================================================================
--- trunk/src/mainboard/intel/d945gclf/rtl8168.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/d945gclf/rtl8168.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -28,7 +28,7 @@
 static void nic_init(struct device *dev)
 {
 	printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
-	// Nothing to do yet, but this has to be here to keep 
+	// Nothing to do yet, but this has to be here to keep
 	// coreboot from trying to execute an option ROM.
 }
 

Modified: trunk/src/mainboard/intel/eagleheights/Kconfig
==============================================================================
--- trunk/src/mainboard/intel/eagleheights/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/eagleheights/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -57,7 +57,7 @@
 	int
 	default 4
 	depends on BOARD_INTEL_EAGLEHEIGHTS
-	
+
 config MAX_PHYSICAL_CPUS
 	int
 	default 2

Modified: trunk/src/mainboard/intel/jarrell/debug.c
==============================================================================
--- trunk/src/mainboard/intel/jarrell/debug.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/jarrell/debug.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
-                                                                                
+
         outb(index, 0x2e);
         data = inb(0x2f);
 	print_debug("0x");
@@ -15,7 +15,7 @@
 	print_debug("\n");
         return;
 }
-        
+
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
@@ -25,7 +25,7 @@
         outb(0x01, 0x2f);
 	return;
 }
-                                                                        
+
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
@@ -43,27 +43,27 @@
         print_reg(0x75);
         return;
 }
-                                                                                
+
 static void siodump(void)
 {
         int i;
         unsigned char data;
-       
+
 	 print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
-#if 0                                                                         
+#if 0
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
-                                                                                
+
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
@@ -82,13 +82,13 @@
 	print_debug("\nGPDI 4: 0x");
 	print_debug_hex8(data);
 	print_debug("\n");
-	
-#if 0                                                                                
-                                                                                
+
+#if 0
+
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
@@ -103,11 +103,11 @@
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
-                                                                                
+
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
-#endif                                                                           
+#endif
         return;
 }
 
@@ -124,8 +124,8 @@
 static void print_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -144,7 +144,7 @@
 	int i;
 	print_debug_pci_dev(dev);
 	print_debug("\n");
-	
+
 	for(i = 0; i <= 255; i++) {
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
@@ -164,19 +164,19 @@
 {
 	int i;
 	unsigned long bar;
-	
+
 	print_debug("BAR 14 Dump\n");
-	
+
 	bar = pci_read_config32(dev, 0x14);
 	for(i = 0; i <= 0x300; i+=4) {
-#if 0		
+#if 0
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
 			print_debug_hex8(i);
 			print_debug_char(':');
 		}
 		val = pci_read_config8(dev, i);
-#endif		
+#endif
 		if((i%4)==0) {
 		print_debug("\n");
 		print_debug_hex16(i);
@@ -191,8 +191,8 @@
 static void dump_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -215,8 +215,8 @@
 		device = ctrl->channel0[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".0: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -241,8 +241,8 @@
 		device = ctrl->channel1[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".1: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -278,7 +278,7 @@
         	print_debug("\n");
                 print_debug("dimm ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 256) ; i++) {
 	                unsigned char byte;
                         if ((i % 16) == 0) {
@@ -291,7 +291,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -311,7 +311,7 @@
         	print_debug("\n");
                 print_debug("ipmi ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 8) ; i++) {
 	                unsigned char byte;
 			status = smbus_read_byte(device, 2);
@@ -319,7 +319,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -327,4 +327,4 @@
 		device += SMBUS_MEM_DEVICE_INC;
 		print_debug("\n");
 	}
-}	
+}

Modified: trunk/src/mainboard/intel/jarrell/devicetree.cb
==============================================================================
--- trunk/src/mainboard/intel/jarrell/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/jarrell/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,9 +1,9 @@
 chip northbridge/intel/e7520
-	device pci_domain 0 on 
+	device pci_domain 0 on
 		device pci 00.0 on end
 		device pci 00.1 on end
 		device pci 01.0 on end
-		device pci 02.0 on 
+		device pci 02.0 on
 			chip southbridge/intel/pxhd # pxhd1
 				device pci 00.0 on end
 				device pci 00.1 on end
@@ -28,7 +28,7 @@
 					device pci 0c.0 on end
 				end
 			end
-			device pci 1f.0 on 
+			device pci 1f.0 on
 				chip superio/nsc/pc87427
 					device pnp 2e.0 off end
 					device pnp 2e.2 on
@@ -60,7 +60,7 @@
 			end
 			device pci 1f.1 on end
 			device pci 1f.2 off end
-			device pci 1f.3 on end 
+			device pci 1f.3 on end
 			device pci 1f.5 off end
 			device pci 1f.6 off end
 			register "gpio[40]" = "ICH5R_GPIO_USE_AS_GPIO"

Modified: trunk/src/mainboard/intel/jarrell/jarrell_fixups.c
==============================================================================
--- trunk/src/mainboard/intel/jarrell/jarrell_fixups.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/jarrell/jarrell_fixups.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,7 +21,7 @@
 		value = inl(base);
 		value |= (1 <<19);
 		outl(value, base);
-		
+
                 /* Pull GPIO 19 low */
                 value = inl(base + 0x0c);
                 value &= ~(1 << 19);
@@ -38,7 +38,7 @@
 
 	/* currently only handle the Jarrell/PC87427 case */
 	dev = PC87427_GPIO_DEV;
-		
+
 
 	pnp_set_logical_device(dev);
 	gpio_index = pnp_read_iobase(dev, 0x60);
@@ -66,7 +66,7 @@
 		// mch_reset();
 		full_reset();
 	}
-	return; 
+	return;
 }
 
 static void mainboard_set_e7520_leds(void)
@@ -77,7 +77,7 @@
 
 	/* currently only handle the Jarrell/PC87427 case */
 	dev = PC87427_GPIO_DEV;
-		
+
 	pnp_set_logical_device(dev);
 
 	/* enable */
@@ -88,17 +88,17 @@
 
 	/* Set auto mode for dimm leds and post */
 	outb(0xf0,0x2e);
-	outb(0x70,0x2f);	
+	outb(0x70,0x2f);
 	outb(0xf4,0x2e);
-	outb(0x30,0x2f);	
+	outb(0x30,0x2f);
 	outb(0xf5,0x2e);
-	outb(0x88,0x2f);	
+	outb(0x88,0x2f);
 	outb(0xf6,0x2e);
-	outb(0x00,0x2f);	
+	outb(0x00,0x2f);
 	outb(0xf7,0x2e);
-	outb(0x90,0x2f);	
+	outb(0x90,0x2f);
 	outb(0xf8,0x2e);
-	outb(0x00,0x2f);	
+	outb(0x00,0x2f);
 
 	/* Turn the leds off */
 	outb(0x00,0x88);
@@ -106,12 +106,12 @@
 
 	/* Disable the ports */
 	outb(0xf5,0x2e);
-	outb(0x00,0x2f);	
+	outb(0x00,0x2f);
 	outb(0xf7,0x2e);
-	outb(0x00,0x2f);	
+	outb(0x00,0x2f);
 	outb(0xf4,0x2e);
-	outb(0x00,0x2f);	
-	
-	return; 
+	outb(0x00,0x2f);
+
+	return;
 }
 

Modified: trunk/src/mainboard/intel/jarrell/mptable.c
==============================================================================
--- trunk/src/mainboard/intel/jarrell/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/jarrell/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -38,7 +38,7 @@
 	mc->reserved = 0;
 
 	smp_write_processors(mc);
-	
+
 	{
 		device_t dev;
 
@@ -102,7 +102,7 @@
 			}
 		}
 	}
-	
+
 	/* define bus and isa numbers */
 	for(bus_num = 0; bus_num < bus_isa; bus_num++) {
 		smp_write_bus(mc, bus_num, "PCI	  ");
@@ -165,7 +165,7 @@
 			}
 		}
 	}
-	
+
 	/* ISA backward compatibility interrupts  */
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
 		bus_isa, 0x00, 0x08, 0x00);

Modified: trunk/src/mainboard/intel/jarrell/romstage.c
==============================================================================
--- trunk/src/mainboard/intel/jarrell/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/jarrell/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -51,8 +51,8 @@
 static void main(unsigned long bist)
 {
 	/*
-	 * 
-	 * 
+	 *
+	 *
 	 */
 	static const struct mem_controller mch[] = {
 		{
@@ -117,7 +117,7 @@
 	disable_watchdogs();
 	power_down_reset_check();
 //	dump_ipmi_registers();
-	mainboard_set_e7520_leds();	
+	mainboard_set_e7520_leds();
 	sdram_initialize(ARRAY_SIZE(mch), mch);
 	ich5_watchdog_on();
 #if 0
@@ -128,7 +128,7 @@
 	dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
-#if 0 // temporarily disabled 
+#if 0 // temporarily disabled
 	/* Check the first 1M */
 //	ram_check(0x00000000, 0x000100000);
 //	ram_check(0x00000000, 0x000a0000);
@@ -138,9 +138,9 @@
 #if 0
 	ram_check(0x00000000, 0x02000000);
 #endif
-	
+
 #endif
-#if 0	
+#if 0
 	while(1) {
 		hlt();
 	}

Modified: trunk/src/mainboard/intel/jarrell/watchdog.c
==============================================================================
--- trunk/src/mainboard/intel/jarrell/watchdog.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/jarrell/watchdog.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -29,17 +29,17 @@
 	value = pci_read_config16(dev, 0x04);
 	value |= (1 << 10);
 	pci_write_config16(dev, 0x04, value);
-	
+
 	/* Set and enable acpibase */
 	pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
 	pci_write_config8(dev, 0x44, 0x10);
 	base = ICH5_WDBASE + 0x60;
-	
+
 	/* Set bit 11 in TCO1_CNT */
 	value = inw(base + 0x08);
 	value |= 1 << 11;
 	outw(value, base + 0x08);
-	
+
 	/* Clear TCO timeout status */
 	outw(0x0008, base + 0x04);
 	outw(0x0002, base + 0x06);
@@ -83,7 +83,7 @@
 	outl(value, base + 0x38);
 	value &= ~(1 << 16);
 	outl(value, base + 0x38);
-				  
+
 }
 
 static void disable_watchdogs(void)
@@ -114,12 +114,12 @@
 	value = pci_read_config16(dev, 0x04);
 	value |= (1 << 10);
 	pci_write_config16(dev, 0x04, value);
-	
+
 	/* Set and enable acpibase */
 	pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
 	pci_write_config8(dev, 0x44, 0x10);
 	base = ICH5_WDBASE + 0x60;
-	
+
 	/* Clear TCO timeout status */
 	outw(0x0008, base + 0x04);
 	outw(0x0002, base + 0x06);
@@ -132,7 +132,7 @@
 	/* clear bit 11 in TCO1_CNT to start watchdog */
 	value = inw(base + 0x08);
 	value &= ~(1 << 11);
-	outw(value, base + 0x08);	
+	outw(value, base + 0x08);
 
 	print_debug("Watchdog ICH5 enabled\n");
 }

Modified: trunk/src/mainboard/intel/xe7501devkit/acpi_tables.c
==============================================================================
--- trunk/src/mainboard/intel/xe7501devkit/acpi_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/xe7501devkit/acpi_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -38,21 +38,21 @@
 	device_t dev = 0;
     struct resource* res = NULL;
 
- 
+
 	// SJM: Hard-code CPU LAPIC entries for now
 	//		Use SourcePoint numbering of processors
 	current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 0, 6);
 	current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 1, 7);
 	current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 2, 0);
 	current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current, 3, 1);
-	
+
 
 	// Southbridge IOAPIC
 	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_ICH3, 0xfec00000, irq_start);
 	irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
 
 	// P64H2#2 Bus A IOAPIC
-	dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));	
+	dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));
 	if (!dev)
 		BUG();		// Config.lb error?
 	res = find_resource(dev, PCI_BASE_ADDRESS_0);
@@ -60,7 +60,7 @@
 	irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
 
 	// P64H2#2 Bus B IOAPIC
-	dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0));	
+	dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0));
 	if (!dev)
 		BUG();		// Config.lb error?
 	res = find_resource(dev, PCI_BASE_ADDRESS_0);
@@ -69,7 +69,7 @@
 
 
 	// P64H2#1 Bus A IOAPIC
-	dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0));	
+	dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0));
 	if (!dev)
 		BUG();		// Config.lb error?
 	res = find_resource(dev, PCI_BASE_ADDRESS_0);
@@ -77,7 +77,7 @@
 	irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
 
 	// P64H2#1 Bus B IOAPIC
-	dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0));	
+	dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0));
 	if (!dev)
 		BUG();		// Config.lb error?
 	res = find_resource(dev, PCI_BASE_ADDRESS_0);
@@ -104,7 +104,7 @@
 	/* Align ACPI tables to 16byte */
 	start   = ( start + 0x0f ) & -0x10;
 	current = start;
-	
+
 	printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
 
 	/* We need at least an RSDP and an RSDT Table */
@@ -115,10 +115,10 @@
 
 	/* clear all table memory */
 	memset((void *)start, 0, current - start);
-	
+
 	acpi_write_rsdp(rsdp, rsdt, NULL);
 	acpi_write_rsdt(rsdt);
-	
+
 	/*
 	 * We explicitly add these tables later on:
 	 */

Modified: trunk/src/mainboard/intel/xe7501devkit/cmos.layout
==============================================================================
--- trunk/src/mainboard/intel/xe7501devkit/cmos.layout	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/xe7501devkit/cmos.layout	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-# NOTE: This file must be in UNIX format (not DOS) or build_opt_tbl fails: 
+# NOTE: This file must be in UNIX format (not DOS) or build_opt_tbl fails:
 # "Error - Name  is an invalid identifier in line"
 
 entries

Modified: trunk/src/mainboard/intel/xe7501devkit/ioapic.h
==============================================================================
--- trunk/src/mainboard/intel/xe7501devkit/ioapic.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/xe7501devkit/ioapic.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
-// IOAPIC addresses determined by coreboot enumeration. 
+// IOAPIC addresses determined by coreboot enumeration.
 // Someday add functions to get APIC IDs and versions from the chips themselves.
-	
+
 #define IOAPIC_ICH3				2
 #define IOAPIC_P64H2_2_BUS_B	3	// IOAPIC 3 at 01:1c.0  MBAR = fe300000 DataAddr = fe300010
 #define IOAPIC_P64H2_2_BUS_A	4	// IOAPIC 4 at 01:1e.0  MBAR = fe301000 DataAddr = fe301010

Modified: trunk/src/mainboard/intel/xe7501devkit/irq_tables.c
==============================================================================
--- trunk/src/mainboard/intel/xe7501devkit/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/xe7501devkit/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -35,17 +35,17 @@
 		// bitmap of 0xdcf8 == routable to IRQ3-IRQ7, IRQ10-IRQ12, or IRQ14-IRQ15
 		// ICH-3 doesn't allow SERIRQ or PCI message to generate IRQ0, IRQ2, IRQ8, or IRQ13
 		// Not sure why IRQ9 isn't routable (inherited from Tyan S2735)
-		
+
 		//											INTA#			   INTB#		     INTC#		      INTD#
 	//  bus,				device #  		   {link  , bitmap}, {link  , bitmap}, {link  , bitmap}, {link  , bitmap},  slot, rfu
-		
+
 		{PCI_BUS_CHIPSET,	PCI_DEVFN(31, 0), {{PIRQ_C, 0xdcf8}, {PIRQ_B, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},	// IDE / SMBus
 		{PCI_BUS_CHIPSET,	PCI_DEVFN(29, 0), {{PIRQ_A, 0xdcf8}, {PIRQ_D, 0xdcf8}, {PIRQ_C, 0xdcf8}, UNUSED_INTERRUPT},   0, 0},	// USB 1.1
-		
+
 		// P64H2#2 Bus A
 		{PCI_BUS_P64H2_2_A, PCI_DEVFN(1, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},	// SCSI
 			// NOTE: Hotplug disabled on this bus
-		
+
 		// P64H2#2 Bus B
 		{PCI_BUS_P64H2_2_B, PCI_DEVFN(1, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}},  23, 0},	// Slot 2A (J23)
 		{PCI_BUS_P64H2_2_B, PCI_DEVFN(2, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}},  24, 0},	// Slot 2B (J24)
@@ -61,7 +61,7 @@
 		{PCI_BUS_P64H2_1_B, PCI_DEVFN(1, 0),  {{PIRQ_A, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},	// GB Ethernet
 		{PCI_BUS_P64H2_1_B, PCI_DEVFN(2, 0),  {{PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}},  21, 0},	// Slot 1B (J21)
 			// NOTE: Hotplug disabled on this bus
-	
+
 		// ICH-3 PCI bus
 		{PCI_BUS_ICH3,		PCI_DEVFN(0, 0),  {{PIRQ_A, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},	// Video
 		{PCI_BUS_ICH3,		PCI_DEVFN(2, 0),  {{PIRQ_C, 0xdcf8}, {PIRQ_D, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_B, 0xdcf8}},  11, 0},	// Debug slot (J11)

Modified: trunk/src/mainboard/intel/xe7501devkit/mptable.c
==============================================================================
--- trunk/src/mainboard/intel/xe7501devkit/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/xe7501devkit/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -40,14 +40,14 @@
 	smp_write_ioapic(mc, IOAPIC_ICH3, 0x20, 0xfec00000);	// APIC ID, Version, Address
 
 	// P64H2#2 Bus A IOAPIC
-	dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));	
+	dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));
 	if (!dev)
 		BUG();		// Config.lb error?
 	res = find_resource(dev, PCI_BASE_ADDRESS_0);
 	smp_write_ioapic(mc, IOAPIC_P64H2_2_BUS_A, P64H2_IOAPIC_VERSION, res->base);
 
 	// P64H2#2 Bus B IOAPIC
-	dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0));	
+	dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0));
 	if (!dev)
 		BUG();		// Config.lb error?
 	res = find_resource(dev, PCI_BASE_ADDRESS_0);
@@ -55,14 +55,14 @@
 
 
 	// P64H2#1 Bus A IOAPIC
-	dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0));	
+	dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0));
 	if (!dev)
 		BUG();		// Config.lb error?
 	res = find_resource(dev, PCI_BASE_ADDRESS_0);
 	smp_write_ioapic(mc, IOAPIC_P64H2_1_BUS_A, P64H2_IOAPIC_VERSION, res->base);
 
 	// P64H2#1 Bus B IOAPIC
-	dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0));	
+	dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0));
 	if (!dev)
 		BUG();		// Config.lb error?
 	res = find_resource(dev, PCI_BASE_ADDRESS_0);
@@ -98,11 +98,11 @@
 	smp_write_intsrc(mc, mp_INT, 	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 	PCI_BUS_P64H2_2_B, 	PCI_IRQ(4, INT_B), 	IOAPIC_P64H2_2_BUS_B,   13);	// Slot 2D (J12)
 	smp_write_intsrc(mc, mp_INT, 	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 	PCI_BUS_P64H2_2_B, 	PCI_IRQ(4, INT_C), 	IOAPIC_P64H2_2_BUS_B,   14);	// Slot 2D (J12)
 	smp_write_intsrc(mc, mp_INT, 	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 	PCI_BUS_P64H2_2_B, 	PCI_IRQ(4, INT_D), 	IOAPIC_P64H2_2_BUS_B,   15);	// Slot 2D (J12)
-	
+
 	// P64H2#2 Bus A
 	smp_write_intsrc(mc, mp_INT,	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,	PCI_BUS_P64H2_2_A, 	PCI_IRQ(1, INT_A),	IOAPIC_P64H2_2_BUS_A,	 0);	// SCSI
 	smp_write_intsrc(mc, mp_INT,	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,	PCI_BUS_P64H2_2_A, 	PCI_IRQ(1, INT_B),	IOAPIC_P64H2_2_BUS_A,	 1);	// SCSI
-	
+
 	// P64H2#1 Bus B
 	smp_write_intsrc(mc, mp_INT, 	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 	PCI_BUS_P64H2_1_B, 	PCI_IRQ(1, INT_A), 	IOAPIC_P64H2_1_BUS_B,    0);	// GB Ethernet
 	smp_write_intsrc(mc, mp_INT, 	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 	PCI_BUS_P64H2_1_B, 	PCI_IRQ(2, INT_A), 	IOAPIC_P64H2_1_BUS_B,    4);	// Slot 1B (J21)
@@ -117,13 +117,13 @@
 	smp_write_intsrc(mc, mp_INT, 	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 	PCI_BUS_P64H2_1_A, 	PCI_IRQ(1, INT_D), 	IOAPIC_P64H2_1_BUS_A,    3);	// Slot 1A (J20)
 
 	// ICH-3
-	
+
 	smp_write_intsrc(mc, mp_INT,	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,	PCI_BUS_ICH3,		PCI_IRQ(0, INT_A),	IOAPIC_ICH3,			16);	// Video
 	smp_write_intsrc(mc, mp_INT,	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,	PCI_BUS_ICH3,		PCI_IRQ(2, INT_A),	IOAPIC_ICH3,			18);	// Debug slot (J11)
 	smp_write_intsrc(mc, mp_INT,	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,	PCI_BUS_ICH3,		PCI_IRQ(2, INT_B),	IOAPIC_ICH3,			19);	// Debug slot (J11)
 	smp_write_intsrc(mc, mp_INT,	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,	PCI_BUS_ICH3,		PCI_IRQ(2, INT_C),	IOAPIC_ICH3,			16);	// Debug slot (J11)
 	smp_write_intsrc(mc, mp_INT,	MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,	PCI_BUS_ICH3,		PCI_IRQ(2, INT_D),	IOAPIC_ICH3,			17);	// Debug slot (J11)
-	
+
 	// TODO: Not sure how to handle BT_INTR# signals from the P64H2s. Do we even need to, in APIC mode?
 
 	// Super I/O (ISA interrupts)

Modified: trunk/src/mainboard/intel/xe7501devkit/romstage.c
==============================================================================
--- trunk/src/mainboard/intel/xe7501devkit/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/intel/xe7501devkit/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -48,7 +48,7 @@
 		},
 	};
 
-	if (bist == 0) 
+	if (bist == 0)
 	{
 		// Skip this if there was a built in self test failure
 		early_mtrr_init();
@@ -68,14 +68,14 @@
 
 	// If this is a warm boot, some initialization can be skipped
 
-	if (!bios_reset_detected()) 
+	if (!bios_reset_detected())
 	{
 		enable_smbus();
 		// dump_spd_registers(&memctrl[0]);
 		// dump_smbus_registers();
 		sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
 	}
-	
+
 	// NOTE: ROMCC dies with an internal compiler error
 	//		 if the following line is removed.
 	print_debug("SDRAM is up.\n");

Modified: trunk/src/mainboard/iwill/Kconfig
==============================================================================
--- trunk/src/mainboard/iwill/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_IWILL
-        
+
 source "src/mainboard/iwill/dk8_htx/Kconfig"
 source "src/mainboard/iwill/dk8s2/Kconfig"
 source "src/mainboard/iwill/dk8x/Kconfig"

Modified: trunk/src/mainboard/iwill/dk8_htx/acpi/amd8111.asl
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/acpi/amd8111.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/acpi/amd8111.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -4,17 +4,17 @@
 //AMD8111
             Name (APIC, Package (0x04)
             {
-                Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present 
-                Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11}, 
-                Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12}, 
+                Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x10},// 0x0004ffff : assusme 8131 is present
+                Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x11},
+                Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x12},
                 Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x13}
             })
 
             Name (PICM, Package (0x04)
             {
-                Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00}, 
-                Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00}, 
-                Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00}, 
+                Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00},
+                Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00},
+                Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00},
                 Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00}
             })
 
@@ -34,16 +34,16 @@
                         Store(Local0, Index (DeRefOf (Index (APIC, 1)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 2)), 0))
                         Store(Local0, Index (DeRefOf (Index (APIC, 3)), 0))
-			
+
 			Store (0x00, ^DNCG)
-			
+
 		}
 
-                If (LNot (PICF)) { 
-			Return (PICM) 
+                If (LNot (PICF)) {
+			Return (PICM)
 		}
                 Else {
-			Return (APIC) 
+			Return (APIC)
 		}
             }
 
@@ -57,7 +57,7 @@
                 OperationRegion (PIRQ, PCI_Config, 0x56, 0x02)
                 Field (PIRQ, ByteAcc, Lock, Preserve)
                 {
-                    PIBA,   8, 
+                    PIBA,   8,
                     PIDC,   8
                 }
 /*
@@ -144,7 +144,7 @@
                     Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x13 },
                     Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x10 }
                 })
-	
+
                 Name (PICM, Package (0x0C)
                 {
                     Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, //USB

Modified: trunk/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
 
             Device (ISA)
             {
-                /* lpc  0x00040000 */ 
+                /* lpc  0x00040000 */
                 Method (_ADR, 0, NotSerialized)
                 {
 			Return (DADD(\_SB.PCI0.SBDN, 0x00010000))
@@ -15,11 +15,11 @@
                 Field (PIRY, ByteAcc, NoLock, Preserve)
                 {
                     Z000,   2,  // Parallel Port Range
-                        ,   1, 
+                        ,   1,
                     ECP,    1,  // ECP Enable
                     FDC1,   1,  // Floppy Drive Controller 1
                     FDC2,   1,  // Floppy Drive Controller 2
-                    Offset (0x01), 
+                    Offset (0x01),
                     Z001,   3,  // Serial Port A Range
                     SAEN,   1,  // Serial Post A Enabled
                     Z002,   3,  // Serial Port B Range
@@ -106,7 +106,7 @@
                         IO (Decode16, 0x0090, 0x0090, 0x01, 0x10)
                         IO (Decode16, 0x00A2, 0x00A2, 0x01, 0x1E)
                         IO (Decode16, 0x00E0, 0x00E0, 0x01, 0x10)
-                        IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error 
+                        IO (Decode16, 0x0B78, 0x0B78, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error
                         IO (Decode16, 0x0190, 0x0190, 0x01, 0x04) // Added this to remove ACPI Unrepoted IO Error
                     })
                     Method (_CRS, 0, NotSerialized)
@@ -134,7 +134,7 @@
                             Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
                             Memory32Fixed (ReadWrite, 0x00000000, 0x00000000) //Overlay BIOS
                         })
-			// Read the Video Memory length 
+			// Read the Video Memory length
                         CreateDWordField (BUF0, 0x14, CLEN)
                         CreateDWordField (BUF0, 0x10, CBAS)
 

Modified: trunk/src/mainboard/iwill/dk8_htx/acpi/amd8131.asl
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/acpi/amd8131.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/acpi/amd8131.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 /*
  * Copyright 2005 AMD
  */
-		
+
             Device (PG0A)
             {
                 /*  8132 pcix bridge*/
@@ -19,60 +19,60 @@
                 Name (APIC, Package (0x14)
                 {
 		    // Slot 3 - PIRQ BCDA ---- verified
-                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 3 
-                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x19 }, //Slot 3
+                    Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x1A },
+                    Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x1B },
                     Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x18 },
- 
+
 		    //Slot 4 - PIRQ CDAB  ---- verified
                     Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1A }, //?
-                    Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1B }, 
-                    Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x18 }, 
-                    Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x19 }, 
+                    Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1B },
+                    Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x18 },
+                    Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x19 },
 
 		    //Onboard NIC 1  - PIRQ DABC
                     Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x1B }, //?
-                    Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x18 }, 
-                    Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x19 }, 
-                    Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x1A }, 
+                    Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x18 },
+                    Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x19 },
+                    Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x1A },
 
 		    // NIC 2  - PIRQ ABCD -- verified
                     Package (0x04) { 0x0004FFFF, 0x00, 0x00, 0x18 }, //?
-                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x19 }, 
-                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0004FFFF, 0x01, 0x00, 0x19 },
+                    Package (0x04) { 0x0004FFFF, 0x02, 0x00, 0x1A },
+                    Package (0x04) { 0x0004FFFF, 0x03, 0x00, 0x1B },
 
 		    //SERIAL ATA     - PIRQ BCDA
                     Package (0x04) { 0x0005FFFF, 0x00, 0x00, 0x19 }, //?
-                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x1A }, 
-                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x1B }, 
+                    Package (0x04) { 0x0005FFFF, 0x01, 0x00, 0x1A },
+                    Package (0x04) { 0x0005FFFF, 0x02, 0x00, 0x1B },
                     Package (0x04) { 0x0005FFFF, 0x03, 0x00, 0x18 }
                 })
                 Name (PICM, Package (0x14)
                 {
-                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 3 
-                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }, 
-
-                    Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0002FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0002FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }, 
-
-                    Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 }, 
-
-                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, 
-
-                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },//Slot 3
+                    Package (0x04) { 0x0001FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0001FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0001FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 },
+
+                    Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0002FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0002FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 },
+
+                    Package (0x04) { 0x0003FFFF, 0x00, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0003FFFF, 0x01, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0003FFFF, 0x02, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0003FFFF, 0x03, \_SB.PCI0.LNKC, 0x00 },
+
+                    Package (0x04) { 0x0004FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0004FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 },
+
+                    Package (0x04) { 0x0005FFFF, 0x00, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0005FFFF, 0x01, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0005FFFF, 0x02, \_SB.PCI0.LNKD, 0x00 },
                     Package (0x04) { 0x0005FFFF, 0x03, \_SB.PCI0.LNKA, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)
@@ -100,15 +100,15 @@
                 {
 		    // Slot A - PIRQ CDAB -- verfied
                     Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1E },// Slot 2
-                    Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1F }, 
-                    Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x1C }, 
+                    Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1F },
+                    Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x1C },
                     Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x1D }
                 })
                 Name (PICM, Package (0x04)
                 {
-                    Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 }, 
-                    Package (0x04) { 0x0002FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 }, 
+                    Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LNKC, 0x00 },//Slot 2
+                    Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LNKD, 0x00 },
+                    Package (0x04) { 0x0002FFFF, 0x02, \_SB.PCI0.LNKA, 0x00 },
                     Package (0x04) { 0x0002FFFF, 0x03, \_SB.PCI0.LNKB, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)

Modified: trunk/src/mainboard/iwill/dk8_htx/acpi/amd8131_2.asl
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/acpi/amd8131_2.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/acpi/amd8131_2.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 /*
  * Copyright 2005 AMD
  */
-		
+
             Device (PG0A)
             {
                 /*  8132 pcix bridge*/
@@ -19,18 +19,18 @@
                 Name (APIC, Package (0x04)
                 {
 		    // Slot A - PIRQ BCDA
-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B },
- 
+
                 })
                 Name (PICM, Package (0x04)
                 {
-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 },
                 })
 
 		Name (DNCG, Ones)
@@ -40,7 +40,7 @@
                     If (LEqual (^DNCG, Ones)) {
 			    Multiply (HCIN, 0x0008, Local2) // GSI for 8132 is 4 so we get 8
 		            Store (0x00, Local1)
-            		    While (LLess (Local1, 0x04)) 
+            		    While (LLess (Local1, 0x04))
             		    {
                         	// Update the GSI according to HCIN
 	                        Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0)
@@ -76,15 +76,15 @@
                 {
 		    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, 
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 }
                 })
                 Name (PICM, Package (0x04)
                 {
-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
 

Modified: trunk/src/mainboard/iwill/dk8_htx/acpi/amd8132_2.asl
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/acpi/amd8132_2.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/acpi/amd8132_2.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 /*
  * Copyright 2005 AMD
  */
-		
+
             Device (PG0A)
             {
                 /*  8132 pcix bridge*/
@@ -19,18 +19,18 @@
                 Name (APIC, Package (0x04)
                 {
 		    // Slot A - PIRQ BCDA
-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x0018 }, //Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0019 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x001A },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x001B },
- 
+
                 })
                 Name (PICM, Package (0x04)
                 {
-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 2
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 },
                 })
 
 		Name (DNCG, Ones)
@@ -40,7 +40,7 @@
                     If (LEqual (^DNCG, Ones)) {
 			    Multiply (HCIN, 0x000e, Local2) // GSI for 8132 is 7 so we get 14
 		            Store (0x00, Local1)
-            		    While (LLess (Local1, 0x04)) 
+            		    While (LLess (Local1, 0x04))
             		    {
                         	// Update the GSI according to HCIN
 	                        Store(DeRefOf(Index (DeRefOf (Index (APIC, Local1)), 3)), Local0)
@@ -76,15 +76,15 @@
                 {
 		    // Slot A - PIRQ ABCD
                     Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x001F },// Slot 1
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 }, 
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x0020 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x0021 },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x0022 }
                 })
                 Name (PICM, Package (0x04)
                 {
-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },//Slot 1
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
 

Modified: trunk/src/mainboard/iwill/dk8_htx/acpi/amd8151.asl
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/acpi/amd8151.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/acpi/amd8151.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-// AMD8151 
+// AMD8151
             Device (AGPB)
             {
                 Method (_ADR, 0, NotSerialized)
@@ -8,16 +8,16 @@
 
                 Name (APIC, Package (0x04)
                 {
-                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 }, 
-                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 },
+                    Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 },
+                    Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 },
                     Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x13 }
                 })
                 Name (PICM, Package (0x04)
                 {
-                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 }, 
-                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 }, 
+                    Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LNKA, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LNKB, 0x00 },
+                    Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LNKC, 0x00 },
                     Package (0x04) { 0x0000FFFF, 0x03, \_SB.PCI0.LNKD, 0x00 }
                 })
                 Method (_PRT, 0, NotSerialized)

Modified: trunk/src/mainboard/iwill/dk8_htx/acpi/htx_no_ioapic.asl
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/acpi/htx_no_ioapic.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/acpi/htx_no_ioapic.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 /*
  * Copyright 2006 AMD
  */
-		
+
             Device (HTXA)
             {
                 /*  HTX */

Modified: trunk/src/mainboard/iwill/dk8_htx/acpi_tables.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/acpi_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/acpi_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -25,7 +25,7 @@
 #if DUMP_ACPI_TABLES == 1
 static void dump_mem(unsigned start, unsigned end)
 {
-        
+
 	unsigned i;
         print_debug("dump_mem:");
         for(i=start;i<end;i++) {
@@ -63,10 +63,10 @@
         struct mb_sysconf_t *m;
 
         m = sysconf.mb;
- 
+
 	/* create all subtables for processors */
 	current = acpi_create_madt_lapics(current);
-	
+
 	/* Write 8111 IOAPIC */
 	current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8111,
 			IO_APIC_ADDR, 0);
@@ -102,7 +102,7 @@
 			unsigned d = 0;
                         if(!(sysconf.pci1234[i] & 0x1) ) continue;
                         // 8131 need to use +4
-			
+
                         switch (sysconf.hcid[i]) {
                         case 1:
 				d = 7;
@@ -145,7 +145,7 @@
 			current, 0, 0, 2, 5 );
 		/* 0: mean bus 0--->ISA */
 		/* 0: PIC 0 */
-		/* 2: APIC 2 */ 
+		/* 2: APIC 2 */
 		/* 5 mean: 0101 --> Edige-triggered, Active high*/
 
 
@@ -185,7 +185,7 @@
 	/* Align ACPI tables to 16byte */
 	start   = ( start + 0x0f ) & -0x10;
 	current = start;
-	
+
 	printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
 
 	/* We need at least an RSDP and an RSDT Table */
@@ -196,7 +196,7 @@
 
 	/* clear all table memory */
 	memset((void *)start, 0, current - start);
-	
+
 	acpi_write_rsdp(rsdp, rsdt, NULL);
 	acpi_write_rsdt(rsdt);
 

Modified: trunk/src/mainboard/iwill/dk8_htx/devicetree.cb
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -8,7 +8,7 @@
 		chip northbridge/amd/amdk8
 			device pci 18.0 on end
 			device pci 18.0 on end
-			device pci 18.0 on #  northbridge 
+			device pci 18.0 on #  northbridge
 				chip southbridge/amd/amd8131
 					# the on/off keyword is mandatory
 					device pci 0.0 on end
@@ -57,7 +57,7 @@
 								io 0x60 = 0x220
 								io 0x62 = 0x300
 								irq 0x70 = 9
-							end						
+							end
 							device pnp 2e.8 on #  GPIO2
 								io 0x07 = 0x08ff
 								io 0x30 = 0x01ff

Modified: trunk/src/mainboard/iwill/dk8_htx/dsdt.asl
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/dsdt.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/dsdt.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -100,11 +100,11 @@
                 Concatenate (\_SB.GMEM (0x00, \_SB.PCI0.SBLK), BUF0, Local1)
                 Concatenate (\_SB.GIOR (0x00, \_SB.PCI0.SBLK), Local1, Local2)
                 Concatenate (\_SB.GWBN (0x00, \_SB.PCI0.SBLK), Local2, Local3)
-                Return (Local3) 
+                Return (Local3)
 	    }
 
 	    #include "acpi/pci0_hc.asl"
-		
+
         }
         Device (PCI1)
         {
@@ -138,7 +138,7 @@
             Notify (\_SB.PCI0.PG0B, 0x02)
         }
 
-        Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A 
+        Method (_L29, 0, NotSerialized) // GPIO25 (Suspend) - Pogo 0 Bridge A
         {
             Notify (\_SB.PCI0.PG0A, 0x02)
         }
@@ -183,14 +183,14 @@
     OperationRegion (GRAM, SystemMemory, 0x0400, 0x0100)
     Field (GRAM, ByteAcc, Lock, Preserve)
     {
-        Offset (0x10), 
+        Offset (0x10),
         FLG0,   8
     }
 
     OperationRegion (GSTS, SystemIO, 0xC028, 0x02)
     Field (GSTS, ByteAcc, NoLock, Preserve)
     {
-            ,   4, 
+            ,   4,
         IRQR,   1
     }
 

Modified: trunk/src/mainboard/iwill/dk8_htx/fadt.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/fadt.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/fadt.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -30,7 +30,7 @@
 	// 3=Workstation,4=Enterprise Server, 7=Performance Server
 	fadt->preferred_pm_profile=0x03;
 	fadt->sci_int=9;
-	// disable system management mode by setting to 0: 
+	// disable system management mode by setting to 0:
 	fadt->smi_cmd = 0;//pm_base+0x2f;
 	fadt->acpi_enable = 0xf0;
 	fadt->acpi_disable = 0xf1;
@@ -53,7 +53,7 @@
 	fadt->gpe0_blk_len =  4;
 	fadt->gpe1_blk_len =  8;
 	fadt->gpe1_base    = 16;
-	
+
 	fadt->cst_cnt    = 0xe3;
 	fadt->p_lvl2_lat =  101;
 	fadt->p_lvl3_lat = 1001;
@@ -66,7 +66,7 @@
 	fadt->century =  0; // 0x7f to make rtc alrm work
 	fadt->iapc_boot_arch = 0x3; // See table 5-11
 	fadt->flags = 0x25;
-	
+
 	fadt->res2 = 0;
 
 	fadt->reset_reg.space_id = 1;

Modified: trunk/src/mainboard/iwill/dk8_htx/get_bus_conf.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/get_bus_conf.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/get_bus_conf.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -15,10 +15,10 @@
 // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
 struct mb_sysconf_t mb_sysconf;
 
-static unsigned pci1234x[] = 
+static unsigned pci1234x[] =
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
 	 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
-        0x0000ff0, // SB chain m 
+        0x0000ff0, // SB chain m
         0x0000000, // HTX
         0x0000100, // co processor on socket 1
 //        0x0000ff0,
@@ -27,7 +27,7 @@
 //        0x0000ff0,
 //        0x0000ff0
 };
-static unsigned hcdnx[] = 
+static unsigned hcdnx[] =
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
 	0x20202020,
 	0x20202020,
@@ -88,17 +88,17 @@
 	get_bus_conf_done = 1;
 
 	sysconf.mb = &mb_sysconf;
-	
+
 	m = sysconf.mb;
 
-	sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);	
+	sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
 	for(i=0;i<sysconf.hc_possible_num; i++) {
 		sysconf.pci1234[i] = pci1234x[i];
 		sysconf.hcdn[i] = hcdnx[i];
 	}
-	
+
 	get_sblk_pci1234();
-	
+
 	sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
 	m->sbdn3 = sysconf.hcdn[0] & 0xff;
 
@@ -209,8 +209,8 @@
 /*I/O APICs:	APIC ID	Version	State		Address*/
 #if CONFIG_LOGICAL_CPUS==1
 	apicid_base = get_apicid_base(3);
-#else 
-	apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+	apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
 	m->apicid_8111 = apicid_base+0;
 	m->apicid_8132_1 = apicid_base+1;

Modified: trunk/src/mainboard/iwill/dk8_htx/irq_tables.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
@@ -13,11 +13,11 @@
 
 #include "mb_sysconf.h"
 
-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
 		uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
 		uint8_t slot, uint8_t rfu)
 {
-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;
         pirq_info->devfn = devfn;
 
 	pirq_info->irq[0].link = link0;
@@ -50,7 +50,7 @@
 	struct mb_sysconf_t *m;
 
 	get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
-	
+
 	m = sysconf.mb;
 
         /* Align the table to be 16 byte aligned. */
@@ -62,25 +62,25 @@
 
 	pirq = (void *)(addr);
 	v = (uint8_t *)(addr);
-	
+
 	pirq->signature = PIRQ_SIGNATURE;
 	pirq->version  = PIRQ_VERSION;
-	
+
 	pirq->rtr_bus = m->bus_8111_0;
 	pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
 
 	pirq->exclusive_irqs = 0;
-	
+
 	pirq->rtr_vendor = 0x1022;
 	pirq->rtr_device = 0x746b;
 
 	pirq->miniport_data = 0;
 
 	memset(pirq->rfu, 0, sizeof(pirq->rfu));
-	
+
 	pirq_info = (void *) ( &pirq->checksum + 1);
 	slot_num = 0;
-	
+
         {
                 device_t dev;
                 dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn+1,3));
@@ -126,11 +126,11 @@
                 j++;
 
         }
-	
-	pirq->size = 32 + 16 * slot_num; 
+
+	pirq->size = 32 + 16 * slot_num;
 
         for (i = 0; i < pirq->size; i++)
-                sum += v[i];	
+                sum += v[i];
 
 	sum = pirq->checksum - sum;
 

Modified: trunk/src/mainboard/iwill/dk8_htx/mptable.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -101,8 +101,8 @@
                 }
 
 	}
-  
-/*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */	
+
+/*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, m->apicid_8111, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x1, m->apicid_8111, 0x1);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x0, m->apicid_8111, 0x2);
@@ -149,14 +149,14 @@
 
 //Slot 4 PCI-X 133/100/66
         for(i=0;i<4;i++) {
-                smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (2<<2)|i, m->apicid_8132_1, (2+i)%4); //26 
+                smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (2<<2)|i, m->apicid_8132_1, (2+i)%4); //26
         }
 
 //Onboard NICS
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (3<<2)|0, m->apicid_8132_1, 3); //27
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (4<<2)|0, m->apicid_8132_1, 0); //24
 
-//Onboard SATA 
+//Onboard SATA
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (5<<2)|0, m->apicid_8132_1, 1); //25
 
         j = 0;

Modified: trunk/src/mainboard/iwill/dk8_htx/resourcemap.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -143,7 +143,7 @@
 		 *	   1 = base/limit registers i are read-only
 		 * [ 7: 4] Reserved
 		 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-		 *	   This field defines the upper address bits of a 40bit address 
+		 *	   This field defines the upper address bits of a 40bit address
 		 *	   that defines the start of memory-mapped I/O region i
 		 */
 		PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -199,7 +199,7 @@
 		 * [ 3: 2] Reserved
 		 * [ 4: 4] VGA Enable
 		 *	   0 = VGA matches Disabled
-		 *	   1 = matches all address < 64K and where A[9:0] is in the 
+		 *	   1 = matches all address < 64K and where A[9:0] is in the
 		 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 		 * [ 5: 5] ISA Enable
 		 *	   0 = ISA matches Disabled
@@ -207,7 +207,7 @@
 		 *	       from matching agains this base/limit pair
 		 * [11: 6] Reserved
 		 * [24:12] PCI I/O Base i
-		 *	   This field defines the start of PCI I/O region n 
+		 *	   This field defines the start of PCI I/O region n
 		 * [31:25] Reserved
 		 */
 		PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
@@ -252,7 +252,7 @@
 		 *	   This field defines the highest bus number in configuration regin i
 		 */
 		PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x06000203, // AMD 8111 on link0 of CPU 0
-		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
 	};

Modified: trunk/src/mainboard/iwill/dk8_htx/romstage.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
@@ -97,7 +97,7 @@
 #include "lib/ramtest.c"
 
  /* tyan does not want the default */
-#include "resourcemap.c" 
+#include "resourcemap.c"
 
 #include "cpu/amd/dualcore/dualcore.c"
 
@@ -165,21 +165,21 @@
 	print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
 #if CONFIG_MEM_TRAIN_SEQ == 1
-        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram 
+        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
 #endif
 	setup_coherent_ht_domain(); // routing table and start other core0
 
 	wait_all_core0_started();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
-	/* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, 
+	/* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain,
 	 * So here need to make sure last core0 is started, esp for two way system,
-	 * (there may be apic id conflicts in that case) 
+	 * (there may be apic id conflicts in that case)
 	 */
         start_other_cores();
 	wait_all_other_cores_started(bsp_apicid);
 #endif
-	
+
 	/* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 
@@ -202,7 +202,7 @@
         {
                 msr_t msr;
                	msr=rdmsr(0xc0010042);
-               	print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); 
+               	print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
 
         }
 #endif

Modified: trunk/src/mainboard/iwill/dk8_htx/ssdt2.asl
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/ssdt2.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/ssdt2.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -28,16 +28,16 @@
 
 	    // BUS ? Second HT Chain
 	    Name (HCIN, 0xcc)  // HC2 0x01
-            
+
 	    Name (_UID,  0xdd)  // HC 0x03
 
-	    Name (_HID, "PNP0A03") 
+	    Name (_HID, "PNP0A03")
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
 	    {
 		Return (DADD(GHCN(HCIN), 0x00000000))
 	    }
-	
+
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
@@ -45,7 +45,7 @@
 
             Method (_STA, 0, NotSerialized)
             {
-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))
             }
 
             Method (_CRS, 0, NotSerialized)

Modified: trunk/src/mainboard/iwill/dk8_htx/ssdt3.asl
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/ssdt3.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/ssdt3.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -28,16 +28,16 @@
 
 	    // BUS ? Second HT Chain
 	    Name (HCIN, 0xcc)  // HC2 0x01
-            
+
 	    Name (_UID,  0xdd)  // HC 0x03
 
-	    Name (_HID, "PNP0A03") 
+	    Name (_HID, "PNP0A03")
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
 	    {
 		Return (DADD(GHCN(HCIN), 0x00000000))
 	    }
-	
+
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
@@ -45,7 +45,7 @@
 
             Method (_STA, 0, NotSerialized)
             {
-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))
             }
 
             Method (_CRS, 0, NotSerialized)

Modified: trunk/src/mainboard/iwill/dk8_htx/ssdt4.asl
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/ssdt4.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/ssdt4.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -28,16 +28,16 @@
 
 	    // BUS ? Second HT Chain
 	    Name (HCIN, 0xcc)  // HC2 0x01
-            
+
 	    Name (_UID,  0xdd)  // HC 0x03
 
-	    Name (_HID, "PNP0A03") 
+	    Name (_HID, "PNP0A03")
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
 	    {
 		Return (DADD(GHCN(HCIN), 0x00000000))
 	    }
-	
+
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
@@ -45,7 +45,7 @@
 
             Method (_STA, 0, NotSerialized)
             {
-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))
             }
 
             Method (_CRS, 0, NotSerialized)

Modified: trunk/src/mainboard/iwill/dk8_htx/ssdt5.asl
==============================================================================
--- trunk/src/mainboard/iwill/dk8_htx/ssdt5.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8_htx/ssdt5.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -28,16 +28,16 @@
 
 	    // BUS ? Second HT Chain
 	    Name (HCIN, 0xcc)  // HC2 0x01
-            
+
 	    Name (_UID,  0xdd)  // HC 0x03
 
-	    Name (_HID, "PNP0A03") 
+	    Name (_HID, "PNP0A03")
 
             Method (_ADR, 0, NotSerialized) //Fake bus should be 0
 	    {
 		Return (DADD(GHCN(HCIN), 0x00000000))
 	    }
-	
+
             Method (_BBN, 0, NotSerialized)
             {
                 Return (GBUS (GHCN(HCIN), GHCL(HCIN)))
@@ -45,7 +45,7 @@
 
             Method (_STA, 0, NotSerialized)
             {
-                Return (\_SB.GHCE(HCIN)) 
+                Return (\_SB.GHCE(HCIN))
             }
 
             Method (_CRS, 0, NotSerialized)

Modified: trunk/src/mainboard/iwill/dk8s2/irq_tables.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8s2/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8s2/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

Modified: trunk/src/mainboard/iwill/dk8s2/romstage.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8s2/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8s2/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
@@ -165,21 +165,21 @@
 	print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
 #if CONFIG_MEM_TRAIN_SEQ == 1
-        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram 
+        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
 #endif
 	setup_coherent_ht_domain(); // routing table and start other core0
 
 	wait_all_core0_started();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
-	/* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, 
+	/* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain,
 	 * So here need to make sure last core0 is started, esp for two way system,
-	 * (there may be apic id conflicts in that case) 
+	 * (there may be apic id conflicts in that case)
 	 */
         start_other_cores();
 	wait_all_other_cores_started(bsp_apicid);
 #endif
-	
+
 	/* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 
@@ -202,7 +202,7 @@
         {
                 msr_t msr;
                	msr=rdmsr(0xc0010042);
-               	print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); 
+               	print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
 
         }
 #endif

Modified: trunk/src/mainboard/iwill/dk8x/devicetree.cb
==============================================================================
--- trunk/src/mainboard/iwill/dk8x/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8x/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,8 +1,8 @@
 chip northbridge/amd/amdk8/root_complex
 	device pci_domain 0 on
 		chip northbridge/amd/amdk8
-			device pci 18.0 on #  northbridge 
-				#  devices on link 0, link 0 == LDT 0 
+			device pci 18.0 on #  northbridge
+				#  devices on link 0, link 0 == LDT 0
 				chip southbridge/amd/amd8131
 					# the on/off keyword is mandatory
 					device pci 0.0 on end
@@ -28,15 +28,15 @@
 							device pnp 2e.4 on end
 							device pnp 2e.5 on end
 							device pnp 2e.6 on end
-							device pnp 2e.7 on end 
-							device pnp 2e.8 on end 
-							device pnp 2e.9 on end 
-							device pnp 2e.a on end 
+							device pnp 2e.7 on end
+							device pnp 2e.8 on end
+							device pnp 2e.9 on end
+							device pnp 2e.a on end
 						end
 					end
 					device pci 1.1 on end
 					device pci 1.2 on end
-					device pci 1.3 on end 
+					device pci 1.3 on end
 					device pci 1.5 off end
 					device pci 1.6 off end
 				end
@@ -55,7 +55,7 @@
 			device pci 19.2 on end
 			device pci 19.3 on end
 		end
-	end 
+	end
 	device apic_cluster 0 on
 		chip cpu/amd/socket_940
 			device apic 0 on end

Modified: trunk/src/mainboard/iwill/dk8x/irq_tables.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8x/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8x/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -12,13 +12,13 @@
 	{linkc, AVAILABLE_IRQS}, {linkd, AVAILABLE_IRQS}}, slot, 0}
 
 /*  Each IRQ_SLOT entry consists of:
- *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu  
+ *  bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu
  */
 
 const struct irq_routing_table intel_irq_routing_table = {
 	PIRQ_SIGNATURE,		/* u32 signature */
 	PIRQ_VERSION,		/* u16 version   */
-	32+16*CONFIG_IRQ_SLOT_COUNT,	/* there can be total CONFIG_IRQ_SLOT_COUNT 
+	32+16*CONFIG_IRQ_SLOT_COUNT,	/* there can be total CONFIG_IRQ_SLOT_COUNT
 				 * devices on the bus */
 	IRQ_ROUTER_BUS,		/* Where the interrupt router lies (bus) */
 	IRQ_ROUTER_DEVFN,	/* Where the interrupt router lies (dev) */
@@ -28,7 +28,7 @@
 	0x00,			/* Crap (miniport) */
 	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },	/* u8 rfu[11] */
 	0x00,			/*  u8 checksum , mod 256 checksum must give
-				 *  zero, will be corrected later 
+				 *  zero, will be corrected later
 				 */
 	{
 

Modified: trunk/src/mainboard/iwill/dk8x/romstage.c
==============================================================================
--- trunk/src/mainboard/iwill/dk8x/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/iwill/dk8x/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1
@@ -165,21 +165,21 @@
 	print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
 
 #if CONFIG_MEM_TRAIN_SEQ == 1
-        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram 
+        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
 #endif
 	setup_coherent_ht_domain(); // routing table and start other core0
 
 	wait_all_core0_started();
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
-	/* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain, 
+	/* becase optimize_link_coherent_ht is moved out from setup_coherent_ht_domain,
 	 * So here need to make sure last core0 is started, esp for two way system,
-	 * (there may be apic id conflicts in that case) 
+	 * (there may be apic id conflicts in that case)
 	 */
         start_other_cores();
 	wait_all_other_cores_started(bsp_apicid);
 #endif
-	
+
 	/* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 
@@ -202,7 +202,7 @@
         {
                 msr_t msr;
                	msr=rdmsr(0xc0010042);
-               	print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); 
+               	print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
 
         }
 #endif

Modified: trunk/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,7 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the
  * i945
  */
 

Modified: trunk/src/mainboard/kontron/986lcd-m/acpi/ich7_pci_irqs.asl
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/acpi/ich7_pci_irqs.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/acpi/ich7_pci_irqs.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,7 +17,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the
  * 0:1e.0 PCI bridge of the ICH7
  */
 

Modified: trunk/src/mainboard/kontron/986lcd-m/acpi/platform.asl
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/acpi/platform.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/acpi/platform.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -42,9 +42,9 @@
 	Return (SMIF)		// Return value of SMI handler
 }
 
-/* The _PIC method is called by the OS to choose between interrupt 
+/* The _PIC method is called by the OS to choose between interrupt
  * routing via the i8259 interrupt controller or the APIC.
- * 
+ *
  * _PIC is called with a parameter of 0 for i8259 configuration and
  * with a parameter of 1 for Local Apic/IOAPIC configuration.
  */
@@ -74,12 +74,12 @@
 	// Notify PCI Express slots in case a card
 	// was inserted while a sleep state was active.
 
-	// Are we going to S3? 
+	// Are we going to S3?
 	If (LEqual(Arg0, 3)) {
 		// ..
 	}
 
-	// Are we going to S4? 
+	// Are we going to S4?
 	If (LEqual(Arg0, 4)) {
 		// ..
 	}

Modified: trunk/src/mainboard/kontron/986lcd-m/acpi/thermal.asl
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/acpi/thermal.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/acpi/thermal.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -25,7 +25,7 @@
 	{
 
 		// FIXME these could/should be read from the
-		// GNVS area, so they can be controlled by 
+		// GNVS area, so they can be controlled by
 		// coreboot
 		Name(TC1V, 0x04)
 		Name(TC2V, 0x03)

Modified: trunk/src/mainboard/kontron/986lcd-m/acpi_tables.c
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/acpi_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/acpi_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify

Modified: trunk/src/mainboard/kontron/986lcd-m/chip.h
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/chip.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/chip.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2008 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify

Modified: trunk/src/mainboard/kontron/986lcd-m/cmos.layout
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/cmos.layout	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/cmos.layout	Tue Apr 27 08:56:47 2010	(r5507)
@@ -102,7 +102,7 @@
 968          1       e       2        ethernet1
 969          1       e       2        ethernet2
 970          1       e       2        ethernet3
- 
+
 #971          13       r       0        unused
 
 # coreboot config options: check sums

Modified: trunk/src/mainboard/kontron/986lcd-m/devicetree.cb
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -6,7 +6,7 @@
                 end
         end
 
-        device pci_domain 0 on 
+        device pci_domain 0 on
                 device pci 00.0 on end # host bridge
 		device pci 01.0 off end # i945 PCIe root port
 		device pci 02.0 on end # vga controller
@@ -46,7 +46,7 @@
                 	device pci 1d.3 on end # USB UHCI
                 	device pci 1d.7 on end # USB2 EHCI
                 	device pci 1e.0 on end # PCI bridge
-			#device pci 1e.2 off end # AC'97 Audio 
+			#device pci 1e.2 off end # AC'97 Audio
 			#device pci 1e.3 off end # AC'97 Modem
                         device pci 1f.0 on # LPC bridge
                                 chip superio/winbond/w83627thg

Modified: trunk/src/mainboard/kontron/986lcd-m/dsdt.asl
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/dsdt.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/dsdt.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -34,7 +34,7 @@
 
 	// General Purpose Events
 	//#include "acpi/gpe.asl"
-	
+
 	//#include "acpi/thermal.asl"
 
 	Scope (\_SB) {

Modified: trunk/src/mainboard/kontron/986lcd-m/mainboard.c
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/mainboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/mainboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -104,7 +104,7 @@
 	u16 fan_speed;
 };
 
-// FANIN Target Speed Register 
+// FANIN Target Speed Register
 // FANIN = 337500 / RPM
 struct fan_speed fan_speeds[] = {
 	{ 0x3c, 5625 }, { 0x41, 5192 }, { 0x47, 4753 }, { 0x4e, 4326 },
@@ -119,7 +119,7 @@
 };
 
 struct temperature temperatures[] = {
-	{ 30,  86 }, { 33,  91 }, { 36,  96 }, { 39, 102 }, 
+	{ 30,  86 }, { 33,  91 }, { 36,  96 }, { 39, 102 },
 	{ 42, 107 }, { 45, 113 }, { 48, 118 }, { 51, 123 },
 	{ 54, 129 }, { 57, 134 }, { 60, 140 }, { 63, 145 },
 	{ 66, 150 }, { 69, 156 }, { 72, 161 }, { 75, 167 }
@@ -144,7 +144,7 @@
 		sysfan_speed = FAN_SPEED_5625;
 	//if (get_option(&sysfan_temperature, "sysfan_temperature") < 0)
 	//	sysfan_temperature = FAN_TEMPERATURE_30DEGC;
-	
+
 	// hwm_write(0x31, 0x20); // AVCC high limit
 	// hwm_write(0x34, 0x06); // VIN2 low limit
 
@@ -223,10 +223,10 @@
 	cim_verb_data_size = 0;
 }
 
-// mainboard_enable is executed as first thing after 
+// mainboard_enable is executed as first thing after
 // enumerate_buses().
 
-static void mainboard_enable(device_t dev) 
+static void mainboard_enable(device_t dev)
 {
 #if CONFIG_PCI_OPTION_ROM_RUN_YABEL
 	/* Install custom int15 handler for VGA OPROM */

Modified: trunk/src/mainboard/kontron/986lcd-m/mainboard_smi.c
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/mainboard_smi.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/mainboard_smi.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -23,7 +23,7 @@
 #include <cpu/x86/smm.h>
 #include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
 
-/* The southbridge SMI handler checks whether gnvs has a 
+/* The southbridge SMI handler checks whether gnvs has a
  * valid pointer before calling the trap handler
  */
 extern global_nvs_t *gnvs;

Modified: trunk/src/mainboard/kontron/986lcd-m/mptable.c
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -90,7 +90,7 @@
 
 	/* Legacy Interrupts */
 
-	/* I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */	
+	/* I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, ioapic_id, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x1, ioapic_id, 0x1);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, ioapic_id, 0x2);
@@ -158,11 +158,11 @@
 	return smp_next_mpe_entry(mc);
 }
 
-/* MP table generation in coreboot is not very well designed; 
- * One of the issues is that it knows nothing about Virtual 
+/* MP table generation in coreboot is not very well designed;
+ * One of the issues is that it knows nothing about Virtual
  * Wire mode, which everyone uses since a decade or so. This
  * function fixes up our floating table. This spares us doing
- * a half-baked fix of adding a new parameter to 200+ calls 
+ * a half-baked fix of adding a new parameter to 200+ calls
  * to smp_write_floating_table()
  */
 static void fixup_virtual_wire(void *v)

Modified: trunk/src/mainboard/kontron/986lcd-m/romstage.c
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2010 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify
@@ -21,7 +21,7 @@
 
 /* Configuration of the i945 driver */
 #define CHIPSET_I945GM 1
-/* Usually system firmware turns off system memory clock signals to 
+/* Usually system firmware turns off system memory clock signals to
  * unused SO-DIMM slots to reduce EMI and power consumption.
  * However, the Kontron 986LCD-M does not like unused clock signals to
  * be disabled. If other similar mainboard occur, it would make sense
@@ -107,7 +107,7 @@
 	pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x88, 0x000403e9);
 	// COM4 decode
 	pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x000402e9);
-	// io 0x300 decode 
+	// io 0x300 decode
 	pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x90, 0x00000301);
 }
 
@@ -119,7 +119,7 @@
 static void early_superio_config_w83627thg(void)
 {
 	device_t dev;
-	
+
 	dev=PNP_DEV(0x2e, W83627THG_SP1);
 	pnp_enter_ext_func_mode(dev);
 
@@ -194,7 +194,7 @@
 	pnp_set_irq(dev, PNP_IDX_IRQ0, 11);
 	pnp_set_enable(dev, 1);
 
-	dev=PNP_DEV(0x4e, W83627THG_SP2); 
+	dev=PNP_DEV(0x4e, W83627THG_SP2);
 	pnp_set_logical_device(dev); // Set COM4 to sane non-conflicting values
 	pnp_set_enable(dev, 0);
 	pnp_set_iobase(dev, PNP_IDX_IO0, 0x2e8);
@@ -249,7 +249,7 @@
 	 * would essentially disable all three ethernet ports of the mainboard.
 	 * It's possible to rename the ports to achieve compatibility to the
 	 * PCI spec but this will confuse all (static!) tables containing
-	 * interrupt routing information. 
+	 * interrupt routing information.
 	 * To avoid this, we enable (unused) port 6 and swap it with port 1
 	 * in the case that ethernet port 1 is disabled. Since no devices
 	 * are connected to that port, we don't have to worry about interrupt
@@ -413,7 +413,7 @@
 
 	/* Enable SPD ROMs and DDR-II DRAM */
 	enable_smbus();
-	
+
 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
 	dump_spd_registers();
 #endif
@@ -423,8 +423,8 @@
 	/* Perform some initialization that must run before stage2 */
 	early_ich7_init();
 
-	/* This should probably go away. Until now it is required 
-	 * and mainboard specific 
+	/* This should probably go away. Until now it is required
+	 * and mainboard specific
 	 */
 	rcba_config();
 
@@ -470,7 +470,7 @@
 		 * memory completely, but that's a wonderful clean up task for another
 		 * day.
 		 */
-		if (resume_backup_memory) 
+		if (resume_backup_memory)
 			memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
 
 		/* Magic for S3 resume */

Modified: trunk/src/mainboard/kontron/986lcd-m/rtl8168.c
==============================================================================
--- trunk/src/mainboard/kontron/986lcd-m/rtl8168.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/986lcd-m/rtl8168.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -28,7 +28,7 @@
 static void nic_init(struct device *dev)
 {
 	printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
-	// Nothing to do yet, but this has to be here to keep 
+	// Nothing to do yet, but this has to be here to keep
 	// coreboot from trying to execute an option ROM.
 }
 

Modified: trunk/src/mainboard/kontron/kt690/acpi/routing.asl
==============================================================================
--- trunk/src/mainboard/kontron/kt690/acpi/routing.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/kontron/kt690/acpi/routing.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -92,38 +92,38 @@
 		/* Bus 0, Dev 0 - RS690 Host Controller */
 		/* Bus 0, Dev 1 - PCI Bridge for Internal Graphics */
 		/* Bus 0, Dev 2 - PCIe Bridge for x8 PCIe Slot (GFX0) */
-		Package(){ 0x0002FFFF, 0, 0, 18 }, 
-		Package(){ 0x0002FFFF, 1, 0, 19 }, 
-		Package(){ 0x0002FFFF, 2, 0, 16 }, 
-		Package(){ 0x0002FFFF, 3, 0, 17 }, 
+		Package(){ 0x0002FFFF, 0, 0, 18 },
+		Package(){ 0x0002FFFF, 1, 0, 19 },
+		Package(){ 0x0002FFFF, 2, 0, 16 },
+		Package(){ 0x0002FFFF, 3, 0, 17 },
 
 		/* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
-		Package(){ 0x0003FFFF, 0, 0, 19 }, 
-		Package(){ 0x0003FFFF, 1, 0, 16 }, 
-		Package(){ 0x0003FFFF, 2, 0, 17 }, 
-		Package(){ 0x0003FFFF, 3, 0, 18 }, 
-	
+		Package(){ 0x0003FFFF, 0, 0, 19 },
+		Package(){ 0x0003FFFF, 1, 0, 16 },
+		Package(){ 0x0003FFFF, 2, 0, 17 },
+		Package(){ 0x0003FFFF, 3, 0, 18 },
+
 		/* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
-		Package(){ 0x0004FFFF, 0, 0, 16 }, 
-		Package(){ 0x0004FFFF, 1, 0, 17 }, 
-		Package(){ 0x0004FFFF, 2, 0, 18 }, 
-		Package(){ 0x0004FFFF, 3, 0, 19 }, 
+		Package(){ 0x0004FFFF, 0, 0, 16 },
+		Package(){ 0x0004FFFF, 1, 0, 17 },
+		Package(){ 0x0004FFFF, 2, 0, 18 },
+		Package(){ 0x0004FFFF, 3, 0, 19 },
 
 		/* Bus 0, Dev 5 - General purpose PCIe bridge 5 */
-		Package(){ 0x0005FFFF, 0, 0, 17 }, 
-		Package(){ 0x0005FFFF, 1, 0, 18 }, 
-		Package(){ 0x0005FFFF, 2, 0, 19 }, 
-		Package(){ 0x0005FFFF, 3, 0, 16 }, 
+		Package(){ 0x0005FFFF, 0, 0, 17 },
+		Package(){ 0x0005FFFF, 1, 0, 18 },
+		Package(){ 0x0005FFFF, 2, 0, 19 },
+		Package(){ 0x0005FFFF, 3, 0, 16 },
 
 		/* Bus 0, Dev 6 - General purpose PCIe bridge 6 */
-		Package(){ 0x0006FFFF, 0, 0, 18 }, 
-		Package(){ 0x0006FFFF, 1, 0, 19 }, 
-		Package(){ 0x0006FFFF, 2, 0, 16 }, 
-		Package(){ 0x0006FFFF, 3, 0, 17 }, 
+		Package(){ 0x0006FFFF, 0, 0, 18 },
+		Package(){ 0x0006FFFF, 1, 0, 19 },
+		Package(){ 0x0006FFFF, 2, 0, 16 },
+		Package(){ 0x0006FFFF, 3, 0, 17 },
 
 		/* Bus 0, Dev 7 - PCIe Bridge for network card */
-		Package(){ 0x0007FFFF, 0, 0, 19 }, 
-		Package(){ 0x0007FFFF, 1, 0, 16 }, 
+		Package(){ 0x0007FFFF, 0, 0, 19 },
+		Package(){ 0x0007FFFF, 1, 0, 16 },
 		Package(){ 0x0007FFFF, 2, 0, 17 },
 		Package(){ 0x0007FFFF, 3, 0, 18 },
 

Modified: trunk/src/mainboard/lippert/Kconfig
==============================================================================
--- trunk/src/mainboard/lippert/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/lippert/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_LIPPERT
-        
+
 source "src/mainboard/lippert/frontrunner/Kconfig"
 source "src/mainboard/lippert/roadrunner-lx/Kconfig"
 source "src/mainboard/lippert/spacerunner-lx/Kconfig"

Modified: trunk/src/mainboard/lippert/frontrunner/devicetree.cb
==============================================================================
--- trunk/src/mainboard/lippert/frontrunner/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/lippert/frontrunner/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 chip northbridge/amd/gx2
   register "setupflash" = "0"
   #register "irqmap" = "0xaa5b"
-  device pci_domain 0 on 
+  device pci_domain 0 on
     device pci 0.0 on end
       chip southbridge/amd/cs5535
         device pci 12.0 on

Modified: trunk/src/mainboard/lippert/frontrunner/irq_tables.c
==============================================================================
--- trunk/src/mainboard/lippert/frontrunner/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/lippert/frontrunner/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

Modified: trunk/src/mainboard/lippert/frontrunner/romstage.c
==============================================================================
--- trunk/src/mainboard/lippert/frontrunner/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/lippert/frontrunner/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
 #include "northbridge/amd/gx2/raminit.h"
 
 /* this has to be done on a per-mainboard basis, esp. if you don't have smbus */
-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)
 {
 	msr_t msr;
 	/* 1. Initialize GLMC registers base on SPD values,

Modified: trunk/src/mainboard/mitac/Kconfig
==============================================================================
--- trunk/src/mainboard/mitac/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/mitac/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,7 +21,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_MITAC
-	
+
 source "src/mainboard/mitac/6513wu/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/msi/Kconfig
==============================================================================
--- trunk/src/mainboard/msi/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,7 +21,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_MSI
-	
+
 source "src/mainboard/msi/ms6119/Kconfig"
 source "src/mainboard/msi/ms6147/Kconfig"
 source "src/mainboard/msi/ms6156/Kconfig"

Modified: trunk/src/mainboard/msi/ms6147/irq_tables.c
==============================================================================
--- trunk/src/mainboard/msi/ms6147/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms6147/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -35,7 +35,7 @@
 	{
 		/* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
 		{0x00,(0x0e<<3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},
-		{0x00,(0x10<<3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0}, 
+		{0x00,(0x10<<3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0},
 		{0x00,(0x12<<3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x3, 0x0},
 		{0x00,(0x14<<3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x4, 0x0},
 		{0x00,(0x00<<3)|0x0, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, /* North bridge */

Modified: trunk/src/mainboard/msi/ms7135/get_bus_conf.c
==============================================================================
--- trunk/src/mainboard/msi/ms7135/get_bus_conf.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms7135/get_bus_conf.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -47,7 +47,7 @@
 	0x0000ff0,		//no HTIO for ms7135
 };
 unsigned hcdnx[] = {		//HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
-	0x20202020,		//ms7135 has only one ht-chain 
+	0x20202020,		//ms7135 has only one ht-chain
 };
 unsigned bus_type[256];
 
@@ -100,7 +100,7 @@
 		switch (i) {
 			case 1: dn = 9; break;
 			case 2: dn = 13; break;
-			case 3: dn = 14; break;	
+			case 3: dn = 14; break;
 			default: dn = -1; break;
 		}
 		dev = dev_find_slot(bus_ck804[0], PCI_DEVFN(sbdn + dn, 0));

Modified: trunk/src/mainboard/msi/ms7135/irq_tables.c
==============================================================================
--- trunk/src/mainboard/msi/ms7135/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms7135/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -78,7 +78,7 @@
 	int i;
 	unsigned sbdn;
 
-	/* get_bus_conf() will find out all bus num and apic that share with 
+	/* get_bus_conf() will find out all bus num and apic that share with
 	 * mptable.c and mptable.c
 	 */
 	get_bus_conf();
@@ -112,7 +112,7 @@
 	pirq_info = (void *)(&pirq->checksum + 1);
 	slot_num = 0;
 
-//Slot1 PCIE 16x 
+//Slot1 PCIE 16x
 	write_pirq_info(pirq_info, bus_ck804[1], (0 << 3) | 0, 0x3, 0xdeb8, 0x4,
 			0xdeb8, 0x1, 0xdeb8, 0x2, 0xdeb8, 4, 0);
 	pirq_info++;
@@ -130,7 +130,7 @@
 	pirq_info++;
 	slot_num++;
 
-//Slot4 PCIE 4x 
+//Slot4 PCIE 4x
 	write_pirq_info(pirq_info, bus_ck804[4], (0x4 << 3) | 0,
 			0x2, 0xdeb8, 0x3, 0xdeb8, 0x4, 0xdeb8, 0x1, 0xdeb8,
 			7, 0);
@@ -229,7 +229,7 @@
 	irq[0] = 10; /* Ethernet */
 	pci_assign_irqs(bus_ck804[0], 10, irq);
 
-	
+
 	/* physical slots */
 
 	irq[0] = 5; /* PCI E1 - x1 */
@@ -237,7 +237,7 @@
 
 	irq[0] = 11; /* PCI E2 - x16 */
 	pci_assign_irqs(bus_ck804[3], 0, irq);
-	
+
 	/* AGP-on-PCI "AGR" ignored */
 
 	irq[0] = 10; /* PCI1 */
@@ -257,7 +257,7 @@
 	irq[2] = 11;
 	irq[3] = 0;
 	pci_assign_irqs(bus_ck804[1], 9, irq);
-#endif	
+#endif
 
 	return (unsigned long)pirq_info;
 }

Modified: trunk/src/mainboard/msi/ms7260/Kconfig
==============================================================================
--- trunk/src/mainboard/msi/ms7260/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms7260/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -15,7 +15,7 @@
 	select LIFT_BSP_APIC_ID
 	select K8_REV_F_SUPPORT
 	select BOARD_ROMSIZE_KB_512
- 
+
 config MAINBOARD_DIR
 	string
 	default msi/ms7260
@@ -25,7 +25,7 @@
 	hex
 	default 0xc8000
 	depends on BOARD_MSI_MS7260
-	
+
 config DCACHE_RAM_SIZE
 	hex
 	default 0x08000
@@ -37,7 +37,7 @@
 	depends on BOARD_MSI_MS7260
 
 config APIC_ID_OFFSET
-	hex	
+	hex
 	default 0x10
 	depends on BOARD_MSI_MS7260
 
@@ -77,7 +77,7 @@
 	depends on BOARD_MSI_MS7260
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
-	bool	
+	bool
 	default n
 	depends on BOARD_MSI_MS7260
 
@@ -87,12 +87,12 @@
 	depends on BOARD_MSI_MS7260
 
 config HT_CHAIN_END_UNITID_BASE
-	hex	
+	hex
 	default 0x20
 	depends on BOARD_MSI_MS7260
 
 config SERIAL_CPU_INIT
-	bool	
+	bool
 	default n
 	depends on BOARD_MSI_MS7260
 

Modified: trunk/src/mainboard/msi/ms7260/cmos.layout
==============================================================================
--- trunk/src/mainboard/msi/ms7260/cmos.layout	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms7260/cmos.layout	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,22 +1,22 @@
-## 
+##
 ## This file is part of the coreboot project.
-## 
+##
 ## Copyright (C) 2007 Uwe Hermann <uwe at hermann-uwe.de>
-## 
+##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
-## 
+##
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
-## 
+##
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-## 
+##
 
 # TODO: Check and fix up the values as needed.
 

Modified: trunk/src/mainboard/msi/ms7260/resourcemap.c
==============================================================================
--- trunk/src/mainboard/msi/ms7260/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms7260/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -163,7 +163,7 @@
 		 *	   1 = base/limit registers i are read-only
 		 * [ 7: 4] Reserved
 		 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-		 *	   This field defines the upper address bits of a 40bit address 
+		 *	   This field defines the upper address bits of a 40bit address
 		 *	   that defines the start of memory-mapped I/O region i
 		 */
 		PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -201,7 +201,7 @@
 		 * [31:25] Reserved
 		 */
 //		PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x00007000,
-		PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000, 
+		PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
 
@@ -219,7 +219,7 @@
 		 * [ 3: 2] Reserved
 		 * [ 4: 4] VGA Enable
 		 *	   0 = VGA matches Disabled
-		 *	   1 = matches all address < 64K and where A[9:0] is in the 
+		 *	   1 = matches all address < 64K and where A[9:0] is in the
 		 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 		 * [ 5: 5] ISA Enable
 		 *	   0 = ISA matches Disabled
@@ -227,7 +227,7 @@
 		 *	       from matching agains this base/limit pair
 		 * [11: 6] Reserved
 		 * [24:12] PCI I/O Base i
-		 *	   This field defines the start of PCI I/O region n 
+		 *	   This field defines the start of PCI I/O region n
 		 * [31:25] Reserved
 		 */
 //		PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
@@ -272,9 +272,9 @@
 		 *	   This field defines the highest bus number in configuration region i
 		 */
 //		PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0xff000003, /* link 0 of cpu 0 --> Nvidia MCP55 */
-		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
-		PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
 
 	};
 

Modified: trunk/src/mainboard/msi/ms7260/romstage.c
==============================================================================
--- trunk/src/mainboard/msi/ms7260/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms7260/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -152,7 +152,7 @@
 		(0xa << 3) | 5, (0xa << 3) | 7, 0, 0,
 	};
 
-	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE 
+	struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
 		+ CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
 	int needs_reset = 0;

Modified: trunk/src/mainboard/msi/ms9282/Kconfig
==============================================================================
--- trunk/src/mainboard/msi/ms9282/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms9282/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -14,7 +14,7 @@
 	select HAVE_HARD_RESET
 	select K8_REV_F_SUPPORT
 	select BOARD_ROMSIZE_KB_512
- 
+
 config MAINBOARD_DIR
 	string
 	default msi/ms9282
@@ -24,7 +24,7 @@
 	hex
 	default 0xcc000
 	depends on BOARD_MSI_MS9282
-	
+
 config DCACHE_RAM_SIZE
 	hex
 	default 0x04000
@@ -36,7 +36,7 @@
 	depends on BOARD_MSI_MS9282
 
 config APIC_ID_OFFSET
-	hex	
+	hex
 	default 0x10
 	depends on BOARD_MSI_MS9282
 
@@ -71,7 +71,7 @@
 	depends on BOARD_MSI_MS9282
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
-	bool	
+	bool
 	default n
 	depends on BOARD_MSI_MS9282
 
@@ -81,12 +81,12 @@
 	depends on BOARD_MSI_MS9282
 
 config HT_CHAIN_END_UNITID_BASE
-	hex	
+	hex
 	default 0x20
 	depends on BOARD_MSI_MS9282
 
 config SERIAL_CPU_INIT
-	bool	
+	bool
 	default n
 	depends on BOARD_MSI_MS9282
 

Modified: trunk/src/mainboard/msi/ms9282/Makefile.inc
==============================================================================
--- trunk/src/mainboard/msi/ms9282/Makefile.inc	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms9282/Makefile.inc	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 ##
 ## This file is part of the coreboot project.
-## 
+##
 ## Copyright (C) 2007-2008 coresystems GmbH
 ##
 ## This program is free software; you can redistribute it and/or modify

Modified: trunk/src/mainboard/msi/ms9652_fam10/acpi_tables.c
==============================================================================
--- trunk/src/mainboard/msi/ms9652_fam10/acpi_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms9652_fam10/acpi_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -2,7 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Written by Stefan Reinauer <stepan at openbios.org>.
- * ACPI FADT, FACS, and DSDT table support added by 
+ * ACPI FADT, FACS, and DSDT table support added by
  *
  * Copyright (C) 2004 Stefan Reinauer <stepan at openbios.org>
  * Copyright (C) 2005 Nick Barker <nick.barker9 at btinternet.com>
@@ -49,7 +49,7 @@
 	struct mb_sysconf_t *m;
 	//extern unsigned char bus_mcp55[8];
 	//extern unsigned apicid_mcp55;
-	
+
 	unsigned sbdn;
 	struct resource *res;
 	device_t dev;
@@ -57,7 +57,7 @@
 	get_bus_conf();
 	sbdn = sysconf.sbdn;
 	m = sysconf.mb;
-	
+
 	/* Create all subtables for processors. */
 	current = acpi_create_madt_lapics(current);
 
@@ -87,7 +87,7 @@
 
 	/* IRQ0 -> APIC IRQ2. */
 	current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
-		current, 0, 0, 2, 0x0);	
+		current, 0, 0, 2, 0x0);
 
 	/* Create all subtables for processors. */
 	current = acpi_create_madt_lapic_nmis(current,

Modified: trunk/src/mainboard/msi/ms9652_fam10/dsdt.asl
==============================================================================
--- trunk/src/mainboard/msi/ms9652_fam10/dsdt.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms9652_fam10/dsdt.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -51,7 +51,7 @@
 			External (HCLK)
 			External (SBDN)
 			External (HCDN)
-                    
+
 			Method (_CRS, 0, NotSerialized)
                         {
 				Name (BUF0, ResourceTemplate ()
@@ -272,7 +272,7 @@
 				Method (_CRS, 0, NotSerialized)
 				{
 					Name (BUF1, ResourceTemplate () {
-						IO (Decode16, 0x0378, 0x0378, 0x01, 0x08) 
+						IO (Decode16, 0x0378, 0x0378, 0x01, 0x08)
 						IRQNoFlags () {7}
 					})
 					Return (BUF1)
@@ -289,7 +289,7 @@
 				Method (_CRS, 0, NotSerialized)
 				{
 					Name (BUF1, ResourceTemplate () {
-						IO (Decode16, 0x0378, 0x0378, 0x01, 0x04) 
+						IO (Decode16, 0x0378, 0x0378, 0x01, 0x04)
 						IO (Decode16, 0x0778, 0x0778, 0x01, 0x04)
 						IRQNoFlags() {7}
 						DMA (Compatibility, NotBusMaster, Transfer8) {0,1,3}

Modified: trunk/src/mainboard/msi/ms9652_fam10/irq_tables.c
==============================================================================
--- trunk/src/mainboard/msi/ms9652_fam10/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms9652_fam10/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
@@ -34,11 +34,11 @@
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "mb_sysconf.h"
 
-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
 		uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
 		uint8_t slot, uint8_t rfu)
 {
-	pirq_info->bus = bus; 
+	pirq_info->bus = bus;
 	pirq_info->devfn = devfn;
 		pirq_info->irq[0].link = link0;
 		pirq_info->irq[0].bitmap = bitmap0;
@@ -80,15 +80,15 @@
 
 	pirq = (void *)(addr);
 	v = (uint8_t *)(addr);
-	
+
 	pirq->signature = PIRQ_SIGNATURE;
 	pirq->version  = PIRQ_VERSION;
-	
+
 	pirq->rtr_bus = m->bus_mcp55[0];
 	pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
 	pirq->exclusive_irqs = 0;
-	
+
 	pirq->rtr_vendor = 0x10de;
 	pirq->rtr_device = 0x0370;
 
@@ -101,7 +101,7 @@
 //pci bridge
 	write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
 	pirq_info++; slot_num++;
-	
+
 	for(i=1; i< sysconf.hc_possible_num; i++) {
 		if(!(sysconf.pci1234[i] & 0x1) ) continue;
 		unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
@@ -120,10 +120,10 @@
 	}
 #endif
 
-	pirq->size = 32 + 16 * slot_num; 
+	pirq->size = 32 + 16 * slot_num;
 
 	for (i = 0; i < pirq->size; i++)
-		sum += v[i];	
+		sum += v[i];
 
 	sum = pirq->checksum - sum;
 

Modified: trunk/src/mainboard/msi/ms9652_fam10/mb_sysconf.h
==============================================================================
--- trunk/src/mainboard/msi/ms9652_fam10/mb_sysconf.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/msi/ms9652_fam10/mb_sysconf.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -26,7 +26,7 @@
 	unsigned char bus_isa;
 	unsigned char bus_mcp55[8]; //1
 	unsigned apicid_mcp55;
-	unsigned bus_type[256]; 
+	unsigned bus_type[256];
 
 };
 

Modified: trunk/src/mainboard/newisys/Kconfig
==============================================================================
--- trunk/src/mainboard/newisys/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/newisys/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_NEWISYS
-        
+
 source "src/mainboard/newisys/khepri/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/newisys/khepri/devicetree.cb
==============================================================================
--- trunk/src/mainboard/newisys/khepri/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/newisys/khepri/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -10,7 +10,7 @@
 
 	device pci_domain 0 on
 		chip northbridge/amd/amdk8
-			device pci 18.0 on end # LDT 0 
+			device pci 18.0 on end # LDT 0
 			device pci 18.0 on     # LDT 1
 				chip southbridge/amd/amd8131
 					device pci 0.0 on end
@@ -57,7 +57,7 @@
 								io 0x60 = 0x220
 								io 0x62 = 0x300
 								irq 0x70 = 9
-							end						
+							end
                 	        			device pnp 2e.8 off end #  GPIO2
                 	        			device pnp 2e.9 off end #  GPIO3
                 	        			device pnp 2e.a off end #  ACPI
@@ -69,7 +69,7 @@
 					end
 					device pci 1.1 on end
 					device pci 1.2 on end
-					device pci 1.3 on end 
+					device pci 1.3 on end
 					device pci 1.5 on end
 					device pci 1.6 on end
 				end
@@ -87,6 +87,6 @@
 			device pci 19.2 on end
 			device pci 19.3 on end
 		end
-	end 
+	end
 end
 

Modified: trunk/src/mainboard/newisys/khepri/resourcemap.c
==============================================================================
--- trunk/src/mainboard/newisys/khepri/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/newisys/khepri/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -151,7 +151,7 @@
 	 *	   1 = base/limit registers i are read-only
 	 * [ 7: 4] Reserved
 	 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-	 *	   This field defines the upper address bits of a 40bit address 
+	 *	   This field defines the upper address bits of a 40bit address
 	 *	   that defines the start of memory-mapped I/O region i
 	 */
 	PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -207,7 +207,7 @@
 	 * [ 3: 2] Reserved
 	 * [ 4: 4] VGA Enable
 	 *	   0 = VGA matches Disabled
-	 *	   1 = matches all address < 64K and where A[9:0] is in the 
+	 *	   1 = matches all address < 64K and where A[9:0] is in the
 	 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 	 * [ 5: 5] ISA Enable
 	 *	   0 = ISA matches Disabled
@@ -215,7 +215,7 @@
 	 *	       from matching agains this base/limit pair
 	 * [11: 6] Reserved
 	 * [24:12] PCI I/O Base i
-	 *	   This field defines the start of PCI I/O region n 
+	 *	   This field defines the start of PCI I/O region n
 	 * [31:25] Reserved
 	 */
 	PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,

Modified: trunk/src/mainboard/newisys/khepri/romstage.c
==============================================================================
--- trunk/src/mainboard/newisys/khepri/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/newisys/khepri/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,10 +1,10 @@
 /*
  * This code is derived from the Tyan s2882 romstage.c
  * Adapted by Stefan Reinauer <stepan at coresystems.de>
- * Additional (C) 2007 coresystems GmbH 
+ * Additional (C) 2007 coresystems GmbH
  */
 
- 
+
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -81,7 +81,7 @@
 #include "lib/generic_sdram.c"
 
  /* newisys khepri does not want the default */
-#include "resourcemap.c" 
+#include "resourcemap.c"
 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
@@ -129,13 +129,13 @@
         }
 
 //	post_code(0x32);
-	
+
  	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
 
 //	dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
-	
+
 	/* Halt if there was a built in self test failure */
 	report_bist_failure(bist);
 

Modified: trunk/src/mainboard/nvidia/Kconfig
==============================================================================
--- trunk/src/mainboard/nvidia/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/nvidia/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_NVIDIA
-        
+
 source "src/mainboard/nvidia/l1_2pvv/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/nvidia/l1_2pvv/Kconfig
==============================================================================
--- trunk/src/mainboard/nvidia/l1_2pvv/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/nvidia/l1_2pvv/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -15,7 +15,7 @@
 	select LIFT_BSP_APIC_ID
 	select K8_REV_F_SUPPORT
 	select BOARD_ROMSIZE_KB_512
- 
+
 config MAINBOARD_DIR
 	string
 	default nvidia/l1_2pvv
@@ -25,7 +25,7 @@
 	hex
 	default 0xc8000
 	depends on BOARD_NVIDIA_L1_2PVV
-	
+
 config DCACHE_RAM_SIZE
 	hex
 	default 0x08000
@@ -37,7 +37,7 @@
 	depends on BOARD_NVIDIA_L1_2PVV
 
 config APIC_ID_OFFSET
-	hex	
+	hex
 	default 0x10
 	depends on BOARD_NVIDIA_L1_2PVV
 
@@ -77,7 +77,7 @@
 	depends on BOARD_NVIDIA_L1_2PVV
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
-	bool	
+	bool
 	default n
 	depends on BOARD_NVIDIA_L1_2PVV
 
@@ -87,12 +87,12 @@
 	depends on BOARD_NVIDIA_L1_2PVV
 
 config HT_CHAIN_END_UNITID_BASE
-	hex	
+	hex
 	default 0x20
 	depends on BOARD_NVIDIA_L1_2PVV
 
 config SERIAL_CPU_INIT
-	bool	
+	bool
 	default n
 	depends on BOARD_NVIDIA_L1_2PVV
 

Modified: trunk/src/mainboard/olpc/Kconfig
==============================================================================
--- trunk/src/mainboard/olpc/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/olpc/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_OLPC
-        
+
 source "src/mainboard/olpc/rev_a/Kconfig"
 source "src/mainboard/olpc/btest/Kconfig"
 

Modified: trunk/src/mainboard/olpc/btest/devicetree.cb
==============================================================================
--- trunk/src/mainboard/olpc/btest/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/olpc/btest/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -6,7 +6,7 @@
 			device apic 0 on end
 		end
 	end
-  	device pci_domain 0 on 
+  	device pci_domain 0 on
     		device pci 1.0 on end
 		device pci 1.1 on end
       		chip southbridge/amd/cs5536
@@ -18,7 +18,7 @@
 		# SIRQ Mode = continous , It would be better if the EC could operate in
 		# Active(Quiet) mode. Save power....
 		# SIRQ Enable = Enabled
-		# Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK 
+		# Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK
 			#register "lpc_irq" = "0x00001002"
 			#register "lpc_serirq_enable" = "0xEFFD0080"
 			#register "enable_gpio0_inta" = "1"

Modified: trunk/src/mainboard/olpc/btest/irq_tables.c
==============================================================================
--- trunk/src/mainboard/olpc/btest/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/olpc/btest/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

Modified: trunk/src/mainboard/olpc/btest/mainboard.c
==============================================================================
--- trunk/src/mainboard/olpc/btest/mainboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/olpc/btest/mainboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -73,26 +73,26 @@
 init_cafe_irq(void){
 	const unsigned char slots_cafe[4] = {11, 0, 0, 0};
 
- 
-	/* CAFE PCI slots */ 
-	pci_assign_irqs(0, 0x0C, slots_cafe); 
-
-	/* Make the pin assignments - NOTENOTENOTE:  This should be 
-	  * configurable! 
-	  */ 
-
-	/* Configure the GPIO pins to use - class 0, index 9 to configure 
-	  * AB.  Write 0xFF to disable 
-	  */ 
-	
-	vrWrite(0x9, 0XFF00); 
-	
-	/* Configure the GPIO pins to use - class 0, index A to configure 
-	  * CD.  Write 0xFF to disable 
-	  */ 
-	
-       vrWrite(0xA, 0xFFFF); 
-	 
+
+	/* CAFE PCI slots */
+	pci_assign_irqs(0, 0x0C, slots_cafe);
+
+	/* Make the pin assignments - NOTENOTENOTE:  This should be
+	  * configurable!
+	  */
+
+	/* Configure the GPIO pins to use - class 0, index 9 to configure
+	  * AB.  Write 0xFF to disable
+	  */
+
+	vrWrite(0x9, 0XFF00);
+
+	/* Configure the GPIO pins to use - class 0, index A to configure
+	  * CD.  Write 0xFF to disable
+	  */
+
+       vrWrite(0xA, 0xFFFF);
+
 }
 
 
@@ -111,7 +111,7 @@
 	  * conditional we can make it a config variable later.
 	  */
 
-	printk(BIOS_DEBUG, "%s (%x,%x)SET USB PCI interrupt line to %d\n", 
+	printk(BIOS_DEBUG, "%s (%x,%x)SET USB PCI interrupt line to %d\n",
 		__func__, bus, devfn, usbirq);
 	usb = dev_find_slot(bus, devfn);
 	if (! usb){

Modified: trunk/src/mainboard/olpc/btest/romstage.c
==============================================================================
--- trunk/src/mainboard/olpc/btest/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/olpc/btest/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -50,7 +50,7 @@
 	Trrd=2 (act2act)
 	Tref=17.8ms
   */
-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)
 {
 	/* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
 	 *                      component Banks (byte 17) * module banks, side (byte 5) *
@@ -100,11 +100,11 @@
 	/* timing and mode ... */
 
 	msr = rdmsr(0x20000019);
-	
-	/* per standard bios settings */	
+
+	/* per standard bios settings */
 
 	msr.hi = 0x18000108;
-	msr.lo = 
+	msr.lo =
 			(6<<28) |		// cas_lat
 			(10<<24)|		// ref2act
 			(7<<20)|		// act2pre
@@ -114,8 +114,8 @@
 			(2<<6)|			// dplwr
 			(2<<4)|			// dplrd
 			(3);			// dal
-	/* the msr value reported by quanta is very, very different. 
-	 * we will go with that value for now. 
+	/* the msr value reported by quanta is very, very different.
+	 * we will go with that value for now.
 	 */
 	msr.lo = 0x286332a3;
 
@@ -180,9 +180,9 @@
 
 	cpuRegInit();
 	print_err("done cpuRegInit\n");
-	
+
 	sdram_initialize(1, memctrl);
-	
+
 	/* Check all of memory */
 	//ram_check(0x00000000, 640*1024);
 }

Modified: trunk/src/mainboard/olpc/rev_a/devicetree.cb
==============================================================================
--- trunk/src/mainboard/olpc/rev_a/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/olpc/rev_a/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -6,7 +6,7 @@
 			device apic 0 on end
 		end
 	end
-  	device pci_domain 0 on 
+  	device pci_domain 0 on
     		device pci 1.0 on end
 		device pci 1.1 on end
       		chip southbridge/amd/cs5536
@@ -18,7 +18,7 @@
 		# SIRQ Mode = continous , It would be better if the EC could operate in
 		# Active(Quiet) mode. Save power....
 		# SIRQ Enable = Enabled
-		# Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK 
+		# Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK
 			#register "lpc_irq" = "0x00001002"
 			#register "lpc_serirq_enable" = "0xEFFD0080"
 			#register "enable_gpio0_inta" = "1"

Modified: trunk/src/mainboard/olpc/rev_a/irq_tables.c
==============================================================================
--- trunk/src/mainboard/olpc/rev_a/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/olpc/rev_a/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

Modified: trunk/src/mainboard/olpc/rev_a/mainboard.c
==============================================================================
--- trunk/src/mainboard/olpc/rev_a/mainboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/olpc/rev_a/mainboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -83,7 +83,7 @@
 	  * conditional we can make it a config variable later.
 	  */
 
-	printk(BIOS_DEBUG, "%s (%x,%x)SET USB PCI interrupt line to %d\n", 
+	printk(BIOS_DEBUG, "%s (%x,%x)SET USB PCI interrupt line to %d\n",
 		__func__, bus, devfn, usbirq);
 	usb = dev_find_slot(bus, devfn);
 	if (! usb){

Modified: trunk/src/mainboard/olpc/rev_a/romstage.c
==============================================================================
--- trunk/src/mainboard/olpc/rev_a/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/olpc/rev_a/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -50,7 +50,7 @@
 	Trrd=2 (act2act)
 	Tref=17.8ms
   */
-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)
 {
 	/* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
 	 *                      component Banks (byte 17) * module banks, side (byte 5) *
@@ -100,11 +100,11 @@
 	/* timing and mode ... */
 
 	msr = rdmsr(0x20000019);
-	
-	/* per standard bios settings */	
+
+	/* per standard bios settings */
 
 	msr.hi = 0x18000108;
-	msr.lo = 
+	msr.lo =
 			(6<<28) |		// cas_lat
 			(10<<24)|		// ref2act
 			(7<<20)|		// act2pre
@@ -114,8 +114,8 @@
 			(2<<6)|			// dplwr
 			(2<<4)|			// dplrd
 			(3);			// dal
-	/* the msr value reported by quanta is very, very different. 
-	 * we will go with that value for now. 
+	/* the msr value reported by quanta is very, very different.
+	 * we will go with that value for now.
 	 */
 	msr.lo = 0x286332a3;
 
@@ -180,9 +180,9 @@
 
 	cpuRegInit();
 	print_err("done cpuRegInit\n");
-	
+
 	sdram_initialize(1, memctrl);
-	
+
 	/* Check all of memory */
 	//ram_check(0x00000000, 640*1024);
 }

Modified: trunk/src/mainboard/pcengines/Kconfig
==============================================================================
--- trunk/src/mainboard/pcengines/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/pcengines/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_PC_ENGINES
-        
+
 source "src/mainboard/pcengines/alix1c/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/pcengines/alix1c/Kconfig
==============================================================================
--- trunk/src/mainboard/pcengines/alix1c/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/pcengines/alix1c/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -14,7 +14,7 @@
 
 config MAINBOARD_DIR
 	string
-	default pcengines/alix1c 
+	default pcengines/alix1c
 	depends on BOARD_PCENGINES_ALIX1C
 
 config MAINBOARD_PART_NUMBER

Modified: trunk/src/mainboard/pcengines/alix1c/devicetree.cb
==============================================================================
--- trunk/src/mainboard/pcengines/alix1c/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/pcengines/alix1c/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 chip northbridge/amd/lx
-  	device pci_domain 0 on 
+  	device pci_domain 0 on
     		device pci 1.0 on end
 		device pci 1.1 on end
       		chip southbridge/amd/cs5536
@@ -57,7 +57,7 @@
 						io 0x60 = 0x220
 						io 0x62 = 0x300
 						irq 0x70 = 9
-					end						
+					end
 					device pnp 2e.8 on end #  GPIO2
 					device pnp 2e.9 on end #  GPIO3
 					device pnp 2e.a on end #  ACPI

Modified: trunk/src/mainboard/rca/Kconfig
==============================================================================
--- trunk/src/mainboard/rca/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/rca/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_RCA
-        
+
 source "src/mainboard/rca/rm4100/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/rca/rm4100/chip.h
==============================================================================
--- trunk/src/mainboard/rca/rm4100/chip.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/rca/rm4100/chip.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2008 Joseph Smith <joe at settoplinux.org> 
+ * Copyright (C) 2008 Joseph Smith <joe at settoplinux.org>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by

Modified: trunk/src/mainboard/rca/rm4100/gpio.c
==============================================================================
--- trunk/src/mainboard/rca/rm4100/gpio.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/rca/rm4100/gpio.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -58,13 +58,13 @@
 	outl(0x01, PME_IO_BASE_ADDR + 0x2c);
 
 	/* GP30 - FAN2_TACH */
-	outl(0x05, PME_IO_BASE_ADDR + 0x33); 
+	outl(0x05, PME_IO_BASE_ADDR + 0x33);
 
 	/* GP31 - FAN1_TACH */
 	outl(0x05, PME_IO_BASE_ADDR + 0x34);
 
 	/* GP32 - FAN2_CTRL */
-	outl(0x04, PME_IO_BASE_ADDR + 0x35); 
+	outl(0x04, PME_IO_BASE_ADDR + 0x35);
 
 	/* GP33 - FAN1_CTRL */
 	outl(0x04, PME_IO_BASE_ADDR + 0x36);
@@ -79,7 +79,7 @@
 	outl(0x00, PME_IO_BASE_ADDR + 0x3a);
 
 	/* GP42 - GPIO_PME_OUT */
-	outl(0x00, PME_IO_BASE_ADDR + 0x3d); 
+	outl(0x00, PME_IO_BASE_ADDR + 0x3d);
 
 	/* GP50 - SER2_RI */
 	outl(0x05, PME_IO_BASE_ADDR + 0x3f);

Modified: trunk/src/mainboard/rca/rm4100/mainboard.c
==============================================================================
--- trunk/src/mainboard/rca/rm4100/mainboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/rca/rm4100/mainboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -38,7 +38,7 @@
 	// TODO Switch parport LEDs
 	dev->ops->init = mainboard_init;
 }
- 
+
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 	CHIP_NAME("RCA RM4100 Mainboard")

Modified: trunk/src/mainboard/rca/rm4100/romstage.c
==============================================================================
--- trunk/src/mainboard/rca/rm4100/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/rca/rm4100/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -88,11 +88,11 @@
 	/* CPU Frequency Strap */
 	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd5, 0x02);
 	/* ACPI base address and enable Resource Indicator */
-	pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR | 1)); 
+	pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR | 1));
 	/* Enable the SMBUS */
 	enable_smbus();
 	/* ACPI base address and disable Resource Indicator */
-	pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR)); 
+	pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR));
 	/*  ACPI Enable */
 	pci_write_config8(PCI_DEV(0, 0x1f, 0), ACPI_CNTL, 0x10);
 }

Modified: trunk/src/mainboard/roda/rk886ex/acpi/battery.asl
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/acpi/battery.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/acpi/battery.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -113,7 +113,7 @@
 				}
 			}
 		}
-		
+
 		Store (CBA1, Local0)
 		Store (Local0, Index(PBST, 2))
 		Store (DerefOf(Index(PBIF, 4)), Index(PBST, 3))
@@ -130,7 +130,7 @@
 				Store (1, Local1)
 			}
 		}
-		
+
 		Store (Local1, Index(PBST, 0))
 		If (\_SB.PCI0.LPCB.EC0.P63S) {
 			Store (0x16, Index(PBST, 1))
@@ -253,7 +253,7 @@
 				}
 			}
 		}
-		
+
 		Store (CBA2, Local0)
 		Store (Local0, Index(PBST, 2))
 		Store (DerefOf(Index(PBIF, 4)), Index(PBST, 3))
@@ -270,7 +270,7 @@
 				Store (1, Local1)
 			}
 		}
-		
+
 		Store (Local1, Index(PBST, 0))
 		If (\_SB.PCI0.LPCB.EC0.P62S) {
 			Store (0x16, Index(PBST, 1))

Modified: trunk/src/mainboard/roda/rk886ex/acpi/ec.asl
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/acpi/ec.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/acpi/ec.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -81,14 +81,14 @@
 	{
 		// This method is needed by Windows XP/2000 for
 		// EC initialization before a driver is loaded
-	
+
 		If (LEqual(Arg0, 0x03)) {
 			Store (Arg1, ECON)
 		}
 	}
 
 	// EC Query methods
-	
+
 	Method (_Q11, 0)
 	{
 		Store("_Q11: Fn-F8 (Sleep Button) pressed", Debug)

Modified: trunk/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
  * MA 02110-1301 USA
  */
 
-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the
  * i945
  */
 

Modified: trunk/src/mainboard/roda/rk886ex/acpi/ich7_pci_irqs.asl
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/acpi/ich7_pci_irqs.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/acpi/ich7_pci_irqs.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
  * MA 02110-1301 USA
  */
 
-/* This is board specific information: IRQ routing for the 
+/* This is board specific information: IRQ routing for the
  * 0:1e.0 PCI bridge of the ICH7
  */
 

Modified: trunk/src/mainboard/roda/rk886ex/acpi/mainboard.asl
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/acpi/mainboard.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/acpi/mainboard.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -36,7 +36,7 @@
 Device (PWRB)
 {
 	Name(_HID, EisaId("PNP0C0C"))
-	
+
 	// Wake
 	Name(_PRW, Package(){0x1d, 0x04})
 }

Modified: trunk/src/mainboard/roda/rk886ex/acpi/platform.asl
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/acpi/platform.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/acpi/platform.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -48,9 +48,9 @@
 	Return (SMIF)		// Return value of SMI handler
 }
 
-/* The _PIC method is called by the OS to choose between interrupt 
+/* The _PIC method is called by the OS to choose between interrupt
  * routing via the i8259 interrupt controller or the APIC.
- * 
+ *
  * _PIC is called with a parameter of 0 for i8259 configuration and
  * with a parameter of 1 for Local Apic/IOAPIC configuration.
  */
@@ -80,12 +80,12 @@
 	// Notify PCI Express slots in case a card
 	// was inserted while a sleep state was active.
 
-	// Are we going to S3? 
+	// Are we going to S3?
 	If (LEqual(Arg0, 3)) {
 		// ..
 	}
 
-	// Are we going to S4? 
+	// Are we going to S4?
 	If (LEqual(Arg0, 4)) {
 		// ..
 	}

Modified: trunk/src/mainboard/roda/rk886ex/acpi/superio.asl
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/acpi/superio.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/acpi/superio.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -138,7 +138,7 @@
 			CreateByteField(RSRC, 0x05, IORH) // Why?
 			CreateByteField(RSRC,
 				\_SB.PCI0.LPCB.SIO1.COMA._CRS._IRA._INT, IRQL)
-			
+
 			Store (READ(0, 0x24, 0xff), Local0)
 			And (Local0, 0xc0, Local1)
 			ShiftRight(Local1, 0x06, Local1)
@@ -297,7 +297,7 @@
 			CreateByteField(RSRC, 0x05, IORH)
 			CreateByteField(RSRC,
 				\_SB.PCI0.LPCB.SIO1.COMB._CRS._IRB._INT, IRQL)
-			
+
 			Store (READ(0, 0x25, 0xff), Local0)
 			And (Local0, 0xc0, Local1)
 			ShiftRight(Local1, 0x06, Local1)

Modified: trunk/src/mainboard/roda/rk886ex/acpi/thermal.asl
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/acpi/thermal.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/acpi/thermal.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -27,7 +27,7 @@
 	{
 
 		// FIXME these could/should be read from the
-		// GNVS area, so they can be controlled by 
+		// GNVS area, so they can be controlled by
 		// coreboot
 		Name(TC1V, 0x04)
 		Name(TC2V, 0x03)

Modified: trunk/src/mainboard/roda/rk886ex/acpi_tables.c
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/acpi_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/acpi_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
@@ -161,7 +161,7 @@
 				MP_IRQ_POLARITY_HIGH |
 				MP_IRQ_TRIGGER_EDGE, 0x01);
 	current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)
-				current, 1, MP_IRQ_POLARITY_HIGH | 
+				current, 1, MP_IRQ_POLARITY_HIGH |
 				MP_IRQ_TRIGGER_EDGE, 0x01);
 
 	/* INT_SRC_OVR */
@@ -277,7 +277,7 @@
 	current += dsdt->length;
 	memcpy(dsdt, &AmlCode, dsdt->length);
 
-	/* Fix up global NVS region for SMI handler. The GNVS region lives 
+	/* Fix up global NVS region for SMI handler. The GNVS region lives
 	 * in the (high) table area. The low memory map looks like this:
 	 *
 	 * 0x00000000 - 0x000003ff	Real Mode IVT

Modified: trunk/src/mainboard/roda/rk886ex/chip.h
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/chip.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/chip.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or modify

Modified: trunk/src/mainboard/roda/rk886ex/cmos.layout
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/cmos.layout	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/cmos.layout	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 #
 # This file is part of the coreboot project.
-# 
+#
 # Copyright (C) 2007-2008 coresystems GmbH
 #
 # This program is free software; you can redistribute it and/or

Modified: trunk/src/mainboard/roda/rk886ex/devicetree.cb
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 ##
 ## This file is part of the coreboot project.
-## 
+##
 ## Copyright (C) 2007-2009 coresystems GmbH
 ##
 ## This program is free software; you can redistribute it and/or
@@ -27,7 +27,7 @@
                 end
         end
 
-        device pci_domain 0 on 
+        device pci_domain 0 on
                 device pci 00.0 on end # host bridge
 		# auto detection:
 		#device pci 01.0 off end # i945 PCIe root port
@@ -79,7 +79,7 @@
 					device pci 3.3 off end  # smartcard
 				end
 			end # PCI bridge
-			#device pci 1e.2 off end # AC'97 Audio 
+			#device pci 1e.2 off end # AC'97 Audio
 			#device pci 1e.3 off end # AC'97 Modem
                         device pci 1f.0 on # LPC bridge
                                 chip superio/smsc/lpc47n227

Modified: trunk/src/mainboard/roda/rk886ex/dsdt.asl
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/dsdt.asl	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/dsdt.asl	Tue Apr 27 08:56:47 2010	(r5507)
@@ -36,7 +36,7 @@
 
 	// General Purpose Events
 	#include "acpi/gpe.asl"
-	
+
 	// mainboard specific devices
 	#include "acpi/mainboard.asl"
 

Modified: trunk/src/mainboard/roda/rk886ex/ec.c
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/ec.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/ec.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -35,7 +35,7 @@
 			printk(BIOS_SPEW, ".");
 	}
 	if (!timeout) {
-		printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n", 
+		printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n",
 				command);
 		// return -1;
 	}

Modified: trunk/src/mainboard/roda/rk886ex/m3885.c
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/m3885.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/m3885.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -54,7 +54,7 @@
 	0x1e, 0xff, 0x87,  // FuncKey Task = c5 Command Data (funcTsk)
 	0x1f, 0xff, 0x9f,  // Delayed Task = c5 Command Data (dlyTsk1)
 	0x20, 0xff, 0x9f,  // Wake-Up Task = c5 Command Data (wakeTsk)
-	// 
+	//
 	0x21, 0xff, 0x08,  // WigglePin Pulse Width * 2.4ms (tmPulse)
 	0x24, 0xff, 0x30,  // Keyboard State Flags (kState7)
 	//
@@ -121,7 +121,7 @@
 			printk(BIOS_SPEW, ".");
 	}
 	if (!timeout) {
-		printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n", 
+		printk(BIOS_DEBUG, "Timeout while sending command 0x%02x to EC!\n",
 				command);
 		// return -1;
 	}
@@ -249,7 +249,7 @@
 		m3885_set_proc_ram(i + 0x80, matrix[i]);
 	}
 
-	
+
 	/* ram bank 2 */
 	m3885_set_variable(0x0c, (kstate5_flags & (~(7 << 4))) | (2 << 4));
 
@@ -303,7 +303,7 @@
 
 	/* Critical Task */
 	m3885_set_proc_ram(0xf3, 0x5d);
-	
+
 	/* Thermal Polling Period */
 	m3885_set_proc_ram(0xf9, 0x0a);
 
@@ -316,21 +316,21 @@
 	else
 		reg8 = 0x9a;
 	m3885_set_proc_ram(0xd0, reg8); // P60SPEC
-	
+
 	/* SENSE1# */
 	if (m3885_read_port() & (1 << 2))
 		reg8 = 0x8a;
 	else
 		reg8 = 0x9a;
 	m3885_set_proc_ram(0xd2, reg8); // P62SPEC
-	
+
 	/* SENSE2# */
 	if (m3885_read_port() & (1 << 3))
 		reg8 = 0x8a;
 	else
 		reg8 = 0x9a;
 	m3885_set_proc_ram(0xd3, reg8); // P63SPEC
-	
+
 	/* Low Active Port */
 	m3885_set_proc_ram(0xd1, 0x88); // P61SPEC
 	m3885_set_proc_ram(0xd6, 0x88); // P66SPEC

Modified: trunk/src/mainboard/roda/rk886ex/mainboard.c
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/mainboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/mainboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -114,7 +114,7 @@
 }
 #endif
 
-static void mainboard_enable(device_t dev) 
+static void mainboard_enable(device_t dev)
 {
 	/* Configure the MultiKey controller */
 	// m3885_configure_multikey();

Modified: trunk/src/mainboard/roda/rk886ex/mainboard_smi.c
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/mainboard_smi.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/mainboard_smi.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -25,7 +25,7 @@
 #include <cpu/x86/smm.h>
 #include "../../../southbridge/intel/i82801gx/i82801gx_nvs.h"
 
-/* The southbridge SMI handler checks whether gnvs has a 
+/* The southbridge SMI handler checks whether gnvs has a
  * valid pointer before calling the trap handler
  */
 extern global_nvs_t *gnvs;

Modified: trunk/src/mainboard/roda/rk886ex/mptable.c
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -71,7 +71,7 @@
 
 	/* Legacy Interrupts */
 
-	/* I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */	
+	/* I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN# */
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, 0x2, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x1, 0x2, 0x1);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, 0x2, 0x2);

Modified: trunk/src/mainboard/roda/rk886ex/romstage.c
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
@@ -184,7 +184,7 @@
 	RCBA32(0x3400) = (1 << 2);
 
 	/* Disable unused devices */
-	RCBA32(0x3418) = FD_PCIE6 | FD_PCIE5 | FD_PCIE3 | FD_PCIE2 | 
+	RCBA32(0x3418) = FD_PCIE6 | FD_PCIE5 | FD_PCIE3 | FD_PCIE2 |
 			 FD_INTLAN | FD_ACMOD | FD_HDAUD | FD_PATA;
 	RCBA32(0x3418) |= (1 << 0); // Required.
 
@@ -266,7 +266,7 @@
 #include <cbmem.h>
 
 // Now, this needs to be included because it relies on the symbol
-// __PRE_RAM__ being set during CAR stage (in order to compile the 
+// __PRE_RAM__ being set during CAR stage (in order to compile the
 // BSS free versions of the functions). Either rewrite the code
 // to be always BSS free, or invent a flag that's better suited than
 // __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
@@ -330,7 +330,7 @@
 
 	/* Enable SPD ROMs and DDR-II DRAM */
 	enable_smbus();
-	
+
 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
 	dump_spd_registers();
 #endif
@@ -340,8 +340,8 @@
 	/* Perform some initialization that must run before stage2 */
 	early_ich7_init();
 
-	/* This should probably go away. Until now it is required 
-	 * and mainboard specific 
+	/* This should probably go away. Until now it is required
+	 * and mainboard specific
 	 */
 	rcba_config();
 
@@ -385,7 +385,7 @@
 		 * memory completely, but that's a wonderful clean up task for another
 		 * day.
 		 */
-		if (resume_backup_memory) 
+		if (resume_backup_memory)
 			memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
 
 		/* Magic for S3 resume */

Modified: trunk/src/mainboard/roda/rk886ex/rtl8168.c
==============================================================================
--- trunk/src/mainboard/roda/rk886ex/rtl8168.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/roda/rk886ex/rtl8168.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -28,7 +28,7 @@
 static void nic_init(struct device *dev)
 {
 	printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n");
-	// Nothing to do yet, but this has to be here to keep 
+	// Nothing to do yet, but this has to be here to keep
 	// coreboot from trying to execute an option ROM.
 }
 

Modified: trunk/src/mainboard/soyo/Kconfig
==============================================================================
--- trunk/src/mainboard/soyo/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/soyo/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,7 +21,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_SOYO
-	
+
 source "src/mainboard/soyo/sy-6ba-plus-iii/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/sunw/Kconfig
==============================================================================
--- trunk/src/mainboard/sunw/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/sunw/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_SUNW
-	
+
 source "src/mainboard/sunw/ultra40/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/sunw/ultra40/devicetree.cb
==============================================================================
--- trunk/src/mainboard/sunw/ultra40/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/sunw/ultra40/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -7,9 +7,9 @@
 	device pci_domain 0 on
 		chip northbridge/amd/amdk8 #mc0
 			device pci 18.0 on end # link 0
-			device pci 18.0 on # link1 
-				#  devices on link 0, link 0 == LDT 0 
-			        chip southbridge/nvidia/ck804 
+			device pci 18.0 on # link1
+				#  devices on link 0, link 0 == LDT 0
+			        chip southbridge/nvidia/ck804
 					device pci 0.0 on end   # HT
                 			device pci 1.0 on # LPC
                 	                        chip superio/smsc/lpc47m10x
@@ -40,29 +40,29 @@
 					end
 			                device pci 1.1 on # SM 0
                                                 chip drivers/generic/generic #dimm 0-0-0
-                                                        device i2c 50 on end  
-                                                end              
+                                                        device i2c 50 on end
+                                                end
                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end
-                                                end             
+                                                end
                                                 chip drivers/generic/generic #dimm 0-1-1
                                                         device i2c 53 on end
-                                                end              
+                                                end
                                                 chip drivers/generic/generic #dimm 1-0-0
                                                         device i2c 54 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 1-0-1
                                                         device i2c 55 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 1-1-0
                                                         device i2c 56 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 1-1-1
                                                         device i2c 57 on end
-                                                end 
+                                                end
 					end # SM
                                         device pci 1.1 on # SM 1
 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
@@ -71,24 +71,24 @@
 #                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot1
 #                                                        device i2c 51 on end
-#                                                end     
+#                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot2
 #                                                        device i2c 52 on end
-#                                                end             
+#                                                end
 #                                                chip drivers/generic/generic #PCI Slot1
 #                                                        device i2c 53 on end
-#                                                end              
+#                                                end
 #                                                chip drivers/generic/generic #Master CK804 PCI-E
 #                                                        device i2c 54 on end
-#                                                end     
+#                                                end
 #                                                chip drivers/generic/generic #Slave CK804 PCI-E
 #                                                        device i2c 55 on end
-#                                                end             
+#                                                end
                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end
-                                                end 
+                                                end
 
-                                        end # SM 
+                                        end # SM
 	                		device pci 2.0 on end # USB 1.1
         	        		device pci 2.1 on end # USB 2
 	                		device pci 4.0 on end # ACI
@@ -109,18 +109,18 @@
 					register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
 					register "mac_eeprom_addr" = "0x51"
 				end
-			end #  device pci 18.0 
+			end #  device pci 18.0
 			device pci 18.0 on end # link 2
 			device pci 18.1 on end
 			device pci 18.2 on end
 			device pci 18.3 on end
 		end # mc0
-		
+
 		chip northbridge/amd/amdk8
                 	device pci 19.0 on end # link 0
-		device pci 19.0 on   
+		device pci 19.0 on
                         	#  devices on link 1, link 1 == LDT 1
-                        	chip southbridge/nvidia/ck804 
+                        	chip southbridge/nvidia/ck804
                                 	device pci 0.0 on end   # HT
                                 	device pci 1.0 on end   # LPC
                                 	device pci 1.1 off end # SM
@@ -140,13 +140,13 @@
                                         register "mac_eeprom_smbus" = "3"
                                         register "mac_eeprom_addr" = "0x51"
                         	end
-                	end #  device pci 19.0 
-			
+                	end #  device pci 19.0
+
 			device pci 19.0 on end
 			device pci 19.1 on end
 			device pci 19.2 on end
 			device pci 19.3 on end
 		end
 	end # PCI domain
-	
+
 end #root_complex

Modified: trunk/src/mainboard/sunw/ultra40/get_bus_conf.c
==============================================================================
--- trunk/src/mainboard/sunw/ultra40/get_bus_conf.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/sunw/ultra40/get_bus_conf.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -34,7 +34,7 @@
         unsigned apicid_ck804b;
 
 unsigned sblk;
-unsigned pci1234[] = 
+unsigned pci1234[] =
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
 	 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
@@ -48,7 +48,7 @@
 };
 unsigned hc_possible_num;
 unsigned sbdn;
-unsigned hcdn[] = 
+unsigned hcdn[] =
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
 	0x20202020,
 	0x20202020,
@@ -77,10 +77,10 @@
 
 	get_bus_conf_done = 1;
 
-	hc_possible_num = ARRAY_SIZE(pci1234);	
-	
+	hc_possible_num = ARRAY_SIZE(pci1234);
+
 	get_sblk_pci1234();
-	
+
 	sbdn = (hcdn[0] & 0xff); // first byte of first chain
 
 	sbdn3 = (hcdn[1] & 0xff);
@@ -262,8 +262,8 @@
 /*I/O APICs:	APIC ID	Version	State		Address*/
 #if CONFIG_LOGICAL_CPUS==1
 	apicid_base = get_apicid_base(4);
-#else 
-	apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+	apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
 	apicid_ck804 = apicid_base+0;
         apicid_8131_1 = apicid_base+1;

Modified: trunk/src/mainboard/sunw/ultra40/irq_tables.c
==============================================================================
--- trunk/src/mainboard/sunw/ultra40/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/sunw/ultra40/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
@@ -11,11 +11,11 @@
 #include <arch/pirq_routing.h>
 #include <cpu/amd/amdk8_sysconf.h>
 
-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
 		uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
 		uint8_t slot, uint8_t rfu)
 {
-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
@@ -76,15 +76,15 @@
 
 	pirq = (void *)(addr);
 	v = (uint8_t *)(addr);
-	
+
 	pirq->signature = PIRQ_SIGNATURE;
 	pirq->version  = PIRQ_VERSION;
-	
+
 	pirq->rtr_bus = bus_ck804_0;
 	pirq->rtr_devfn = ((sbdn+9)<<3)|0;
 
 	pirq->exclusive_irqs = 0;
-	
+
 	pirq->rtr_vendor = 0x10de;
 	pirq->rtr_device = 0x005c;
 
@@ -100,9 +100,9 @@
 //pcix bridge
         write_pirq_info(pirq_info, bus_8131_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
         pirq_info++; slot_num++;
-        
-	if(pci1234[2] & 0xf) {     
-	//second pci beidge   
+
+	if(pci1234[2] & 0xf) {
+	//second pci beidge
         	write_pirq_info(pirq_info, bus_ck804b_0, ((sbdnb+9)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0x0, 0);
 	        pirq_info++; slot_num++;
 	}
@@ -139,10 +139,10 @@
 //Slot2 pci
         write_pirq_info(pirq_info, bus_ck804_1, (0x4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 2, 0);
         pirq_info++; slot_num++;
-//nic   
+//nic
         write_pirq_info(pirq_info, bus_ck804b_0, ((sbdnb+0xa)<<3)|0, 0x1, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);
         pirq_info++; slot_num++;
-//Slot3 PCIE x16 
+//Slot3 PCIE x16
         write_pirq_info(pirq_info, bus_ck804b_5, (0<<3)|0, 0x3, 0xdef8, 0x4, 0xdef8, 0x1, 0xdef8, 0x2, 0xdef8, 3, 0);
         pirq_info++; slot_num++;
 
@@ -162,11 +162,11 @@
         write_pirq_info(pirq_info, bus_8131_1, (4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 6, 0);
         pirq_info++; slot_num++;
 #endif
-                
-	pirq->size = 32 + 16 * slot_num; 
+
+	pirq->size = 32 + 16 * slot_num;
 
         for (i = 0; i < pirq->size; i++)
-                sum += v[i];	
+                sum += v[i];
 
 	sum = pirq->checksum - sum;
 

Modified: trunk/src/mainboard/sunw/ultra40/mptable.c
==============================================================================
--- trunk/src/mainboard/sunw/ultra40/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/sunw/ultra40/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -133,7 +133,7 @@
 	    }
 
 	}
-  
+
 /*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#
 */	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_ck804, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_ck804, 0x1);
@@ -212,7 +212,7 @@
 
 //Channel A of 8131
 
-//Slot 6 PCIX 133/100/66       
+//Slot 6 PCIX 133/100/66
         for(i=0;i<4;i++) {
                 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (4<<2)|i, apicid_8131_1, (0+i)%4); //24
         }

Modified: trunk/src/mainboard/sunw/ultra40/resourcemap.c
==============================================================================
--- trunk/src/mainboard/sunw/ultra40/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/sunw/ultra40/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -145,7 +145,7 @@
 		 *	   1 = base/limit registers i are read-only
 		 * [ 7: 4] Reserved
 		 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-		 *	   This field defines the upper address bits of a 40bit address 
+		 *	   This field defines the upper address bits of a 40bit address
 		 *	   that defines the start of memory-mapped I/O region i
 		 */
 		PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -183,7 +183,7 @@
 		 * [31:25] Reserved
 		 */
 		PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x00007000,
-		PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x01fff001, 
+		PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x01fff001,
 		PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
 
@@ -201,7 +201,7 @@
 		 * [ 3: 2] Reserved
 		 * [ 4: 4] VGA Enable
 		 *	   0 = VGA matches Disabled
-		 *	   1 = matches all address < 64K and where A[9:0] is in the 
+		 *	   1 = matches all address < 64K and where A[9:0] is in the
 		 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 		 * [ 5: 5] ISA Enable
 		 *	   0 = ISA matches Disabled
@@ -209,7 +209,7 @@
 		 *	       from matching agains this base/limit pair
 		 * [11: 6] Reserved
 		 * [24:12] PCI I/O Base i
-		 *	   This field defines the start of PCI I/O region n 
+		 *	   This field defines the start of PCI I/O region n
 		 * [31:25] Reserved
 		 */
 		PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,

Modified: trunk/src/mainboard/sunw/ultra40/romstage.c
==============================================================================
--- trunk/src/mainboard/sunw/ultra40/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/sunw/ultra40/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -6,7 +6,7 @@
 #define SET_NB_CFG_54 1
 #endif
 
- 
+
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -55,7 +55,7 @@
         unsigned value;
 
         /*Enable onboard scsi*/
-        lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x2c, (1<<7)|(0<<2)|(0<<1)|(0<<0)); // GP21, offset 0x2c, DISABLE_SCSI_L 
+        lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x2c, (1<<7)|(0<<2)|(0<<1)|(0<<0)); // GP21, offset 0x2c, DISABLE_SCSI_L
         value = lpc47b397_gpio_offset_in(SUPERIO_GPIO_IO_BASE, 0x4c);
         lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x4c, (value|(1<<1)));
 }
@@ -76,7 +76,7 @@
 #include "lib/generic_sdram.c"
 
  /* tyan does not want the default */
-#include "resourcemap.c" 
+#include "resourcemap.c"
 
 #include "cpu/amd/dualcore/dualcore.c"
 
@@ -111,21 +111,21 @@
         unsigned value;
         uint32_t dword;
         uint8_t byte;
-        
+
         pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1, 0), 0xac, 0x047f0400);
-        
+
         byte = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b);
-        byte |= 0x20; 
+        byte |= 0x20;
         pci_write_config8(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0x7b, byte);
-        
+
         dword = pci_read_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<29)|(1<<0);
         pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0, dword);
-        
+
         lpc47b397_enable_serial(SUPERIO_GPIO_DEV, SUPERIO_GPIO_IO_BASE);
-                
+
         value =  lpc47b397_gpio_offset_in(SUPERIO_GPIO_IO_BASE, 0x77);
-        value &= 0xbf; 
+        value &= 0xbf;
         lpc47b397_gpio_offset_out(SUPERIO_GPIO_IO_BASE, 0x77, value);
 }
 
@@ -165,7 +165,7 @@
 	lpc47b397_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
-	
+
 	/* Halt if there was a built in self test failure */
 	report_bist_failure(bist);
 

Modified: trunk/src/mainboard/supermicro/Kconfig
==============================================================================
--- trunk/src/mainboard/supermicro/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_SUPERMICRO
-	
+
 source "src/mainboard/supermicro/h8dme/Kconfig"
 source "src/mainboard/supermicro/h8dmr/Kconfig"
 source "src/mainboard/supermicro/h8dmr_fam10/Kconfig"

Modified: trunk/src/mainboard/supermicro/h8dme/ap_romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dme/ap_romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dme/ap_romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -25,7 +25,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1

Modified: trunk/src/mainboard/supermicro/h8dme/cmos.layout
==============================================================================
--- trunk/src/mainboard/supermicro/h8dme/cmos.layout	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dme/cmos.layout	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,23 +1,23 @@
-## 
+##
 ## This file is part of the coreboot project.
-## 
+##
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu at amd.com> for AMD.
-## 
+##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
-## 
+##
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
-## 
+##
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-## 
+##
 
 entries
 

Modified: trunk/src/mainboard/supermicro/h8dme/devicetree.cb
==============================================================================
--- trunk/src/mainboard/supermicro/h8dme/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dme/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -8,9 +8,9 @@
 		chip northbridge/amd/amdk8 #mc0
 			device pci 18.0 on end
 			device pci 18.0 on end
-			device pci 18.0 on 
-				#  devices on link 0, link 0 == LDT 0 
-			        chip southbridge/nvidia/mcp55 
+			device pci 18.0 on
+				#  devices on link 0, link 0 == LDT 0
+			        chip southbridge/nvidia/mcp55
 					device pci 0.0 on end   # HT
                 			device pci 1.0 on # LPC
 						chip superio/winbond/w83627hf
@@ -37,14 +37,14 @@
                 	                			irq 0x70 = 1
 								irq 0x72 = 12
 							end
-                	        			device pnp 2e.6 off  # SFI 
+                	        			device pnp 2e.6 off  # SFI
                 	                 			io 0x62 = 0x100
 							end
                 	        			device pnp 2e.7 off #  GPIO_GAME_MIDI
 								io 0x60 = 0x220
 								io 0x62 = 0x300
 								irq 0x70 = 9
-							end						
+							end
                 	        			device pnp 2e.8 off end #  WDTO_PLED
                 	        			device pnp 2e.9 off end #  GPIO_SUSLED
                 	        			device pnp 2e.a off end #  ACPI
@@ -67,24 +67,24 @@
 #                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot1
 #                                                        device i2c 51 on end
-#                                                end     
+#                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot2
 #                                                        device i2c 52 on end
-#                                                end             
+#                                                end
 #                                                chip drivers/generic/generic #PCI Slot1
 #                                                        device i2c 53 on end
-#                                                end              
+#                                                end
 #                                                chip drivers/generic/generic #Master MCP55 PCI-E
 #                                                        device i2c 54 on end
-#                                                end     
+#                                                end
 #                                                chip drivers/generic/generic #Slave MCP55 PCI-E
 #                                                        device i2c 55 on end
-#                                                end             
+#                                                end
                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end
                                                 end
 
-                                        end # SM 
+                                        end # SM
 	                		device pci 2.0 on end # USB 1.1
         	        		device pci 2.1 on end # USB 2
                 			device pci 4.0 on end # IDE
@@ -116,15 +116,15 @@
 					register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
 					register "mac_eeprom_addr" = "0x51"
 				end
-			end #  device pci 18.0 
+			end #  device pci 18.0
 			device pci 18.1 on end
 			device pci 18.2 on end
 			device pci 18.3 on end
 		end # mc0
-		
+
 	end # PCI domain
-	
-#       chip drivers/generic/debug 
+
+#       chip drivers/generic/debug
 #               device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
 #                device pnp 0.2 off end # mem
@@ -135,5 +135,5 @@
 #                device pnp 0.7 off end # tsc
 #                device pnp 0.8 off  end # io
 #                device pnp 0.9 on end # io
-#       end  
+#       end
 end #root_complex

Modified: trunk/src/mainboard/supermicro/h8dme/get_bus_conf.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dme/get_bus_conf.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dme/get_bus_conf.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -40,7 +40,7 @@
 
 	unsigned char bus_pcix[3]; // under bus_mcp55_2
 
-unsigned pci1234x[] = 
+unsigned pci1234x[] =
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
 	 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
@@ -52,7 +52,7 @@
 //        0x0000ff0,
 //        0x0000ff0
 };
-unsigned hcdnx[] = 
+unsigned hcdnx[] =
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
 	0x20202020,
 	0x20202020,
@@ -98,7 +98,7 @@
 	for(i=0; i<8; i++) {
 		bus_mcp55[i] = 0;
 	}
-	
+
 	for(i=0; i<3; i++) {
 		bus_pcix[i] = 0;
 	}
@@ -142,13 +142,13 @@
 	                        }
 			}
 		}
-		
+
 
 /*I/O APICs:	APIC ID	Version	State		Address*/
 #if CONFIG_LOGICAL_CPUS==1
 	apicid_base = get_apicid_base(1);
-#else 
-	apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+	apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
 	apicid_mcp55 = apicid_base+0;
 

Modified: trunk/src/mainboard/supermicro/h8dme/irq_tables.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dme/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dme/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
@@ -33,11 +33,11 @@
 
 #include <cpu/amd/amdk8_sysconf.h>
 
-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
 		uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
 		uint8_t slot, uint8_t rfu)
 {
-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
@@ -79,15 +79,15 @@
 
 	pirq = (void *)(addr);
 	v = (uint8_t *)(addr);
-	
+
 	pirq->signature = PIRQ_SIGNATURE;
 	pirq->version  = PIRQ_VERSION;
-	
+
 	pirq->rtr_bus = bus_mcp55[0];
 	pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
 	pirq->exclusive_irqs = 0;
-	
+
 	pirq->rtr_vendor = 0x10de;
 	pirq->rtr_device = 0x0370;
 
@@ -100,11 +100,11 @@
 //pci bridge
 	write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
 	pirq_info++; slot_num++;
-        
-	pirq->size = 32 + 16 * slot_num; 
+
+	pirq->size = 32 + 16 * slot_num;
 
         for (i = 0; i < pirq->size; i++)
-                sum += v[i];	
+                sum += v[i];
 
 	sum = pirq->checksum - sum;
 

Modified: trunk/src/mainboard/supermicro/h8dme/mptable.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dme/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dme/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -102,7 +102,7 @@
 
 
 	}
-  
+
 /*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#
 */	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_mcp55, 0x1);
@@ -144,9 +144,9 @@
         }
 
 
-	if(bus_pcix[0]) {	
+	if(bus_pcix[0]) {
 		for(i=0;i<2;i++) {
-			smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcix[2], (4<<2)|i, apicid_mcp55, 0x10 + (0+i+4-sbdn%4)%4); //16, 17 
+			smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcix[2], (4<<2)|i, apicid_mcp55, 0x10 + (0+i+4-sbdn%4)%4); //16, 17
 		}
 
 		for(i=0;i<4;i++) {

Modified: trunk/src/mainboard/supermicro/h8dme/resourcemap.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dme/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dme/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -161,7 +161,7 @@
 		 *	   1 = base/limit registers i are read-only
 		 * [ 7: 4] Reserved
 		 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-		 *	   This field defines the upper address bits of a 40bit address 
+		 *	   This field defines the upper address bits of a 40bit address
 		 *	   that defines the start of memory-mapped I/O region i
 		 */
 		PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -217,7 +217,7 @@
 		 * [ 3: 2] Reserved
 		 * [ 4: 4] VGA Enable
 		 *	   0 = VGA matches Disabled
-		 *	   1 = matches all address < 64K and where A[9:0] is in the 
+		 *	   1 = matches all address < 64K and where A[9:0] is in the
 		 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 		 * [ 5: 5] ISA Enable
 		 *	   0 = ISA matches Disabled
@@ -225,7 +225,7 @@
 		 *	       from matching agains this base/limit pair
 		 * [11: 6] Reserved
 		 * [24:12] PCI I/O Base i
-		 *	   This field defines the start of PCI I/O region n 
+		 *	   This field defines the start of PCI I/O region n
 		 * [31:25] Reserved
 		 */
 		PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
@@ -270,9 +270,9 @@
 		 *	   This field defines the highest bus number in configuration region i
 		 */
 		PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x3f000203, /* link 2 of cpu 0 --> Nvidia MCP55 Pro */
-		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
-		PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
 
 	};
 

Modified: trunk/src/mainboard/supermicro/h8dmr/ap_romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr/ap_romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr/ap_romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -25,7 +25,7 @@
 #define RAMINIT_SYSINFO 1
 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
 
-#define SET_NB_CFG_54 1 
+#define SET_NB_CFG_54 1
 
 //used by raminit
 #define QRANK_DIMM_SUPPORT 1

Modified: trunk/src/mainboard/supermicro/h8dmr/cmos.layout
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr/cmos.layout	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr/cmos.layout	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,23 +1,23 @@
-## 
+##
 ## This file is part of the coreboot project.
-## 
+##
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu at amd.com> for AMD.
-## 
+##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
-## 
+##
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
-## 
+##
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-## 
+##
 
 entries
 

Modified: trunk/src/mainboard/supermicro/h8dmr/devicetree.cb
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -8,9 +8,9 @@
 		chip northbridge/amd/amdk8 #mc0
 			device pci 18.0 on end
 			device pci 18.0 on end
-			device pci 18.0 on 
-				#  devices on link 0, link 0 == LDT 0 
-			        chip southbridge/nvidia/mcp55 
+			device pci 18.0 on
+				#  devices on link 0, link 0 == LDT 0
+			        chip southbridge/nvidia/mcp55
 					device pci 0.0 on end   # HT
                 			device pci 1.0 on # LPC
 						chip superio/winbond/w83627hf
@@ -37,14 +37,14 @@
                 	                			irq 0x70 = 1
 								irq 0x72 = 12
 							end
-                	        			device pnp 2e.6 off  # SFI 
+                	        			device pnp 2e.6 off  # SFI
                 	                 			io 0x62 = 0x100
 							end
                 	        			device pnp 2e.7 off #  GPIO_GAME_MIDI
 								io 0x60 = 0x220
 								io 0x62 = 0x300
 								irq 0x70 = 9
-							end						
+							end
                 	        			device pnp 2e.8 off end #  WDTO_PLED
                 	        			device pnp 2e.9 off end #  GPIO_SUSLED
                 	        			device pnp 2e.a off end #  ACPI
@@ -56,29 +56,29 @@
 					end
 			                device pci 1.1 on # SM 0
                                                 chip drivers/generic/generic #dimm 0-0-0
-                                                        device i2c 50 on end  
-                                                end              
+                                                        device i2c 50 on end
+                                                end
                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end
-                                                end             
+                                                end
                                                 chip drivers/generic/generic #dimm 0-1-1
                                                         device i2c 53 on end
-                                                end              
+                                                end
                                                 chip drivers/generic/generic #dimm 1-0-0
                                                         device i2c 54 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 1-0-1
                                                         device i2c 55 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 1-1-0
                                                         device i2c 56 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 1-1-1
                                                         device i2c 57 on end
-                                                end 
+                                                end
 					end # SM
                                         device pci 1.1 on # SM 1
 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
@@ -87,24 +87,24 @@
 #                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot1
 #                                                        device i2c 51 on end
-#                                                end     
+#                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot2
 #                                                        device i2c 52 on end
-#                                                end             
+#                                                end
 #                                                chip drivers/generic/generic #PCI Slot1
 #                                                        device i2c 53 on end
-#                                                end              
+#                                                end
 #                                                chip drivers/generic/generic #Master MCP55 PCI-E
 #                                                        device i2c 54 on end
-#                                                end     
+#                                                end
 #                                                chip drivers/generic/generic #Slave MCP55 PCI-E
 #                                                        device i2c 55 on end
-#                                                end             
+#                                                end
                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end
-                                                end 
+                                                end
 
-                                        end # SM 
+                                        end # SM
 	                		device pci 2.0 on end # USB 1.1
         	        		device pci 2.1 on end # USB 2
                 			device pci 4.0 on end # IDE
@@ -136,15 +136,15 @@
 					register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
 					register "mac_eeprom_addr" = "0x51"
 				end
-			end #  device pci 18.0 
+			end #  device pci 18.0
 			device pci 18.1 on end
 			device pci 18.2 on end
 			device pci 18.3 on end
 		end # mc0
-		
+
 	end # PCI domain
-	
-#       chip drivers/generic/debug 
+
+#       chip drivers/generic/debug
 #               device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
 #                device pnp 0.2 off end # mem
@@ -155,5 +155,5 @@
 #                device pnp 0.7 off end # tsc
 #                device pnp 0.8 off  end # io
 #                device pnp 0.9 on end # io
-#       end  
+#       end
 end #root_complex

Modified: trunk/src/mainboard/supermicro/h8dmr/get_bus_conf.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr/get_bus_conf.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr/get_bus_conf.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -40,7 +40,7 @@
 
 	unsigned char bus_pcix[3]; // under bus_mcp55_2
 
-unsigned pci1234x[] = 
+unsigned pci1234x[] =
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
 	 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
@@ -52,7 +52,7 @@
 //        0x0000ff0,
 //        0x0000ff0
 };
-unsigned hcdnx[] = 
+unsigned hcdnx[] =
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
 	0x20202020,
 	0x20202020,
@@ -98,7 +98,7 @@
 	for(i=0; i<8; i++) {
 		bus_mcp55[i] = 0;
 	}
-	
+
 	for(i=0; i<3; i++) {
 		bus_pcix[i] = 0;
 	}
@@ -142,13 +142,13 @@
 	                        }
 			}
 		}
-		
+
 
 /*I/O APICs:	APIC ID	Version	State		Address*/
 #if CONFIG_LOGICAL_CPUS==1
 	apicid_base = get_apicid_base(1);
-#else 
-	apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+	apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
 	apicid_mcp55 = apicid_base+0;
 

Modified: trunk/src/mainboard/supermicro/h8dmr/irq_tables.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
@@ -33,11 +33,11 @@
 
 #include <cpu/amd/amdk8_sysconf.h>
 
-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
 		uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
 		uint8_t slot, uint8_t rfu)
 {
-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
@@ -79,15 +79,15 @@
 
 	pirq = (void *)(addr);
 	v = (uint8_t *)(addr);
-	
+
 	pirq->signature = PIRQ_SIGNATURE;
 	pirq->version  = PIRQ_VERSION;
-	
+
 	pirq->rtr_bus = bus_mcp55[0];
 	pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
 	pirq->exclusive_irqs = 0;
-	
+
 	pirq->rtr_vendor = 0x10de;
 	pirq->rtr_device = 0x0370;
 
@@ -100,11 +100,11 @@
 //pci bridge
 	write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
 	pirq_info++; slot_num++;
-        
-	pirq->size = 32 + 16 * slot_num; 
+
+	pirq->size = 32 + 16 * slot_num;
 
         for (i = 0; i < pirq->size; i++)
-                sum += v[i];	
+                sum += v[i];
 
 	sum = pirq->checksum - sum;
 

Modified: trunk/src/mainboard/supermicro/h8dmr/mptable.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -102,7 +102,7 @@
 
 
 	}
-  
+
 /*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#
 */	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, 0x1, apicid_mcp55, 0x1);
@@ -144,9 +144,9 @@
         }
 
 
-	if(bus_pcix[0]) {	
+	if(bus_pcix[0]) {
 		for(i=0;i<2;i++) {
-			smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcix[2], (4<<2)|i, apicid_mcp55, 0x10 + (0+i+4-sbdn%4)%4); //16, 17 
+			smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_pcix[2], (4<<2)|i, apicid_mcp55, 0x10 + (0+i+4-sbdn%4)%4); //16, 17
 		}
 
 		for(i=0;i<4;i++) {

Modified: trunk/src/mainboard/supermicro/h8dmr/resourcemap.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -161,7 +161,7 @@
 		 *	   1 = base/limit registers i are read-only
 		 * [ 7: 4] Reserved
 		 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-		 *	   This field defines the upper address bits of a 40bit address 
+		 *	   This field defines the upper address bits of a 40bit address
 		 *	   that defines the start of memory-mapped I/O region i
 		 */
 		PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -217,7 +217,7 @@
 		 * [ 3: 2] Reserved
 		 * [ 4: 4] VGA Enable
 		 *	   0 = VGA matches Disabled
-		 *	   1 = matches all address < 64K and where A[9:0] is in the 
+		 *	   1 = matches all address < 64K and where A[9:0] is in the
 		 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 		 * [ 5: 5] ISA Enable
 		 *	   0 = ISA matches Disabled
@@ -225,7 +225,7 @@
 		 *	       from matching agains this base/limit pair
 		 * [11: 6] Reserved
 		 * [24:12] PCI I/O Base i
-		 *	   This field defines the start of PCI I/O region n 
+		 *	   This field defines the start of PCI I/O region n
 		 * [31:25] Reserved
 		 */
 		PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
@@ -270,9 +270,9 @@
 		 *	   This field defines the highest bus number in configuration region i
 		 */
 		PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x3f000203, /* link 2 of cpu 0 --> Nvidia MCP55 Pro */
-		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
-		PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
 
 	};
 

Modified: trunk/src/mainboard/supermicro/h8dmr/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -37,7 +37,7 @@
 #if CONFIG_K8_REV_F_SUPPORT == 1
 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
 #endif
- 
+
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -98,7 +98,7 @@
 #include "northbridge/amd/amdk8/raminit_f.c"
 #include "lib/generic_sdram.c"
 
-#include "resourcemap.c" 
+#include "resourcemap.c"
 
 #include "cpu/amd/dualcore/dualcore.c"
 
@@ -129,13 +129,13 @@
 	smbusx_write_byte(1, (0x58>>1), 0xb1, 0xff); /* set FAN ctrl to DC mode */
 
         byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b);
-        byte |= 0x20; 
+        byte |= 0x20;
         pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte);
-        
+
         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<0);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);
-        
+
         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4);
         dword |= (1<<16);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword);
@@ -181,7 +181,7 @@
 
         uart_init();
         console_init();
-	
+
 	/* Halt if there was a built in self test failure */
 	report_bist_failure(bist);
 

Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/cmos.layout
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr_fam10/cmos.layout	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr_fam10/cmos.layout	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,23 +1,23 @@
-## 
+##
 ## This file is part of the coreboot project.
-## 
+##
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu at amd.com> for AMD.
-## 
+##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
-## 
+##
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
-## 
+##
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-## 
+##
 
 entries
 

Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr_fam10/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -8,9 +8,9 @@
 		chip northbridge/amd/amdfam10 #mc0
 			device pci 18.0 on end
 			device pci 18.0 on end
-			device pci 18.0 on 
+			device pci 18.0 on
         # SB on link 2.0
-			        chip southbridge/nvidia/mcp55 
+			        chip southbridge/nvidia/mcp55
 					device pci 0.0 on end   # HT
                 			device pci 1.0 on # LPC
 						chip superio/winbond/w83627hf
@@ -37,14 +37,14 @@
                 	                			irq 0x70 = 1
 								irq 0x72 = 12
 							end
-                	        			device pnp 2e.6 off  # SFI 
+                	        			device pnp 2e.6 off  # SFI
                 	                 			io 0x62 = 0x100
 							end
                 	        			device pnp 2e.7 off #  GPIO_GAME_MIDI
 								io 0x60 = 0x220
 								io 0x62 = 0x300
 								irq 0x70 = 9
-							end						
+							end
                 	        			device pnp 2e.8 off end #  WDTO_PLED
                 	        			device pnp 2e.9 off end #  GPIO_SUSLED
                 	        			device pnp 2e.a off end #  ACPI
@@ -56,29 +56,29 @@
 					end
 			                device pci 1.1 on # SM 0
                                                 chip drivers/generic/generic #dimm 0-0-0
-                                                        device i2c 50 on end  
-                                                end              
+                                                        device i2c 50 on end
+                                                end
                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end
-                                                end             
+                                                end
                                                 chip drivers/generic/generic #dimm 0-1-1
                                                         device i2c 53 on end
-                                                end              
+                                                end
                                                 chip drivers/generic/generic #dimm 1-0-0
                                                         device i2c 54 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 1-0-1
                                                         device i2c 55 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 1-1-0
                                                         device i2c 56 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 1-1-1
                                                         device i2c 57 on end
-                                                end 
+                                                end
 					end # SM
                                         device pci 1.1 on # SM 1
 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
@@ -87,24 +87,24 @@
 #                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot1
 #                                                        device i2c 51 on end
-#                                                end     
+#                                                end
 #                                                chip drivers/generic/generic #PCIXB Slot2
 #                                                        device i2c 52 on end
-#                                                end             
+#                                                end
 #                                                chip drivers/generic/generic #PCI Slot1
 #                                                        device i2c 53 on end
-#                                                end              
+#                                                end
 #                                                chip drivers/generic/generic #Master MCP55 PCI-E
 #                                                        device i2c 54 on end
-#                                                end     
+#                                                end
 #                                                chip drivers/generic/generic #Slave MCP55 PCI-E
 #                                                        device i2c 55 on end
-#                                                end             
+#                                                end
                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end
-                                                end 
+                                                end
 
-                                        end # SM 
+                                        end # SM
 	                		device pci 2.0 on end # USB 1.1
         	        		device pci 2.1 on end # USB 2
                 			device pci 4.0 on end # IDE
@@ -136,7 +136,7 @@
 					register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
 					register "mac_eeprom_addr" = "0x51"
 				end
-			end #  device pci 18.0 
+			end #  device pci 18.0
 			device pci 18.1 on end
 			device pci 18.2 on end
 			device pci 18.3 on end
@@ -147,10 +147,10 @@
 			device pci 19.3 on end
 			device pci 19.4 on end
 		end # mc0
-		
+
 	end # PCI domain
-	
-#       chip drivers/generic/debug 
+
+#       chip drivers/generic/debug
 #               device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
 #                device pnp 0.2 off end # mem
@@ -161,5 +161,5 @@
 #                device pnp 0.7 off end # tsc
 #                device pnp 0.8 off  end # io
 #                device pnp 0.9 on end # io
-#       end  
+#       end
 end #root_complex

Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr_fam10/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
@@ -34,11 +34,11 @@
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "mb_sysconf.h"
 
-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
 		uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
 		uint8_t slot, uint8_t rfu)
 {
-	pirq_info->bus = bus; 
+	pirq_info->bus = bus;
 	pirq_info->devfn = devfn;
 		pirq_info->irq[0].link = link0;
 		pirq_info->irq[0].bitmap = bitmap0;
@@ -80,15 +80,15 @@
 
 	pirq = (void *)(addr);
 	v = (uint8_t *)(addr);
-	
+
 	pirq->signature = PIRQ_SIGNATURE;
 	pirq->version  = PIRQ_VERSION;
-	
+
 	pirq->rtr_bus = m->bus_mcp55[0];
 	pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
 	pirq->exclusive_irqs = 0;
-	
+
 	pirq->rtr_vendor = 0x10de;
 	pirq->rtr_device = 0x0370;
 
@@ -101,7 +101,7 @@
 //pci bridge
 	write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
 	pirq_info++; slot_num++;
-	
+
 	for(i=1; i< sysconf.hc_possible_num; i++) {
 		if(!(sysconf.pci1234[i] & 0x1) ) continue;
 		unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
@@ -120,10 +120,10 @@
 	}
 #endif
 
-	pirq->size = 32 + 16 * slot_num; 
+	pirq->size = 32 + 16 * slot_num;
 
 	for (i = 0; i < pirq->size; i++)
-		sum += v[i];	
+		sum += v[i];
 
 	sum = pirq->checksum - sum;
 

Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/mb_sysconf.h
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr_fam10/mb_sysconf.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr_fam10/mb_sysconf.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -26,7 +26,7 @@
 	unsigned char bus_isa;
 	unsigned char bus_mcp55[8]; //1
 	unsigned apicid_mcp55;
-	unsigned bus_type[256]; 
+	unsigned bus_type[256];
 
 };
 

Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -161,7 +161,7 @@
 		 *	   1 = base/limit registers i are read-only
 		 * [ 7: 4] Reserved
 		 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-		 *	   This field defines the upper address bits of a 40bit address 
+		 *	   This field defines the upper address bits of a 40bit address
 		 *	   that defines the start of memory-mapped I/O region i
 		 */
 		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x80), 0x000000f0, 0x00000000,
@@ -218,7 +218,7 @@
 		 * [ 3: 2] Reserved
 		 * [ 4: 4] VGA Enable
 		 *	   0 = VGA matches Disabled
-		 *	   1 = matches all address < 64K and where A[9:0] is in the 
+		 *	   1 = matches all address < 64K and where A[9:0] is in the
 		 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 		 * [ 5: 5] ISA Enable
 		 *	   0 = ISA matches Disabled
@@ -226,7 +226,7 @@
 		 *	       from matching agains this base/limit pair
 		 * [11: 6] Reserved
 		 * [24:12] PCI I/O Base i
-		 *	   This field defines the start of PCI I/O region n 
+		 *	   This field defines the start of PCI I/O region n
 		 * [31:25] Reserved
 		 */
 		// WARD CHANGED
@@ -273,9 +273,9 @@
 		 */
 		// WARD CHANGED
 		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE0), 0x0000FC88, 0x3f000203, /* link 2 of cpu 0 --> Nvidia MCP55 Pro */
-		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE4), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE4), 0x0000FC88, 0x00000000,
 		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE8), 0x0000FC88, 0x00000000,
-		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xEC), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xEC), 0x0000FC88, 0x00000000,
 
 	};
 

Modified: trunk/src/mainboard/supermicro/h8qme_fam10/cmos.layout
==============================================================================
--- trunk/src/mainboard/supermicro/h8qme_fam10/cmos.layout	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8qme_fam10/cmos.layout	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,23 +1,23 @@
-## 
+##
 ## This file is part of the coreboot project.
-## 
+##
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu at amd.com> for AMD.
-## 
+##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
-## 
+##
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
-## 
+##
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-## 
+##
 
 entries
 

Modified: trunk/src/mainboard/supermicro/h8qme_fam10/devicetree.cb
==============================================================================
--- trunk/src/mainboard/supermicro/h8qme_fam10/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8qme_fam10/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -8,9 +8,9 @@
 		chip northbridge/amd/amdfam10 #mc0
 			device pci 18.0 on end
 			device pci 18.0 on end
-			device pci 18.0 on 
+			device pci 18.0 on
         # SB on link 2.0
-			        chip southbridge/nvidia/mcp55 
+			        chip southbridge/nvidia/mcp55
 					device pci 0.0 on end   # HT
                 			device pci 1.0 on # LPC
 						chip superio/winbond/w83627hf
@@ -37,14 +37,14 @@
                 	                			irq 0x70 = 1
 								irq 0x72 = 12
 							end
-                	        			device pnp 2e.6 off  # SFI 
+                	        			device pnp 2e.6 off  # SFI
                 	                 			io 0x62 = 0x100
 							end
                 	        			device pnp 2e.7 off #  GPIO_GAME_MIDI
 								io 0x60 = 0x220
 								io 0x62 = 0x300
 								irq 0x70 = 9
-							end						
+							end
                 	        			device pnp 2e.8 off end #  WDTO_PLED
                 	        			device pnp 2e.9 off end #  GPIO_SUSLED
                 	        			device pnp 2e.a off end #  ACPI
@@ -57,12 +57,12 @@
 					device pci 1.1 on end
                                         device pci 1.1 on # SM 1
 #PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus?
-#                                                         
+#
                                                 chip drivers/generic/generic #MAC EEPROM
                                                         device i2c 51 on end
-                                                end 
+                                                end
 
-                                        end # SM 
+                                        end # SM
 	                		device pci 2.0 on end # USB 1.1
         	        		device pci 2.1 on end # USB 2
                 			device pci 4.0 on end # IDE
@@ -70,7 +70,7 @@
 	                		device pci 5.1 on end # SATA 1
 	                		device pci 5.2 on end # SATA 2
 					device pci 6.1 off end # AZA
-					device pci 7.0 on 
+					device pci 7.0 on
 					    device pci 1.0 on end
 					end
 					device pci 8.0 off end
@@ -87,7 +87,7 @@
 					register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
 					register "mac_eeprom_addr" = "0x51"
 				end
-			end #  device pci 18.0 
+			end #  device pci 18.0
 			device pci 18.1 on end
 			device pci 18.2 on end
 			device pci 18.3 on end
@@ -110,10 +110,10 @@
 			device pci 19.3 on end
 			device pci 19.4 on end
 		end # mc0
-		
+
 	end # PCI domain
-	
-#       chip drivers/generic/debug 
+
+#       chip drivers/generic/debug
 #               device pnp 0.0 off end # chip name
 #                device pnp 0.1 on end # pci_regs_all
 #                device pnp 0.2 off end # mem
@@ -124,5 +124,5 @@
 #                device pnp 0.7 off end # tsc
 #                device pnp 0.8 off  end # io
 #                device pnp 0.9 on end # io
-#       end  
+#       end
 end #root_complex

Modified: trunk/src/mainboard/supermicro/h8qme_fam10/irq_tables.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8qme_fam10/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8qme_fam10/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
  * (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
@@ -34,11 +34,11 @@
 #include <cpu/amd/amdfam10_sysconf.h>
 #include "mb_sysconf.h"
 
-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
 		uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
 		uint8_t slot, uint8_t rfu)
 {
-	pirq_info->bus = bus; 
+	pirq_info->bus = bus;
 	pirq_info->devfn = devfn;
 		pirq_info->irq[0].link = link0;
 		pirq_info->irq[0].bitmap = bitmap0;
@@ -80,15 +80,15 @@
 
 	pirq = (void *)(addr);
 	v = (uint8_t *)(addr);
-	
+
 	pirq->signature = PIRQ_SIGNATURE;
 	pirq->version  = PIRQ_VERSION;
-	
+
 	pirq->rtr_bus = m->bus_mcp55[0];
 	pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
 	pirq->exclusive_irqs = 0;
-	
+
 	pirq->rtr_vendor = 0x10de;
 	pirq->rtr_device = 0x0364;
 
@@ -101,7 +101,7 @@
 //pci bridge
 	write_pirq_info(pirq_info, m->bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0x4ca0, 0x2, 0x4ca0, 0x3, 0x4ca0, 0x4, 0x4ca0, 0, 0);
 	pirq_info++; slot_num++;
-	
+
 	for(i=1; i< sysconf.hc_possible_num; i++) {
 		if(!(sysconf.pci1234[i] & 0x1) ) continue;
 		unsigned busn = (sysconf.pci1234[i] >> 12) & 0xff;
@@ -120,10 +120,10 @@
 	}
 #endif
 
-	pirq->size = 32 + 16 * slot_num; 
+	pirq->size = 32 + 16 * slot_num;
 
 	for (i = 0; i < pirq->size; i++)
-		sum += v[i];	
+		sum += v[i];
 
 	sum = pirq->checksum - sum;
 

Modified: trunk/src/mainboard/supermicro/h8qme_fam10/mb_sysconf.h
==============================================================================
--- trunk/src/mainboard/supermicro/h8qme_fam10/mb_sysconf.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8qme_fam10/mb_sysconf.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -26,7 +26,7 @@
 	unsigned char bus_isa;
 	unsigned char bus_mcp55[8]; //1
 	unsigned apicid_mcp55;
-	unsigned bus_type[256]; 
+	unsigned bus_type[256];
 
 	unsigned char bus_8132_0;  //7
 	unsigned char bus_8132_1;  //8

Modified: trunk/src/mainboard/supermicro/h8qme_fam10/mptable.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8qme_fam10/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8qme_fam10/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -100,33 +100,33 @@
 
 
 	}
-		
+
 		   /*I/O Ints:	Type	Polarity    Trigger			Bus ID	 IRQ	APIC ID	PIN# */
-	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, m->apicid_mcp55, 0x0); 
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x1, m->apicid_mcp55, 0x1); 
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x0, m->apicid_mcp55, 0x2); 
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x3, m->apicid_mcp55, 0x3); 
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x4, m->apicid_mcp55, 0x4); 
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x6, m->apicid_mcp55, 0x6); 
+	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, m->bus_isa, 0x0, m->apicid_mcp55, 0x0);
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x1, m->apicid_mcp55, 0x1);
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x0, m->apicid_mcp55, 0x2);
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x3, m->apicid_mcp55, 0x3);
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x4, m->apicid_mcp55, 0x4);
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x6, m->apicid_mcp55, 0x6);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x7, m->apicid_mcp55, 0x7);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0x8, m->apicid_mcp55, 0x8);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0xc, m->apicid_mcp55, 0xc);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0xd, m->apicid_mcp55, 0xd);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0xe, m->apicid_mcp55, 0xe);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  m->bus_isa, 0xf, m->apicid_mcp55, 0xf);
-	
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0x5);  /*  5 SMBus, OK */ 
+
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+1)<<2)|1, m->apicid_mcp55, 0x5);  /*  5 SMBus, OK */
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+2)<<2)|0, m->apicid_mcp55, 0xb); /* 11 USB, OK */
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+2)<<2)|1, m->apicid_mcp55, 0xa); /* 10 USB, OK */
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|0, m->apicid_mcp55, 0x5); /*  5  IDE, OK*/
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|1, m->apicid_mcp55, 0xa); /* 10 IDE, OK*/ 
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|2, m->apicid_mcp55, 0xa); /* 10 IDE, OK*/ 
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|1, m->apicid_mcp55, 0xa); /* 10 IDE, OK*/
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+5)<<2)|2, m->apicid_mcp55, 0xa); /* 10 IDE, OK*/
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[0], ((sbdn+6)<<2)|1, m->apicid_mcp55, 0xa); /* 10 VGA, OK*/
-	
+
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, ((3)<<2)|0, m->apicid_mcp55, 0x5); /* 5  eth0, OK*/
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, ((3)<<2)|1, m->apicid_mcp55, 0xb); /* 11 eth1, OK*/
 
-	for(j=7;j>=2; j--) { 
+	for(j=7;j>=2; j--) {
 		if(!m->bus_mcp55[j]) continue;
 		for(i=0;i<4;i++) {
 			smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_mcp55[j], (0x00<<2)|i, m->apicid_mcp55, 0x10 + (2+j+i+4-sbdn%4)%4);

Modified: trunk/src/mainboard/supermicro/h8qme_fam10/resourcemap.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8qme_fam10/resourcemap.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8qme_fam10/resourcemap.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -161,7 +161,7 @@
 		 *	   1 = base/limit registers i are read-only
 		 * [ 7: 4] Reserved
 		 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-		 *	   This field defines the upper address bits of a 40bit address 
+		 *	   This field defines the upper address bits of a 40bit address
 		 *	   that defines the start of memory-mapped I/O region i
 		 */
 		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0x80), 0x000000f0, 0x00000000,
@@ -218,7 +218,7 @@
 		 * [ 3: 2] Reserved
 		 * [ 4: 4] VGA Enable
 		 *	   0 = VGA matches Disabled
-		 *	   1 = matches all address < 64K and where A[9:0] is in the 
+		 *	   1 = matches all address < 64K and where A[9:0] is in the
 		 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 		 * [ 5: 5] ISA Enable
 		 *	   0 = ISA matches Disabled
@@ -226,7 +226,7 @@
 		 *	       from matching agains this base/limit pair
 		 * [11: 6] Reserved
 		 * [24:12] PCI I/O Base i
-		 *	   This field defines the start of PCI I/O region n 
+		 *	   This field defines the start of PCI I/O region n
 		 * [31:25] Reserved
 		 */
 		// WARD CHANGED
@@ -273,9 +273,9 @@
 		 */
 		// WARD CHANGED
 		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE0), 0x0000FC88, 0x3f000203, /* link 2 of cpu 0 --> Nvidia MCP55 Pro */
-		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE4), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE4), 0x0000FC88, 0x00000000,
 		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE8), 0x0000FC88, 0x00000000,
-		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xEC), 0x0000FC88, 0x00000000, 
+		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xEC), 0x0000FC88, 0x00000000,
 
 	};
 

Modified: trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -93,12 +93,12 @@
 #include "northbridge/amd/amdfam10/raminit_amdmct.c"
 #include "northbridge/amd/amdfam10/amdfam10_pci.c"
 
-#include "resourcemap.c" 
+#include "resourcemap.c"
 
 #include "cpu/amd/quadcore/quadcore.c"
 
 #define MCP55_NUM 1
-#define MCP55_USE_NIC 0 
+#define MCP55_USE_NIC 0
 #define MCP55_USE_AZA 0
 
 #define MCP55_PCI_E_X_0 4
@@ -128,13 +128,13 @@
 	smbusx_write_byte(1, (0x58>>1), 0xb1, 0xff); /* set FAN ctrl to DC mode */
 
         byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b);
-        byte |= 0x20; 
+        byte |= 0x20;
         pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte);
-        
+
         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0);
         dword |= (1<<0);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword);
-        
+
         dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4);
         dword |= (1<<16);
         pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword);
@@ -206,7 +206,7 @@
         }
 
   post_code(0x30);
- 
+
         if (bist == 0) {
 		bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
         }

Modified: trunk/src/mainboard/supermicro/x6dai_g/debug.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dai_g/debug.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dai_g/debug.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
-                                                                                
+
         outb(index, 0x2e);
         data = inb(0x2f);
 	print_debug("0x");
@@ -15,7 +15,7 @@
 	print_debug("\n");
         return;
 }
-        
+
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
@@ -25,7 +25,7 @@
         outb(0x01, 0x2f);
 	return;
 }
-                                                                        
+
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
@@ -43,27 +43,27 @@
         print_reg(0x75);
         return;
 }
-                                                                                
+
 static void siodump(void)
 {
         int i;
         unsigned char data;
-       
+
 	 print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
-#if 0                                                                         
+#if 0
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
-                                                                                
+
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
@@ -82,13 +82,13 @@
 	print_debug("\nGPDI 4: 0x");
 	print_debug_hex8(data);
 	print_debug("\n");
-	
-#if 0                                                                                
-                                                                                
+
+#if 0
+
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
@@ -103,11 +103,11 @@
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
-                                                                                
+
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
-#endif                                                                           
+#endif
         return;
 }
 
@@ -124,8 +124,8 @@
 static void print_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -144,7 +144,7 @@
 	int i;
 	print_debug_pci_dev(dev);
 	print_debug("\n");
-	
+
 	for(i = 0; i <= 255; i++) {
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
@@ -164,19 +164,19 @@
 {
 	int i;
 	unsigned long bar;
-	
+
 	print_debug("BAR 14 Dump\n");
-	
+
 	bar = pci_read_config32(dev, 0x14);
 	for(i = 0; i <= 0x300; i+=4) {
-#if 0		
+#if 0
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
 			print_debug_hex8(i);
 			print_debug_char(':');
 		}
 		val = pci_read_config8(dev, i);
-#endif		
+#endif
 		if((i%4)==0) {
 		print_debug("\n");
 		print_debug_hex16(i);
@@ -191,8 +191,8 @@
 static void dump_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -215,8 +215,8 @@
 		device = ctrl->channel0[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".0: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -241,8 +241,8 @@
 		device = ctrl->channel1[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".1: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -278,7 +278,7 @@
         	print_debug("\n");
                 print_debug("dimm ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 256) ; i++) {
 	                unsigned char byte;
                         if ((i % 16) == 0) {
@@ -291,7 +291,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -311,7 +311,7 @@
         	print_debug("\n");
                 print_debug("ipmi ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 8) ; i++) {
 	                unsigned char byte;
 			status = smbus_read_byte(device, 2);
@@ -319,7 +319,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -327,4 +327,4 @@
 		device += SMBUS_MEM_DEVICE_INC;
 		print_debug("\n");
 	}
-}	
+}

Modified: trunk/src/mainboard/supermicro/x6dai_g/devicetree.cb
==============================================================================
--- trunk/src/mainboard/supermicro/x6dai_g/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dai_g/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,20 +1,20 @@
 chip northbridge/intel/e7525 # mch
 	device pci_domain 0 on
-		chip southbridge/intel/esb6300  # esb6300 
+		chip southbridge/intel/esb6300  # esb6300
 			register "pirq_a_d" = "0x0b0a0a05"
 			register "pirq_e_h" = "0x0a0b0c80"
-		
+
 			device pci 1c.0 on end
-		
+
 			device pci 1d.0 on end
 			device pci 1d.1 on end
 			device pci 1d.4 on end
 			device pci 1d.5 on end
 			device pci 1d.7 on end
-		
+
 			device pci 1e.0 on end
-		
-			device pci 1f.0 on 
+
+			device pci 1f.0 on
 				chip superio/winbond/w83627hf
 					device pnp 2e.0 off end
 					device pnp 2e.1 off end
@@ -45,7 +45,7 @@
 			device pci 1f.6 on end
 		end
 		device pci 00.0 on end
-		device pci 00.1 on end 
+		device pci 00.1 on end
 		device pci 00.2 on end
 		device pci 02.0 on end
 		device pci 03.0 on end

Modified: trunk/src/mainboard/supermicro/x6dai_g/mptable.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dai_g/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dai_g/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -32,7 +32,7 @@
 	mc->reserved = 0;
 
 	smp_write_processors(mc);
-	
+
 	{
 		device_t dev;
 
@@ -49,7 +49,7 @@
 			bus_isa = 6;
 		}
 	}
-	
+
 	/* define bus and isa numbers */
 	for(bus_num = 0; bus_num < bus_isa; bus_num++) {
 		smp_write_bus(mc, bus_num, "PCI	  ");

Modified: trunk/src/mainboard/supermicro/x6dai_g/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dai_g/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dai_g/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -54,8 +54,8 @@
 static void main(unsigned long bist)
 {
 	/*
-	 * 
-	 * 
+	 *
+	 *
 	 */
 	static const struct mem_controller mch[] = {
 		{
@@ -116,7 +116,7 @@
 //	dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
-#if 0 // temporarily disabled 
+#if 0 // temporarily disabled
 	/* Check the first 1M */
 //	ram_check(0x00000000, 0x000100000);
 //	ram_check(0x00000000, 0x000a0000);
@@ -127,8 +127,8 @@
 #if 0
 	ram_check(0x00000000, 0x02000000);
 #endif
-	
-#if 0	
+
+#if 0
 	while(1) {
 		hlt();
 	}

Modified: trunk/src/mainboard/supermicro/x6dai_g/watchdog.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dai_g/watchdog.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dai_g/watchdog.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -18,17 +18,17 @@
 	value = pci_read_config16(dev, 0x04);
 	value |= (1 << 10);
 	pci_write_config16(dev, 0x04, value);
-	
+
 	/* Set and enable acpibase */
 	pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
 	pci_write_config8(dev, 0x44, 0x10);
 	base = ICH5_WDBASE + 0x60;
-	
+
 	/* Set bit 11 in TCO1_CNT */
 	value = inw(base + 0x08);
 	value |= 1 << 11;
 	outw(value, base + 0x08);
-	
+
 	/* Clear TCO timeout status */
 	outw(0x0008, base + 0x04);
 	outw(0x0002, base + 0x06);

Modified: trunk/src/mainboard/supermicro/x6dhe_g/debug.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g/debug.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhe_g/debug.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
-                                                                                
+
         outb(index, 0x2e);
         data = inb(0x2f);
 	print_debug("0x");
@@ -15,7 +15,7 @@
 	print_debug("\n");
         return;
 }
-        
+
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
@@ -25,7 +25,7 @@
         outb(0x01, 0x2f);
 	return;
 }
-                                                                        
+
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
@@ -43,27 +43,27 @@
         print_reg(0x75);
         return;
 }
-                                                                                
+
 static void siodump(void)
 {
         int i;
         unsigned char data;
-       
+
 	 print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
-#if 0                                                                         
+#if 0
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
-                                                                                
+
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
@@ -82,13 +82,13 @@
 	print_debug("\nGPDI 4: 0x");
 	print_debug_hex8(data);
 	print_debug("\n");
-	
-#if 0                                                                                
-                                                                                
+
+#if 0
+
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
@@ -103,11 +103,11 @@
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
-                                                                                
+
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
-#endif                                                                           
+#endif
         return;
 }
 
@@ -124,8 +124,8 @@
 static void print_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -144,7 +144,7 @@
 	int i;
 	print_debug_pci_dev(dev);
 	print_debug("\n");
-	
+
 	for(i = 0; i <= 255; i++) {
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
@@ -164,19 +164,19 @@
 {
 	int i;
 	unsigned long bar;
-	
+
 	print_debug("BAR 14 Dump\n");
-	
+
 	bar = pci_read_config32(dev, 0x14);
 	for(i = 0; i <= 0x300; i+=4) {
-#if 0		
+#if 0
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
 			print_debug_hex8(i);
 			print_debug_char(':');
 		}
 		val = pci_read_config8(dev, i);
-#endif		
+#endif
 		if((i%4)==0) {
 		print_debug("\n");
 		print_debug_hex16(i);
@@ -191,8 +191,8 @@
 static void dump_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -215,8 +215,8 @@
 		device = ctrl->channel0[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".0: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -241,8 +241,8 @@
 		device = ctrl->channel1[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".1: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -278,7 +278,7 @@
         	print_debug("\n");
                 print_debug("dimm ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 256) ; i++) {
 	                unsigned char byte;
                         if ((i % 16) == 0) {
@@ -291,7 +291,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -311,7 +311,7 @@
         	print_debug("\n");
                 print_debug("ipmi ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 8) ; i++) {
 	                unsigned char byte;
 			status = smbus_read_byte(device, 2);
@@ -319,7 +319,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -327,4 +327,4 @@
 		device += SMBUS_MEM_DEVICE_INC;
 		print_debug("\n");
 	}
-}	
+}

Modified: trunk/src/mainboard/supermicro/x6dhe_g/devicetree.cb
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhe_g/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -10,8 +10,8 @@
 			register "pirq_a_d" = "0x0b070a05"
 			register "pirq_e_h" = "0x0a808080"
 
-			device pci 1c.0 on 
-				chip drivers/generic/generic 
+			device pci 1c.0 on
+				chip drivers/generic/generic
 					device pci 01.0 on end	# onboard gige1
 					device pci 02.0 on end 	# onboard gige2
 				end
@@ -25,9 +25,9 @@
 			device pci 1d.7 on end
 
 			# VGA / PCI 32-bit
-			device pci 1e.0 on 
+			device pci 1e.0 on
 				chip drivers/generic/generic
-					device pci 01.0 on end 
+					device pci 01.0 on end
 				end
 			end
 
@@ -35,7 +35,7 @@
 			device pci 1f.0 on 	# ISA bridge
 				chip superio/winbond/w83627hf
 					device pnp 2e.0 off end
-					device pnp 2e.2 on 
+					device pnp 2e.2 on
 						 io 0x60 = 0x3f8
 						irq 0x70 = 4
 					end
@@ -62,17 +62,17 @@
 		device pci 00.0	on end	# Northbridge
 		device pci 00.1	on end  # Northbridge Error reporting
 		device pci 01.0 on end
-		device pci 02.0 on 
-			chip southbridge/intel/pxhd	# PXHD 6700 
-				device pci 00.0 on end   # bridge 
+		device pci 02.0 on
+			chip southbridge/intel/pxhd	# PXHD 6700
+				device pci 00.0 on end   # bridge
 				device pci 00.1 on end   # I/O apic
 				device pci 00.2 on end   # bridge
 				device pci 00.3 on end   # I/O apic
 			end
 		end
-#	 	device register "intrline" = "0x00070105" 
-		device 	pci 04.0 on end	
-		device 	pci 06.0 on end	
+#	 	device register "intrline" = "0x00070105"
+		device 	pci 04.0 on end
+		device 	pci 06.0 on end
 	end
 
 	device apic_cluster 0 on

Modified: trunk/src/mainboard/supermicro/x6dhe_g/mptable.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhe_g/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -35,7 +35,7 @@
 	mc->reserved = 0;
 
 	smp_write_processors(mc);
-	
+
 	{
 		device_t dev;
 
@@ -75,7 +75,7 @@
 			bus_pxhd_2 = 3;
 		}
 	}
-	
+
 	/* define bus and isa numbers */
 	for(bus_num = 0; bus_num < bus_isa; bus_num++) {
 		smp_write_bus(mc, bus_num, "PCI	  ");
@@ -162,7 +162,7 @@
 		bus_esb6300_2, 0x04, 0x02, 0x10);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
 		bus_esb6300_2, 0x08, 0x02, 0x14);
-	
+
 	/* Standard local interrupt assignments */
 	smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
 		bus_isa, 0x00, MP_APIC_ALL, 0x00);

Modified: trunk/src/mainboard/supermicro/x6dhe_g/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhe_g/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -55,8 +55,8 @@
 static void main(unsigned long bist)
 {
 	/*
-	 * 
-	 * 
+	 *
+	 *
 	 */
 	static const struct mem_controller mch[] = {
 		{
@@ -118,7 +118,7 @@
 #endif
 	disable_watchdogs();
 //	dump_ipmi_registers();
-//	mainboard_set_e7520_leds();	
+//	mainboard_set_e7520_leds();
 	sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
 	dump_pci_devices();
@@ -128,7 +128,7 @@
 	dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
-#if 0 // temporarily disabled 
+#if 0 // temporarily disabled
 	/* Check the first 1M */
 //	ram_check(0x00000000, 0x000100000);
 //	ram_check(0x00000000, 0x000a0000);
@@ -139,8 +139,8 @@
 #if 0
 	ram_check(0x00000000, 0x02000000);
 #endif
-	
-#if 0	
+
+#if 0
 	while(1) {
 		hlt();
 	}

Modified: trunk/src/mainboard/supermicro/x6dhe_g/watchdog.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g/watchdog.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhe_g/watchdog.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -31,17 +31,17 @@
 	value = pci_read_config16(dev, 0x04);
 	value |= (1 << 10);
 	pci_write_config16(dev, 0x04, value);
-	
+
 	/* Set and enable acpibase */
 	pci_write_config32(dev, 0x40, ESB6300_WDBASE | 1);
 	pci_write_config8(dev, 0x44, 0x10);
 	base = ESB6300_WDBASE + 0x60;
-	
+
 	/* Set bit 11 in TCO1_CNT */
 	value = inw(base + 0x08);
 	value |= 1 << 11;
 	outw(value, base + 0x08);
-	
+
 	/* Clear TCO timeout status */
 	outw(0x0008, base + 0x04);
 	outw(0x0002, base + 0x06);
@@ -86,7 +86,7 @@
 	outl(value, base + 0x38);
 	value &= ~(1 << 16);
 	outl(value, base + 0x38);
-#endif				  
+#endif
 }
 
 static void disable_watchdogs(void)

Modified: trunk/src/mainboard/supermicro/x6dhe_g/x6dhe_g_fixups.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g/x6dhe_g_fixups.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhe_g/x6dhe_g_fixups.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -9,13 +9,13 @@
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {
-	return; 
+	return;
 }
 
 
 static void mainboard_set_e7520_leds(void)
 {
-	return; 
+	return;
 }
 
 

Modified: trunk/src/mainboard/supermicro/x6dhe_g2/debug.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g2/debug.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhe_g2/debug.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
-                                                                                
+
         outb(index, 0x2e);
         data = inb(0x2f);
 	print_debug("0x");
@@ -15,7 +15,7 @@
 	print_debug("\n");
         return;
 }
-        
+
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
@@ -25,7 +25,7 @@
         outb(0x01, 0x2f);
 	return;
 }
-                                                                        
+
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
@@ -43,27 +43,27 @@
         print_reg(0x75);
         return;
 }
-                                                                                
+
 static void siodump(void)
 {
         int i;
         unsigned char data;
-       
+
 	 print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
-#if 0                                                                         
+#if 0
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
-                                                                                
+
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
@@ -82,13 +82,13 @@
 	print_debug("\nGPDI 4: 0x");
 	print_debug_hex8(data);
 	print_debug("\n");
-	
-#if 0                                                                                
-                                                                                
+
+#if 0
+
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
@@ -103,11 +103,11 @@
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
-                                                                                
+
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
-#endif                                                                           
+#endif
         return;
 }
 
@@ -124,8 +124,8 @@
 static void print_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -144,7 +144,7 @@
 	int i;
 	print_debug_pci_dev(dev);
 	print_debug("\n");
-	
+
 	for(i = 0; i <= 255; i++) {
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
@@ -164,19 +164,19 @@
 {
 	int i;
 	unsigned long bar;
-	
+
 	print_debug("BAR 14 Dump\n");
-	
+
 	bar = pci_read_config32(dev, 0x14);
 	for(i = 0; i <= 0x300; i+=4) {
-#if 0		
+#if 0
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
 			print_debug_hex8(i);
 			print_debug_char(':');
 		}
 		val = pci_read_config8(dev, i);
-#endif		
+#endif
 		if((i%4)==0) {
 		print_debug("\n");
 		print_debug_hex16(i);
@@ -191,8 +191,8 @@
 static void dump_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -215,8 +215,8 @@
 		device = ctrl->channel0[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".0: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -241,8 +241,8 @@
 		device = ctrl->channel1[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".1: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -278,7 +278,7 @@
         	print_debug("\n");
                 print_debug("dimm ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 256) ; i++) {
 	                unsigned char byte;
                         if ((i % 16) == 0) {
@@ -291,7 +291,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -311,7 +311,7 @@
         	print_debug("\n");
                 print_debug("ipmi ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 8) ; i++) {
 	                unsigned char byte;
 			status = smbus_read_byte(device, 2);
@@ -319,7 +319,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -327,4 +327,4 @@
 		device += SMBUS_MEM_DEVICE_INC;
 		print_debug("\n");
 	}
-}	
+}

Modified: trunk/src/mainboard/supermicro/x6dhe_g2/devicetree.cb
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g2/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhe_g2/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -6,12 +6,12 @@
 		device pnp 00.3 off end
 	end
 	device pci_domain 0 on
-		chip southbridge/intel/i82801ex	# ICH5R 
+		chip southbridge/intel/i82801ex	# ICH5R
 			register "pirq_a_d" = "0x0b070a05"
 			register "pirq_e_h" = "0x0a808080"
 
-			device pci 1c.0 on 
-				chip drivers/generic/generic 
+			device pci 1c.0 on
+				chip drivers/generic/generic
 					device pci 01.0 on end	# onboard gige1
 					device pci 02.0 on end 	# onboard gige2
 				end
@@ -25,9 +25,9 @@
 			device pci 1d.7 on end
 
 			# VGA / PCI 32-bit
-			device pci 1e.0 on 
+			device pci 1e.0 on
 				chip drivers/generic/generic
-					device pci 01.0 on end 
+					device pci 01.0 on end
 				end
 			end
 
@@ -35,7 +35,7 @@
 			device pci 1f.0 on 	# ISA bridge
 				chip superio/nsc/pc87427
 					device pnp 2e.0 off end
-					device pnp 2e.2 on 
+					device pnp 2e.2 on
 						 io 0x60 = 0x3f8
 						irq 0x70 = 4
 					end
@@ -62,17 +62,17 @@
 		device pci 00.0	on end	# Northbridge
 		device pci 00.1	on end  # Northbridge Error reporting
 		device pci 01.0 on end
-		device pci 02.0 on 
-			chip southbridge/intel/pxhd	# PXHD 6700 
-				device pci 00.0 on end   # bridge 
+		device pci 02.0 on
+			chip southbridge/intel/pxhd	# PXHD 6700
+				device pci 00.0 on end   # bridge
 				device pci 00.1 on end   # I/O apic
 				device pci 00.2 on end   # bridge
 				device pci 00.3 on end   # I/O apic
 			end
 		end
-#	 	device register "intrline" = "0x00070105" 
-		device 	pci 04.0 on end	
-		device 	pci 06.0 on end	
+#	 	device register "intrline" = "0x00070105"
+		device 	pci 04.0 on end
+		device 	pci 06.0 on end
 	end
 
 	device apic_cluster 0 on

Modified: trunk/src/mainboard/supermicro/x6dhe_g2/mptable.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g2/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhe_g2/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -35,7 +35,7 @@
 	mc->reserved = 0;
 
 	smp_write_processors(mc);
-	
+
 	{
 		device_t dev;
 
@@ -75,7 +75,7 @@
 			bus_pxhd_2 = 3;
 		}
 	}
-	
+
 	/* define bus and isa numbers */
 	for(bus_num = 0; bus_num < bus_isa; bus_num++) {
 		smp_write_bus(mc, bus_num, "PCI	  ");
@@ -162,7 +162,7 @@
 		bus_esb6300_2, 0x04, 0x02, 0x10);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
 		bus_esb6300_2, 0x08, 0x02, 0x14);
-	
+
 	/* Standard local interrupt assignments */
 	smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
 		bus_isa, 0x00, MP_APIC_ALL, 0x00);

Modified: trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhe_g2/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -53,8 +53,8 @@
 static void main(unsigned long bist)
 {
 	/*
-	 * 
-	 * 
+	 *
+	 *
 	 */
 	static const struct mem_controller mch[] = {
 		{
@@ -117,7 +117,7 @@
 #endif
 	disable_watchdogs();
 //	dump_ipmi_registers();
-//	mainboard_set_e7520_leds();	
+//	mainboard_set_e7520_leds();
 	sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
 	dump_pci_devices();
@@ -127,7 +127,7 @@
 	//dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
-#if 0 // temporarily disabled 
+#if 0 // temporarily disabled
 	/* Check the first 1M */
 //	ram_check(0x00000000, 0x000100000);
 //	ram_check(0x00000000, 0x000a0000);
@@ -138,8 +138,8 @@
 #if 0
 	ram_check(0x00000000, 0x02000000);
 #endif
-	
-#if 0	
+
+#if 0
 	while(1) {
 		hlt();
 	}

Modified: trunk/src/mainboard/supermicro/x6dhe_g2/watchdog.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g2/watchdog.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhe_g2/watchdog.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -31,17 +31,17 @@
 	value = pci_read_config16(dev, 0x04);
 	value |= (1 << 10);
 	pci_write_config16(dev, 0x04, value);
-	
+
 	/* Set and enable acpibase */
 	pci_write_config32(dev, 0x40, ESB6300_WDBASE | 1);
 	pci_write_config8(dev, 0x44, 0x10);
 	base = ESB6300_WDBASE + 0x60;
-	
+
 	/* Set bit 11 in TCO1_CNT */
 	value = inw(base + 0x08);
 	value |= 1 << 11;
 	outw(value, base + 0x08);
-	
+
 	/* Clear TCO timeout status */
 	outw(0x0008, base + 0x04);
 	outw(0x0002, base + 0x06);
@@ -86,7 +86,7 @@
 	outl(value, base + 0x38);
 	value &= ~(1 << 16);
 	outl(value, base + 0x38);
-#endif				  
+#endif
 }
 
 static void disable_watchdogs(void)

Modified: trunk/src/mainboard/supermicro/x6dhe_g2/x6dhe_g2_fixups.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhe_g2/x6dhe_g2_fixups.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhe_g2/x6dhe_g2_fixups.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -9,13 +9,13 @@
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {
-	return; 
+	return;
 }
 
 
 static void mainboard_set_e7520_leds(void)
 {
-	return; 
+	return;
 }
 
 

Modified: trunk/src/mainboard/supermicro/x6dhr_ig/debug.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig/debug.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhr_ig/debug.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
-                                                                                
+
         outb(index, 0x2e);
         data = inb(0x2f);
 	print_debug("0x");
@@ -15,7 +15,7 @@
 	print_debug("\n");
         return;
 }
-        
+
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
@@ -25,7 +25,7 @@
         outb(0x01, 0x2f);
 	return;
 }
-                                                                        
+
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
@@ -43,27 +43,27 @@
         print_reg(0x75);
         return;
 }
-                                                                                
+
 static void siodump(void)
 {
         int i;
         unsigned char data;
-       
+
 	 print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
-#if 0                                                                         
+#if 0
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
-                                                                                
+
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
@@ -82,13 +82,13 @@
 	print_debug("\nGPDI 4: 0x");
 	print_debug_hex8(data);
 	print_debug("\n");
-	
-#if 0                                                                                
-                                                                                
+
+#if 0
+
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
@@ -103,11 +103,11 @@
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
-                                                                                
+
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
-#endif                                                                           
+#endif
         return;
 }
 
@@ -124,8 +124,8 @@
 static void print_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -144,7 +144,7 @@
 	int i;
 	print_debug_pci_dev(dev);
 	print_debug("\n");
-	
+
 	for(i = 0; i <= 255; i++) {
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
@@ -164,19 +164,19 @@
 {
 	int i;
 	unsigned long bar;
-	
+
 	print_debug("BAR 14 Dump\n");
-	
+
 	bar = pci_read_config32(dev, 0x14);
 	for(i = 0; i <= 0x300; i+=4) {
-#if 0		
+#if 0
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
 			print_debug_hex8(i);
 			print_debug_char(':');
 		}
 		val = pci_read_config8(dev, i);
-#endif		
+#endif
 		if((i%4)==0) {
 		print_debug("\n");
 		print_debug_hex16(i);
@@ -191,8 +191,8 @@
 static void dump_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -215,8 +215,8 @@
 		device = ctrl->channel0[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".0: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -241,8 +241,8 @@
 		device = ctrl->channel1[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".1: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -278,7 +278,7 @@
         	print_debug("\n");
                 print_debug("dimm ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 256) ; i++) {
 	                unsigned char byte;
                         if ((i % 16) == 0) {
@@ -291,7 +291,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -311,7 +311,7 @@
         	print_debug("\n");
                 print_debug("ipmi ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 8) ; i++) {
 	                unsigned char byte;
 			status = smbus_read_byte(device, 2);
@@ -319,7 +319,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -327,4 +327,4 @@
 		device += SMBUS_MEM_DEVICE_INC;
 		print_debug("\n");
 	}
-}	
+}

Modified: trunk/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhr_ig/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,21 +1,21 @@
 chip northbridge/intel/e7520 # mch
-	device pci_domain 0 on 
+	device pci_domain 0 on
 		chip southbridge/intel/i82801ex # i82801er
 			# USB ports
 			device pci 1d.0 on end
 			device pci 1d.1 on end
-			device pci 1d.2 on end 
+			device pci 1d.2 on end
 			device pci 1d.3 on end
 			device pci 1d.7 on end
-		
+
 			# -> VGA
 			device pci 1e.0 on end
-		
+
 			# -> IDE
-			device pci 1f.0 on 
+			device pci 1f.0 on
 				chip superio/winbond/w83627hf
 					device pnp 2e.0 off end
-					device pnp 2e.2 on 
+					device pnp 2e.2 on
 						 io 0x60 = 0x3f8
 						irq 0x70 = 4
 					end
@@ -39,18 +39,18 @@
 			register "pirq_a_d" = "0x0b070a05"
 			register "pirq_e_h" = "0x0a808080"
 		end
-		device pci 00.0 on end 
+		device pci 00.0 on end
 		device pci 00.1  on end
-		device pci 01.0 on end 
-		device pci 02.0 on end 
-		device pci 03.0 on 
+		device pci 01.0 on end
+		device pci 02.0 on end
+		device pci 03.0 on
 			chip southbridge/intel/pxhd # pxhd1
 				# Bus bridges and ioapics usually bus 2
 				device pci 0.0 on end
 				device pci 0.1 on end
-				device pci 0.2 on 
+				device pci 0.2 on
 				# On board gig e1000
-					chip drivers/generic/generic 
+					chip drivers/generic/generic
         		        	        device pci 02.0 on end
         		        	        device pci 02.1 on end
         		        	end
@@ -58,7 +58,7 @@
 				device pci 0.3 on end
 			end
 		end
-		device pci 04.0 on 
+		device pci 04.0 on
 			chip southbridge/intel/pxhd # pxhd2
 				# Bus bridges and ioapics usually bus 5
 				device pci 0.0 on end

Modified: trunk/src/mainboard/supermicro/x6dhr_ig/mptable.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhr_ig/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -36,7 +36,7 @@
 	mc->reserved = 0;
 
 	smp_write_processors(mc);
-	
+
 	{
 		device_t dev;
 
@@ -98,9 +98,9 @@
 
 			bus_pxhd_4 = 7;
 		}
-	
+
 	}
-	
+
 	/* define bus and isa numbers */
 	for(bus_num = 0; bus_num < bus_isa; bus_num++) {
 		smp_write_bus(mc, bus_num, "PCI	  ");
@@ -159,7 +159,7 @@
 		}
 	}
 
-	
+
 	/* ISA backward compatibility interrupts  */
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
 		bus_isa, 0x00, 0x02, 0x00);

Modified: trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhr_ig/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -54,8 +54,8 @@
 static void main(unsigned long bist)
 {
 	/*
-	 * 
-	 * 
+	 *
+	 *
 	 */
 	static const struct mem_controller mch[] = {
 		{
@@ -117,7 +117,7 @@
 #endif
 	disable_watchdogs();
 //	dump_ipmi_registers();
-	mainboard_set_e7520_leds();	
+	mainboard_set_e7520_leds();
 	sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 1
 	dump_pci_devices();
@@ -127,7 +127,7 @@
 	dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
-#if 0 // temporarily disabled 
+#if 0 // temporarily disabled
 	/* Check the first 1M */
 //	ram_check(0x00000000, 0x000100000);
 //	ram_check(0x00000000, 0x000a0000);
@@ -139,8 +139,8 @@
 #if 0
 	ram_check(0x00000000, 0x02000000);
 #endif
-	
-#if 0	
+
+#if 0
 	while(1) {
 		hlt();
 	}

Modified: trunk/src/mainboard/supermicro/x6dhr_ig/watchdog.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig/watchdog.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhr_ig/watchdog.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -31,17 +31,17 @@
 	value = pci_read_config16(dev, 0x04);
 	value |= (1 << 10);
 	pci_write_config16(dev, 0x04, value);
-	
+
 	/* Set and enable acpibase */
 	pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
 	pci_write_config8(dev, 0x44, 0x10);
 	base = ICH5_WDBASE + 0x60;
-	
+
 	/* Set bit 11 in TCO1_CNT */
 	value = inw(base + 0x08);
 	value |= 1 << 11;
 	outw(value, base + 0x08);
-	
+
 	/* Clear TCO timeout status */
 	outw(0x0008, base + 0x04);
 	outw(0x0002, base + 0x06);
@@ -86,7 +86,7 @@
 	outl(value, base + 0x38);
 	value &= ~(1 << 16);
 	outl(value, base + 0x38);
-#endif				  
+#endif
 }
 
 static void disable_watchdogs(void)

Modified: trunk/src/mainboard/supermicro/x6dhr_ig/x6dhr_fixups.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig/x6dhr_fixups.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhr_ig/x6dhr_fixups.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -9,13 +9,13 @@
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {
-	return; 
+	return;
 }
 
 
 static void mainboard_set_e7520_leds(void)
 {
-	return; 
+	return;
 }
 
 

Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/debug.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig2/debug.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhr_ig2/debug.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
 static void print_reg(unsigned char index)
 {
         unsigned char data;
-                                                                                
+
         outb(index, 0x2e);
         data = inb(0x2f);
 	print_debug("0x");
@@ -15,7 +15,7 @@
 	print_debug("\n");
         return;
 }
-        
+
 static void xbus_en(void)
 {
         /* select the XBUS function in the SIO */
@@ -25,7 +25,7 @@
         outb(0x01, 0x2f);
 	return;
 }
-                                                                        
+
 static void setup_func(unsigned char func)
 {
         /* select the function in the SIO */
@@ -43,27 +43,27 @@
         print_reg(0x75);
         return;
 }
-                                                                                
+
 static void siodump(void)
 {
         int i;
         unsigned char data;
-       
+
 	 print_debug("\n*** SERVER I/O REGISTERS ***\n");
         for (i=0x10; i<=0x2d; i++) {
                 print_reg((unsigned char)i);
         }
-#if 0                                                                         
+#if 0
         print_debug("\n*** XBUS REGISTERS ***\n");
         setup_func(0x0f);
         for (i=0xf0; i<=0xff; i++) {
                 print_reg((unsigned char)i);
         }
-                                                                                
+
         print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
         setup_func(0x03);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
         setup_func(0x02);
         print_reg(0xf0);
@@ -82,13 +82,13 @@
 	print_debug("\nGPDI 4: 0x");
 	print_debug_hex8(data);
 	print_debug("\n");
-	
-#if 0                                                                                
-                                                                                
+
+#if 0
+
         print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
         setup_func(0x0a);
         print_reg(0xf0);
-                                                                                
+
         print_debug("\n***  FAN CONTROL REGISTERS ***\n");
         setup_func(0x09);
         print_reg(0xf0);
@@ -103,11 +103,11 @@
         print_reg(0xf7);
         print_reg(0xfe);
         print_reg(0xff);
-                                                                                
+
         print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
         setup_func(0x14);
         print_reg(0xf0);
-#endif                                                                           
+#endif
         return;
 }
 
@@ -124,8 +124,8 @@
 static void print_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -144,7 +144,7 @@
 	int i;
 	print_debug_pci_dev(dev);
 	print_debug("\n");
-	
+
 	for(i = 0; i <= 255; i++) {
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
@@ -164,19 +164,19 @@
 {
 	int i;
 	unsigned long bar;
-	
+
 	print_debug("BAR 14 Dump\n");
-	
+
 	bar = pci_read_config32(dev, 0x14);
 	for(i = 0; i <= 0x300; i+=4) {
-#if 0		
+#if 0
 		unsigned char val;
 		if ((i & 0x0f) == 0) {
 			print_debug_hex8(i);
 			print_debug_char(':');
 		}
 		val = pci_read_config8(dev, i);
-#endif		
+#endif
 		if((i%4)==0) {
 		print_debug("\n");
 		print_debug_hex16(i);
@@ -191,8 +191,8 @@
 static void dump_pci_devices(void)
 {
 	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0); 
-		dev <= PCI_DEV(0, 0x1f, 0x7); 
+	for(dev = PCI_DEV(0, 0, 0);
+		dev <= PCI_DEV(0, 0x1f, 0x7);
 		dev += PCI_DEV(0,0,1)) {
 		uint32_t id;
 		id = pci_read_config32(dev, PCI_VENDOR_ID);
@@ -215,8 +215,8 @@
 		device = ctrl->channel0[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".0: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -241,8 +241,8 @@
 		device = ctrl->channel1[i];
 		if (device) {
 			int j;
-			print_debug("dimm: "); 
-			print_debug_hex8(i); 
+			print_debug("dimm: ");
+			print_debug_hex8(i);
 			print_debug(".1: ");
 			print_debug_hex8(device);
 			for(j = 0; j < 256; j++) {
@@ -278,7 +278,7 @@
         	print_debug("\n");
                 print_debug("dimm ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 256) ; i++) {
 	                unsigned char byte;
                         if ((i % 16) == 0) {
@@ -291,7 +291,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -311,7 +311,7 @@
         	print_debug("\n");
                 print_debug("ipmi ");
 		print_debug_hex8(device);
-		
+
                 for(i = 0; (i < 8) ; i++) {
 	                unsigned char byte;
 			status = smbus_read_byte(device, 2);
@@ -319,7 +319,7 @@
 			         print_debug("bad device: ");
 				 print_debug_hex8(-status);
 				 print_debug("\n");
-			         break; 
+			         break;
 			}
 			print_debug_hex8(status);
 			print_debug_char(' ');
@@ -327,4 +327,4 @@
 		device += SMBUS_MEM_DEVICE_INC;
 		print_debug("\n");
 	}
-}	
+}

Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,21 +1,21 @@
 chip northbridge/intel/e7520 # mch
-	device pci_domain 0 on 
+	device pci_domain 0 on
 		chip southbridge/intel/i82801ex # i82801er
 			# USB ports
 			device pci 1d.0 on end
 			device pci 1d.1 on end
-			device pci 1d.2 on end 
+			device pci 1d.2 on end
 			device pci 1d.3 on end
 			device pci 1d.7 on end
-		
+
 			# -> Bridge
 			device pci 1e.0 on end
-		
+
 			# -> ISA
-			device pci 1f.0 on 
+			device pci 1f.0 on
 				chip superio/winbond/w83627hf
 					device pnp 2e.0 off end
-					device pnp 2e.2 on 
+					device pnp 2e.2 on
 						 io 0x60 = 0x3f8
 						irq 0x70 = 4
 					end
@@ -34,22 +34,22 @@
 			end
 			# -> IDE
 			device pci 1f.1 on end
-			# -> SATA 
+			# -> SATA
 			device pci 1f.2 on end
 			device pci 1f.3 on end
 
 			register "pirq_a_d" = "0x0b070a05"
 			register "pirq_e_h" = "0x0a808080"
 		end
-		device pci 00.0 on end 
+		device pci 00.0 on end
 		device pci 00.1 on end
-		device pci 01.0 on end 
-		device pci 02.0 on 
+		device pci 01.0 on end
+		device pci 02.0 on
 			chip southbridge/intel/pxhd # pxhd1
 				# Bus bridges and ioapics usually bus 1
-				device pci 0.0 on 
+				device pci 0.0 on
 				# On board gig e1000
-					chip drivers/generic/generic 
+					chip drivers/generic/generic
         		        	        device pci 03.0 on end
         		        	        device pci 03.1 on end
         		        	end

Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/mptable.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig2/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhr_ig2/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -36,7 +36,7 @@
 	mc->reserved = 0;
 
 	smp_write_processors(mc);
-	
+
 	{
 		device_t dev;
 
@@ -98,9 +98,9 @@
 
 			bus_pxhd_4 = 6;
 		}
-	
+
 	}
-	
+
 	/* define bus and isa numbers */
 	for(bus_num = 0; bus_num < bus_isa; bus_num++) {
 		smp_write_bus(mc, bus_num, "PCI	  ");
@@ -135,7 +135,7 @@
 		else {
 			printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
 		}
-	}	
+	}
 	/* ISA backward compatibility interrupts  */
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
 		bus_isa, 0x00, 0x02, 0x00);

Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhr_ig2/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -54,8 +54,8 @@
 static void main(unsigned long bist)
 {
 	/*
-	 * 
-	 * 
+	 *
+	 *
 	 */
 	static const struct mem_controller mch[] = {
 		{
@@ -117,7 +117,7 @@
 #endif
 	disable_watchdogs();
 //	dump_ipmi_registers();
-	mainboard_set_e7520_leds();	
+	mainboard_set_e7520_leds();
 	sdram_initialize(ARRAY_SIZE(mch), mch);
 #if 0
 	dump_pci_devices();
@@ -127,7 +127,7 @@
 	dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
 
-#if 0 // temporarily disabled 
+#if 0 // temporarily disabled
 	/* Check the first 1M */
 //	ram_check(0x00000000, 0x000100000);
 //	ram_check(0x00000000, 0x000a0000);
@@ -139,8 +139,8 @@
 #if 0
 	ram_check(0x00000000, 0x02000000);
 #endif
-	
-#if 0	
+
+#if 0
 	while(1) {
 		hlt();
 	}

Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/watchdog.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig2/watchdog.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhr_ig2/watchdog.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -31,17 +31,17 @@
 	value = pci_read_config16(dev, 0x04);
 	value |= (1 << 10);
 	pci_write_config16(dev, 0x04, value);
-	
+
 	/* Set and enable acpibase */
 	pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
 	pci_write_config8(dev, 0x44, 0x10);
 	base = ICH5_WDBASE + 0x60;
-	
+
 	/* Set bit 11 in TCO1_CNT */
 	value = inw(base + 0x08);
 	value |= 1 << 11;
 	outw(value, base + 0x08);
-	
+
 	/* Clear TCO timeout status */
 	outw(0x0008, base + 0x04);
 	outw(0x0002, base + 0x06);
@@ -86,7 +86,7 @@
 	outl(value, base + 0x38);
 	value &= ~(1 << 16);
 	outl(value, base + 0x38);
-#endif				  
+#endif
 }
 
 static void disable_watchdogs(void)

Modified: trunk/src/mainboard/supermicro/x6dhr_ig2/x6dhr2_fixups.c
==============================================================================
--- trunk/src/mainboard/supermicro/x6dhr_ig2/x6dhr2_fixups.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/supermicro/x6dhr_ig2/x6dhr2_fixups.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -9,13 +9,13 @@
 
 static void mainboard_set_e7520_pll(unsigned bits)
 {
-	return; 
+	return;
 }
 
 
 static void mainboard_set_e7520_leds(void)
 {
-	return; 
+	return;
 }
 
 

Modified: trunk/src/mainboard/technexion/Kconfig
==============================================================================
--- trunk/src/mainboard/technexion/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/technexion/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_TECHNEXION
-        
+
 source "src/mainboard/technexion/tim8690/Kconfig"
 source "src/mainboard/technexion/tim5690/Kconfig"
 

Modified: trunk/src/mainboard/technexion/tim5690/mainboard.c
==============================================================================
--- trunk/src/mainboard/technexion/tim5690/mainboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/technexion/tim5690/mainboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -184,7 +184,7 @@
         it8712f_enter_conf();
         outb(IT8712F_CONFIG_REG_LDN, SIO_INDEX);
         outb(IT8712F_GPIO, SIO_DATA);
-        outb(0x62, SIO_INDEX); 
+        outb(0x62, SIO_INDEX);
         outb((*iobase >> 8), SIO_DATA);
         outb(0x63, SIO_INDEX);
         outb((*iobase & 0xff), SIO_DATA);

Modified: trunk/src/mainboard/technexion/tim5690/speaker.c
==============================================================================
--- trunk/src/mainboard/technexion/tim5690/speaker.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/technexion/tim5690/speaker.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -54,7 +54,7 @@
     * CounterSelect, bit[7:6]=10b, Select counter 2.
     */
    outb(0xb6, 0x43);
-   
+
 
    /* SB600 RRG.
     * TimerCh2- RW - 8 bits - [IO_Reg: 42h].

Modified: trunk/src/mainboard/technexion/tim8690/mainboard.c
==============================================================================
--- trunk/src/mainboard/technexion/tim8690/mainboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/technexion/tim8690/mainboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -48,7 +48,7 @@
 
 /***************************************************
 * This board, the TIM-8690 has two Marvel 88e5056 PCI-E
-* 10/100/1000 chips on board. 
+* 10/100/1000 chips on board.
 * Both of their pin PERSTn pins are connected to GPIO 5 of the
 * SB600 southbridge.
 ****************************************************/

Modified: trunk/src/mainboard/technologic/Kconfig
==============================================================================
--- trunk/src/mainboard/technologic/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/technologic/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_TECHNOLOGIC
-        
+
 source "src/mainboard/technologic/ts5300/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/technologic/ts5300/chip.h
==============================================================================
--- trunk/src/mainboard/technologic/ts5300/chip.h	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/technologic/ts5300/chip.h	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,5 +1,5 @@
 extern struct chip_operations mainboard_ops;
 
 struct mainboard_config {
-	
+
 };

Modified: trunk/src/mainboard/technologic/ts5300/devicetree.cb
==============================================================================
--- trunk/src/mainboard/technologic/ts5300/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/technologic/ts5300/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 chip cpu/amd/sc520
-	device pci_domain 0 on 
+	device pci_domain 0 on
 		device pci 0.0 on end
-	
+
 #		register "com1" = "{1}"
 #		register "com1" = "{1, 0, 0x3f8, 4}"
 	end

Modified: trunk/src/mainboard/technologic/ts5300/irq_tables.c
==============================================================================
--- trunk/src/mainboard/technologic/ts5300/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/technologic/ts5300/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
  * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
  *

Modified: trunk/src/mainboard/technologic/ts5300/mainboard.c
==============================================================================
--- trunk/src/mainboard/technologic/ts5300/mainboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/technologic/ts5300/mainboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -17,10 +17,10 @@
   int i;
   int irqlist[] = {0xd00, 0xd02, 0xd03, 0xd04, 0xd08, 0xd0a,
 	        0xd14, 0xd18, 0xd1a, 0xd1b, 0xd1c,
-		0xd20, 0xd21, 0xd22, 0xd28, 0xd29, 
+		0xd20, 0xd21, 0xd22, 0xd28, 0xd29,
 		0xd30, 0xd31, 0xd32, 0xd33,
-		0xd40, 0xd41, 0xd42, 0xd43,0xd44, 0xd45, 0xd46, 
-		0xd50, 0xd51, 0xd52, 0xd53,0xd54, 0xd55, 0xd56, 0xd57,0xd58, 0xd59, 0xd5a, 
+		0xd40, 0xd41, 0xd42, 0xd43,0xd44, 0xd45, 0xd46,
+		0xd50, 0xd51, 0xd52, 0xd53,0xd54, 0xd55, 0xd56, 0xd57,0xd58, 0xd59, 0xd5a,
 		-1};
   mmcr = (void *) 0xfffef000;
 
@@ -44,7 +44,7 @@
 
 	/* from fuctory bios */
 	/* NOTE: the following interrupt settings made interrupts work
-	 * for hard drive, and serial, but not for ethernet 
+	 * for hard drive, and serial, but not for ethernet
 	 */
 
 	printk(BIOS_ERR, "Setting up PIC\n");
@@ -63,7 +63,7 @@
 	mmcr->pic.rtcmap  = 0x03;
 	mmcr->pic.ferrmap = 0x00;
 	mmcr->pic.intpinpol = 0x100;
-	
+
 	mmcr->pic.gp0imap = 0x00;
 	mmcr->pic.gp1imap = 0x02;
 	mmcr->pic.gp2imap = 0x07;
@@ -83,7 +83,7 @@
 	mmcr->sysarb.ctl = 0x00;
 	mmcr->sysarb.menb = 0x1f;
 	mmcr->sysarb.prictl = 0x40000f0f;
-	
+
 	/* this is bios setting, depends on sysarb above */
 	mmcr->hostbridge.ctl = 0x0;
 	mmcr->hostbridge.tgtirqctl = 0x0;
@@ -125,7 +125,7 @@
 	mmcr->gpctl.gprdoff = 0x02;
 	mmcr->gpctl.gpwrw = 0x07;
 	mmcr->gpctl.gpwroff = 0x02;
-	
+
 	//mmcr->reset.sysinfo = 0xdf;
 	//mmcr->reset.rescfg = 0x5;
 	/* their IRQ table is wrong. Just hardwire it */

Modified: trunk/src/mainboard/technologic/ts5300/romstage.c
==============================================================================
--- trunk/src/mainboard/technologic/ts5300/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/technologic/ts5300/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -52,7 +52,7 @@
 static void identify_ts9500(void)
 {
 	unsigned i, val;
-	
+
 	TS9500_LED_ON;
 
 	print_err("TS-9500 add-on found:\n");
@@ -61,23 +61,23 @@
 		print_err("  DIP");
 		print_err_char(i+0x31);
 		print_err(": ");
-		if((val&(1<<i))!=0) 
-			print_err("on\n"); 
+		if((val&(1<<i))!=0)
+			print_err("on\n");
 		else
-			print_err("off\n"); 
+			print_err("off\n");
 	}
 	print_err("\n");
-	
+
 	val=inb(0x19a);
-	
+
 	for (i=6; i<8; i++) {
 		print_err("  JP");
 		print_err_char(i+0x30-5);
 		print_err(": ");
-		if((val&(1<<i))!=0) 
-			print_err("on\n"); 
+		if((val&(1<<i))!=0)
+			print_err("on\n");
 		else
-			print_err("off\n"); 
+			print_err("off\n");
 	}
 	print_err("\n");
 
@@ -103,33 +103,33 @@
 	print_err("  SRAM option:   ");
 	if((val&1)==0) print_err("not ");
 	print_err("installed\n");
-	
+
 	print_err("  RS-485 option: ");
 	if((val&2)==0) print_err("not ");
 	print_err("installed\n");
 
 	val=inb(0x76);
 	print_err("  Temp. range:   ");
-	if((val&2)==0) print_err("commercial\n"); 
+	if((val&2)==0) print_err("commercial\n");
 	else print_err("industrial\n");
-	
+
 	print_err("\n");
-	
+
 	val=inb(0x77);
 	for (i=1; i<8; i++) {
 		print_err("  JP");
 		print_err_char(i+0x30);
 		print_err(": ");
-		if((val&(1<<i))!=0) 
-			print_err("on\n"); 
+		if((val&(1<<i))!=0)
+			print_err("on\n");
 		else
-			print_err("off\n"); 
+			print_err("off\n");
 	}
 	print_err("\n");
 
 	/* Detect TS-9500 */
 	val=inb(0x19d);
-	if(val==0x5f) 
+	if(val==0x5f)
 		identify_ts9500();
 
 }
@@ -144,18 +144,18 @@
 {
 	volatile int i;
 	unsigned val;
-	
+
 	TS5300_LED_ON;
-	
+
 	// Let the hardware settle a bit.
 	for(i = 0; i < 100; i++)
 		;
-	
+
         setupsc520();
         uart_init();
         console_init();
-	
-	
+
+
 	print_err("Technologic Systems TS5300 - http://www.embeddedx86.com/\n");
 	staticmem();
 	print_err("Memory initialized: 32MB\n");
@@ -170,7 +170,7 @@
 	ram_check(0x00000000, 0x000a0000);
 	ram_check(0x000b0000, 0x02000000);
 #endif
-	
+
 	TS5300_LED_OFF;
 }
 

Modified: trunk/src/mainboard/thomson/Kconfig
==============================================================================
--- trunk/src/mainboard/thomson/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/thomson/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,7 +1,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_THOMSON
-        
+
 source "src/mainboard/thomson/ip1000/Kconfig"
 
 endchoice

Modified: trunk/src/mainboard/thomson/ip1000/gpio.c
==============================================================================
--- trunk/src/mainboard/thomson/ip1000/gpio.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/thomson/ip1000/gpio.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -61,13 +61,13 @@
 	outl(0x01, PME_IO_BASE_ADDR + 0x2c);
 
 	/* GP30 - FAN2_TACH */
-	outl(0x05, PME_IO_BASE_ADDR + 0x33); 
+	outl(0x05, PME_IO_BASE_ADDR + 0x33);
 
 	/* GP31 - FAN1_TACH */
 	outl(0x05, PME_IO_BASE_ADDR + 0x34);
 
 	/* GP32 - FAN2_CTRL */
-	outl(0x04, PME_IO_BASE_ADDR + 0x35); 
+	outl(0x04, PME_IO_BASE_ADDR + 0x35);
 
 	/* GP33 - FAN1_CTRL */
 	outl(0x04, PME_IO_BASE_ADDR + 0x36);
@@ -82,7 +82,7 @@
 	outl(0x00, PME_IO_BASE_ADDR + 0x3a);
 
 	/* GP42 - GPIO_PME_OUT */
-	outl(0x00, PME_IO_BASE_ADDR + 0x3d); 
+	outl(0x00, PME_IO_BASE_ADDR + 0x3d);
 
 	/* GP50 - SER2_RI */
 	outl(0x05, PME_IO_BASE_ADDR + 0x3f);

Modified: trunk/src/mainboard/thomson/ip1000/mainboard.c
==============================================================================
--- trunk/src/mainboard/thomson/ip1000/mainboard.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/thomson/ip1000/mainboard.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -62,13 +62,13 @@
 
 	printk(BIOS_DEBUG, "IP1000 GPIOs:\n");
 	printk(BIOS_DEBUG, "  GPIO mask:  %02x\n", pp_gpios);
-	printk(BIOS_DEBUG, "  green led:  %s\n", 
+	printk(BIOS_DEBUG, "  green led:  %s\n",
 			(pp_gpios & PARPORT_GPIO_LED_GREEN) ? "off" : "on");
-	printk(BIOS_DEBUG, "  orange led: %s\n", 
+	printk(BIOS_DEBUG, "  orange led: %s\n",
 			(pp_gpios & PARPORT_GPIO_LED_ORANGE) ? "off" : "on");
-	printk(BIOS_DEBUG, "  red led:    %s\n", 
+	printk(BIOS_DEBUG, "  red led:    %s\n",
 			(pp_gpios & PARPORT_GPIO_LED_RED) ? "off" : "on");
-	printk(BIOS_DEBUG, "  IR port:    %s\n", 
+	printk(BIOS_DEBUG, "  IR port:    %s\n",
 			(pp_gpios & PARPORT_GPIO_IR_PORT) ? "off" : "on");
 }
 
@@ -77,7 +77,7 @@
 	u8 manufacturer_id = read8(0xffbc0000);
 	u8 device_id = read8(0xffbc0001);
 
-	if ((manufacturer_id == 0x20) && 
+	if ((manufacturer_id == 0x20) &&
 		((device_id == 0x2c) || (device_id == 0x2d))) {
 		printk(BIOS_DEBUG, "Detected ST M50FW0%c0 flash:\n",
 				(device_id==0x2c)?'4':'8');

Modified: trunk/src/mainboard/thomson/ip1000/romstage.c
==============================================================================
--- trunk/src/mainboard/thomson/ip1000/romstage.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/thomson/ip1000/romstage.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -89,7 +89,7 @@
 	/* CPU Frequency Strap */
 	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd5, 0x02);
 	/* ACPI base address and enable Resource Indicator */
-	pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR | 1)); 
+	pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, (PMBASE_ADDR | 1));
 	/* Enable the SMBUS */
 	enable_smbus();
 	/*  ACPI Enable */

Modified: trunk/src/mainboard/tyan/Kconfig
==============================================================================
--- trunk/src/mainboard/tyan/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/tyan/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -21,7 +21,7 @@
 choice
 	prompt "Mainboard model"
 	depends on VENDOR_TYAN
-	
+
 source "src/mainboard/tyan/s1846/Kconfig"
 source "src/mainboard/tyan/s2735/Kconfig"
 source "src/mainboard/tyan/s2850/Kconfig"

Modified: trunk/src/mainboard/tyan/s2735/Kconfig
==============================================================================
--- trunk/src/mainboard/tyan/s2735/Kconfig	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/tyan/s2735/Kconfig	Tue Apr 27 08:56:47 2010	(r5507)
@@ -26,12 +26,12 @@
 	hex
 	default 0xcf000
 	depends on BOARD_TYAN_S2735
-	
+
 config DCACHE_RAM_SIZE
 	hex
 	default 0x1000
 	depends on BOARD_TYAN_S2735
-	
+
 config MAINBOARD_PART_NUMBER
 	string
 	default "S2735"

Modified: trunk/src/mainboard/tyan/s2735/cmos.layout
==============================================================================
--- trunk/src/mainboard/tyan/s2735/cmos.layout	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/tyan/s2735/cmos.layout	Tue Apr 27 08:56:47 2010	(r5507)
@@ -30,8 +30,8 @@
 388          4       r       0        reboot_bits
 392          3       e       5        baud_rate
 395          1       e       2        hyper_threading
-396          1       e       1        thermal_monitoring 
-397          1       e       1        remap_memory_high 
+396          1       e       1        thermal_monitoring
+397          1       e       1        remap_memory_high
 400          1       e       1        power_on_after_fail
 412          4       e       6        debug_level
 416          4       e       7        boot_first

Modified: trunk/src/mainboard/tyan/s2735/devicetree.cb
==============================================================================
--- trunk/src/mainboard/tyan/s2735/devicetree.cb	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/tyan/s2735/devicetree.cb	Tue Apr 27 08:56:47 2010	(r5507)
@@ -5,7 +5,7 @@
         	device pci 2.0 on
         		chip southbridge/intel/i82870
         	        	device pci 1c.0 on end
-		                device pci 1d.0 on 
+		                device pci 1d.0 on
                                      	 device pci 1.0 on end # intel lan
                                         device pci 1.1 on end
 				end
@@ -20,7 +20,7 @@
         	        device pci 1d.2 on end
         	        device pci 1d.3 on end
 		        device pci 1d.7 on end
-		        device pci 1e.0 on 
+		        device pci 1e.0 on
                              	device pci 1.0 on end # intel lan 10/100
                                 device pci 2.0 on end # ati
 			end
@@ -56,7 +56,7 @@
                                                 io 0x60 = 0x220
                                                 io 0x62 = 0x300
                                                 irq 0x70 = 9
-                                        end                               
+                                        end
                                         device pnp 2e.8 off end #  GPIO2
                                         device pnp 2e.9 off end #  GPIO3
                                         device pnp 2e.a off end #  ACPI

Modified: trunk/src/mainboard/tyan/s2735/irq_tables.c
==============================================================================
--- trunk/src/mainboard/tyan/s2735/irq_tables.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/tyan/s2735/irq_tables.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 

Modified: trunk/src/mainboard/tyan/s2735/mptable.c
==============================================================================
--- trunk/src/mainboard/tyan/s2735/mptable.c	Tue Apr 27 08:35:31 2010	(r5506)
+++ trunk/src/mainboard/tyan/s2735/mptable.c	Tue Apr 27 08:56:47 2010	(r5507)
@@ -48,18 +48,18 @@
                         res = find_resource(dev, PCI_BASE_ADDRESS_0);
                         if (res) {