[coreboot] Asus M2V MX-SE - VGA Rom

Thu Aug 12 00:53:42 CEST 2010

Dne 10.8.2010 20:38, Brutus napsal(a):
> I've solved the problem by using another video card (ATI); it works fine
> with the rom option both enabled and disabled. Now there's only a
> problem: the mouse is very very slow, unusable in practice! Can it be
> caused by a wrong initialization of the USB controller?

Uff I dont have the USB mouse so I dont know. I used PS/2. Is  CPU running fine? 
Maybe it is symptom of some other problem.

Try to check the cat /proc/interrupt and check also if you have right mouse type 
in X.org.

Please try to investigate if  it is not a symptom of some other problem.
I used USB with mass storage device and it worked fine.

Thanks.
Rudolf

>
> -----Original Message----- From: Rudolf Marek
> Sent: Monday, August 09, 2010 5:44 PM
> To: Brutus
> Cc: Cristi Magherusan ; coreboot at coreboot.org
> Subject: Re: [coreboot] Asus M2V MX-SE - VGA Rom
>
> Hi do you use the extracted vga bios rom? If so, then seabios will it
> run instead of coreboot. This looks like unfortunately
> to some other problem maybe with cpufreq.
>
> The VIA VGA bios uses something which is not known to Coreboot and it
> causes the halt (most likely). Please let the seabios execute the option
> rom. As Quing Pei suggested please pass the parameters to kernel to see
> the serial console.
>
> I suspect there is something wrong with Pstates setup for this fast
> dualcore CPUs. I think Nathan Owen had same issues.
> I tested this board only with Sempron CPU around 1GHZ fast. Try to
> disable the loading of k8powernow module. Also you can try to disable
> call on line
> http://tracker.coreboot.org/trac/coreboot/browser/trunk/src/mainboard/asus/m2v-mx_se/romstage.c#L208
>
> and on line
> http://tracker.coreboot.org/trac/coreboot/browser/trunk/src/mainboard/asus/m2v-mx_se/romstage.c#L205
>
>
> It should leave the CPU on startFID (1Ghz maybe)
>
> You can disable the kernel P-states also commenting out
> http://tracker.coreboot.org/trac/coreboot/browser/trunk/src/mainboard/asus/m2v-mx_se/acpi_tables.c#L88
>
> amd_model_fxx_generate_powernow(0, 0, 0);
>
> Re-compile (make clean ; make) with commented out
> init_fidvid_bsp(bsp_apicid); and enable_fid_change() and disable
> the powernow-k8 module. If it works then there is an issue and we need
> to find out how to fix it. I suspected something is wrong with
> P-states setup I think Christie looked into it too, but not sure if he
> found something.
>
> Thanks
> Rudolf
>
>
> Brutus wrote:
>> I’m trying to use coreboot on my Asus M2V MX-SE, using Seabios as
>> Payload. I’ve disabled CONFIG_VGA_ROM_RUN and CONFIG_PCI_ROM_RUN in
>> the coreboot menu, as adviced at:
>> http://www.coreboot.org/SeaBIOS#coreboot
>> Seabios seems working well, it loads Lilo and i can boot my Slackware
>> 13.1 64 bit, but after few seconds the monitor becomes blank, I
>> suppose while initializing the vga card (frame buffer?). So 'i’ve
>> tried to enable CONFIG_VGA_ROM_RUN and CONFIG_PCI_ROM_RUN, but
>> coreboot halts while calling the rom; this is the output captured by
>> the COM port:
>> coreboot-4.0-r5591M Tue Sep 28 15:00:06 CEST 2010 starting...
>> now booting...
>> INIT detected from --- { APICID = 00 NODEID = 00 COREID = 00} ---
>> Issuing SOFT_RESET...
>> Before set_bios_reset
>> Before set_bios_reset
>> Enter set_bios_reset
>> After pci_read_config32
>> After pci_write_config32
>> After set_bios_reset
>> soft reset
>> coreboot-4.0-r5591M Tue Sep 28 15:00:06 CEST 2010 starting...
>> now booting...
>> Enabling routing table for node 00 done.
>> Enabling UP settings
>> coherent_ht_finalize
>> done
>> core0 started:
>> now booting... All core 0 started
>> started ap apicid:
>> coreboot-4.0-r5591M Tue Sep 28 15:00:06 CEST 2010 starting...
>> now booting...
>> * AP 01started
>> SBLink=00
>> NC node|link=00
>> 00entering optimize_link_incoherent_ht
>> sysinfo->link_pair_num=0x1
>> entering ht_optimize_link
>> pos=0x8a, unfiltered freq_cap=0x8075
>> pos=0x8a, filtered freq_cap=0x75
>> capping to 800/600/400/200 MHz
>> pos=0x6e, unfiltered freq_cap=0x75
>> pos=0x6e, filtered freq_cap=0x75
>> capping to 800/600/400/200 MHz
>> freq_cap1=0x75, freq_cap2=0x75
>> dev1 old_freq=0x0, freq=0x6, needs_reset=0x1
>> dev2 old_freq=0x0, freq=0x6, needs_reset=0x1
>> width_cap1=0x11, width_cap2=0x11
>> dev1 input ln_width1=0x4, ln_width2=0x4
>> dev1 input width=0x1
>> dev1 output ln_width1=0x4, ln_width2=0x4
>> dev1 input|output width=0x11
>> old dev1 input|output width=0x11
>> dev2 input|output width=0x11
>> old dev2 input|output width=0x11
>> after ht_optimize_link for link pair 0, reset_needed=0x1
>> after optimize_link_read_pointers_chain, reset_needed=0x1
>> 01Debug: needs_reset 3
>> K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT freq:
>> 06 VIA HT caps: 0075
>> 01Debug: needs_reset 4
>> No config data specified, using default MAC!
>> Debug line 459
>> Debug line 480
>> Debug line 489
>> Debug: needs_reset 5
>> Debug: needs_reset 6
>> ht reset -
>> Before set_bios_reset
>> Before set_bios_reset
>> Enter set_bios_reset
>> After pci_read_config32
>> After pci_write_config32
>> After set_bios_reset
>> soft reset
>> coreboot-4.0-r5591M Tue Sep 28 15:00:06 CEST 2010 starting...
>> now booting...
>> Enabling routing table for node 00 done.
>> Enabling UP settings
>> coherent_ht_finalize
>> done
>> core0 started:
>> now booting... All core 0 started
>> started ap apicid:
>> coreboot-4.0-r5591M Tue Sep 28 15:00:06 CEST 2010 starting...
>> now booting...
>> * AP 01started
>> SBLink=00
>> NC node|link=00
>> 00entering optimize_link_incoherent_ht
>> sysinfo->link_pair_num=0x1
>> entering ht_optimize_link
>> pos=0x8a, unfiltered freq_cap=0x8075
>> pos=0x8a, filtered freq_cap=0x75
>> capping to 800/600/400/200 MHz
>> pos=0x6e, unfiltered freq_cap=0x75
>> pos=0x6e, filtered freq_cap=0x75
>> capping to 800/600/400/200 MHz
>> freq_cap1=0x75, freq_cap2=0x75
>> dev1 old_freq=0x6, freq=0x6, needs_reset=0x0
>> dev2 old_freq=0x6, freq=0x6, needs_reset=0x0
>> width_cap1=0x11, width_cap2=0x11
>> dev1 input ln_width1=0x4, ln_width2=0x4
>> dev1 input width=0x1
>> dev1 output ln_width1=0x4, ln_width2=0x4
>> dev1 input|output width=0x11
>> old dev1 input|output width=0x11
>> dev2 input|output width=0x11
>> old dev2 input|output width=0x11
>> after ht_optimize_link for link pair 0, reset_needed=0x0
>> after optimize_link_read_pointers_chain, reset_needed=0x0
>> 00K8T890 found at LDT 00 Agreed on width: 01 CPU programmed to HT
>> freq: 06 VIA HT caps: 0075
>> 00after enable_fid_change
>> Ram1.00
>> setting up CPU 00 northbridge registers
>> done.
>> Ram2.00
>> sdram_set_spd_registers: paramx :000ced74
>> Device error
>> Device error
>> Device error
>> Unbuffered
>> 400MHz
>> 400MHz
>> RAM end at 0x00100000 kB
>> Ram3
>> Initializing memory: done
>> Setting variable MTRR 2, base: 0MB, range: 1024MB, type WB
>> DQS Training:RcvrEn:Pass1: 00
>> CTLRMaxDelay=19
>> done
>> DQS Training:DQSPos: 00
>> TrainDQSRdWrPos: buf_a:000ce910
>> TrainDQSPos: MutualCSPassW[48] :000ce7f4
>> TrainDQSPos: MutualCSPassW[48] :000ce7f4
>> TrainDQSPos: MutualCSPassW[48] :000ce7f4
>> TrainDQSPos: MutualCSPassW[48] :000ce7f4
>> done
>> DQS Training:RcvrEn:Pass2: 00
>> CTLRMaxDelay=41
>> done
>> DQS SAVE NVRAM: c2000
>> Writing 113222 of size 4 to nvram pos: 0
>> Writing 15151515 of size 4 to nvram pos: 4
>> Writing 14151516 of size 4 to nvram pos: 8
>> Writing 15 of size 1 to nvram pos: 12
>> Writing 202520 of size 4 to nvram pos: 13
>> Writing 15151615 of size 4 to nvram pos: 17
>> Writing 14141515 of size 4 to nvram pos: 21
>> Writing 15 of size 1 to nvram pos: 25
>> Writing 30 of size 1 to nvram pos: 26
>> Writing 0 of size 1 to nvram pos: 27
>> Writing 0 of size 1 to nvram pos: 28
>> Writing 0 of size 1 to nvram pos: 29
>> Writing 111222 of size 4 to nvram pos: 30
>> Writing 0 of size 4 to nvram pos: 34
>> Writing 0 of size 4 to nvram pos: 38
>> Writing 0 of size 1 to nvram pos: 42
>> Writing 0 of size 4 to nvram pos: 43
>> Writing 2f2f2f2f of size 4 to nvram pos: 47
>> Writing 2f2f2f2f of size 4 to nvram pos: 51
>> Writing 0 of size 1 to nvram pos: 55
>> Writing 41 of size 1 to nvram pos: 56
>> Writing 0 of size 1 to nvram pos: 57
>> Writing 0 of size 1 to nvram pos: 58
>> Writing 0 of size 1 to nvram pos: 59
>> Writing 741080ab of size 4 to nvram pos: 60
>> DQS Training:tsc[00]=00000001734c2dc6
>> DQS Training:tsc[01]=0000000176143d6d
>> DQS Training:tsc[02]=0000000176143d76
>> DQS Training:tsc[03]=000000020d3f1994
>> DQS Training:tsc[04]=000000022b63a480
>> Ram4
>> v_esp=000cee48
>> testx = 5a5a5a5a
>> Copying data from cache to RAM -- switching to use RAM as stack... Done
>> testx = 5a5a5a5a
>> Disabling cache as ram now
>> Clearing initial memory region: Done
>> Loading stage image.
>> Check CBFS header at fffffc6e
>> magic is 4f524243
>> Found CBFS header at fffffc6e
>> Check fallback/romstage
>> CBFS: follow chain: fff80000 + 38 + b885 + align -> fff8b8c0
>> Check fallback/coreboot_ram
>> Stage: loading fallback/coreboot_ram @ 0x100000 (524288 bytes), entry
>> @ 0x100000
>> Stage: done loading.
>> Jumping to image.
>> coreboot-4.0-r5591M Tue Sep 28 15:00:06 CEST 2010 booting...
>> Enumerating buses...
>> Show all devs...Before Device Enumeration.
>> Root Device: enabled 1
>> APIC_CLUSTER: 0: enabled 1
>> APIC: 00: enabled 1
>> PCI_DOMAIN: 0000: enabled 1
>> PCI: 00:18.0: enabled 1
>> PCI: 00:00.0: enabled 1
>> PCI: 00:0f.1: enabled 1
>> PCI: 00:11.0: enabled 1
>> I2C: 00:50: enabled 1
>> I2C: 00:51: enabled 1
>> I2C: 00:52: enabled 1
>> I2C: 00:53: enabled 1
>> PNP: 002e.0: enabled 1
>> PNP: 002e.1: enabled 1
>> PNP: 002e.2: enabled 0
>> PNP: 002e.3: enabled 1
>> PNP: 002e.4: enabled 1
>> PNP: 002e.5: enabled 0
>> PNP: 002e.6: enabled 0
>> PNP: 002e.7: enabled 0
>> PNP: 002e.8: enabled 0
>> PNP: 002e.9: enabled 0
>> PNP: 002e.a: enabled 0
>> PCI: 00:12.0: enabled 1
>> PCI: 00:13.0: enabled 1
>> PCI: 00:13.1: enabled 1
>> PCI: 00:18.1: enabled 1
>> PCI: 00:18.2: enabled 1
>> PCI: 00:18.3: enabled 1
>> Compare with tree...
>> Root Device: enabled 1
>> APIC_CLUSTER: 0: enabled 1
>> APIC: 00: enabled 1
>> PCI_DOMAIN: 0000: enabled 1
>> PCI: 00:18.0: enabled 1
>> PCI: 00:00.0: enabled 1
>> PCI: 00:0f.1: enabled 1
>> PCI: 00:11.0: enabled 1
>> I2C: 00:50: enabled 1
>> I2C: 00:51: enabled 1
>> I2C: 00:52: enabled 1
>> I2C: 00:53: enabled 1
>> PNP: 002e.0: enabled 1
>> PNP: 002e.1: enabled 1
>> PNP: 002e.2: enabled 0
>> PNP: 002e.3: enabled 1
>> PNP: 002e.4: enabled 1
>> PNP: 002e.5: enabled 0
>> PNP: 002e.6: enabled 0
>> PNP: 002e.7: enabled 0
>> PNP: 002e.8: enabled 0
>> PNP: 002e.9: enabled 0
>> PNP: 002e.a: enabled 0
>> PCI: 00:12.0: enabled 1
>> PCI: 00:13.0: enabled 1
>> PCI: 00:13.1: enabled 1
>> PCI: 00:18.1: enabled 1
>> PCI: 00:18.2: enabled 1
>> PCI: 00:18.3: enabled 1
>> scan_static_bus for Root Device
>> APIC_CLUSTER: 0 enabled
>> PCI_DOMAIN: 0000 enabled
>> APIC_CLUSTER: 0 scanning...
>> PCI: 00:18.3 siblings=1
>> CPU: APIC: 00 enabled
>> malloc Enter, size 228, free_mem_ptr 00140000
>> malloc 00140000
>> CPU: APIC: 01 enabled
>> PCI_DOMAIN: 0000 scanning...
>> PCI: pci_scan_bus for bus 00
>> PCI: 00:18.0 [1022/1100] bus ops
>> PCI: 00:18.0 [1022/1100] enabled
>> PCI: 00:18.1 [1022/1101] enabled
>> PCI: 00:18.2 [1022/1102] enabled
>> PCI: 00:18.3 [1022/1103] ops
>> PCI: 00:18.3 [1022/1103] enabled
>> PCI: Using configuration type 1
>> PCI: 00:00.0 [1106/0336] ops
>> PCI: 00:00.0 [1106/0336] enabled
>> Capability: type 0x02 @ 0x80
>> Capability: type 0x01 @ 0x50
>> Capability: type 0x08 @ 0x60
>> flags: 0x0060
>> PCI: 00:00.0 count: 0003 static_count: 0014
>> PCI: 00:00.0 [1106/0336] enabled next_unitid: 0014
>> PCI: pci_scan_bus for bus 00
>> PCI: 00:00.0 [1106/0336] enabled
>> malloc Enter, size 228, free_mem_ptr 001400e4
>> malloc 001400e4
>> PCI: 00:00.1 [1106/1336] ops
>> PCI: 00:00.1 [1106/1336] enabled
>> malloc Enter, size 228, free_mem_ptr 001401c8
>> malloc 001401c8
>> PCI: 00:00.2 [1106/2336] ops
>> PCI: 00:00.2 [1106/2336] enabled
>> malloc Enter, size 228, free_mem_ptr 001402ac
>> malloc 001402ac
>> PCI: 00:00.3 [1106/3336] ops
>> PCI: 00:00.3 [1106/3336] enabled
>> malloc Enter, size 228, free_mem_ptr 00140390
>> malloc 00140390
>> PCI: 00:00.4 [1106/4336] enabled
>> malloc Enter, size 228, free_mem_ptr 00140474
>> malloc 00140474
>> PCI: 00:00.5 [1106/5336] ops
>> PCI: 00:00.5 [1106/5336] enabled
>> malloc Enter, size 228, free_mem_ptr 00140558
>> malloc 00140558
>> PCI: 00:00.6 [1106/6290] enabled
>> malloc Enter, size 228, free_mem_ptr 0014063c
>> malloc 0014063c
>> PCI: 00:00.7 [1106/7336] ops
>> PCI: 00:00.7 [1106/7336] enabled
>> malloc Enter, size 228, free_mem_ptr 00140720
>> malloc 00140720
>> PCI: 00:01.0 [1106/b188] bus ops
>> B188 device dump
>> 00: 06 11 88 b1 07 00 30 02 00 00 04 06 00 00 01 00
>> 10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 20 02
>> 20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00
>> 30: 00 00 00 00 70 00 00 00 00 00 00 00 00 00 16 00
>> 40: 91 40 08 44 31 3a 88 b1 00 00 00 00 00 00 00 00
>> 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 70: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 80: 0e 70 35 00 0b 0a 00 1f 00 00 00 00 28 00 00 00
>> 90: 80 00 00 00 00 08 01 00 00 00 00 00 00 00 00 00
>> a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> b0: 80 63 08 00 00 00 00 00 00 00 1f c4 00 04 00 00
>> c0: 08 00 0b ff 00 00 00 00 00 00 00 00 00 00 00 00
>> d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> PCI: 00:01.0 [1106/b188] enabled
>> malloc Enter, size 228, free_mem_ptr 00140804
>> malloc 00140804
>> PCI: 00:02.0 [1106/a238] bus ops
>> Configuring PCIe PEG
>> 00: 06 11 38 a2 00 00 10 00 00 00 04 06 00 00 01 00
>> 10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00
>> 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00
>> 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00
>> 40: 10 68 41 01 c1 0e 00 00 00 00 10 00 01 0d 10 00
>> 50: 00 00 01 21 60 00 00 00 00 00 48 00 00 00 00 00
>> 60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00
>> 70: 05 dc 80 01 00 00 00 00 00 00 00 00 00 00 00 00
>> 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 90: 00 00 00 00 00 00 00 00 0d 00 00 00 06 11 36 c3
>> a0: 01 04 00 00 5c 00 00 00 00 00 00 00 00 00 00 00
>> b0: 0c 12 40 81 00 00 03 00 00 00 00 00 00 00 00 00
>> c0: 03 00 27 8a 44 44 44 44 44 44 44 44 00 00 00 00
>> d0: 50 00 00 00 02 00 00 00 00 00 00 00 08 00 02 a8
>> e0: 0c 07 81 9a f8 00 00 00 81 82 f8 00 00 00 00 00
>> f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00
>> 00: 06 11 38 a2 00 00 10 00 00 00 04 06 00 00 01 00
>> 10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00
>> 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00
>> 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00
>> 40: 10 68 41 01 c1 0e 00 00 00 00 10 00 01 0d 10 00
>> 50: 00 00 01 21 60 00 00 00 00 00 48 00 00 00 00 00
>> 60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00
>> 70: 05 dc 80 01 00 00 00 00 00 00 00 00 00 00 00 00
>> 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 90: 00 00 00 00 00 00 00 00 0d 00 00 00 06 11 36 c3
>> a0: 01 04 00 00 7c 00 00 00 00 00 00 00 00 00 00 00
>> b0: 0c f0 40 81 00 00 03 00 01 00 00 00 00 00 00 00
>> c0: 03 00 27 8a 44 44 44 44 44 44 44 44 00 00 00 00
>> d0: 50 00 00 00 02 00 00 00 00 00 00 00 08 00 02 a8
>> e0: 0c 0b 81 9a f8 00 00 00 81 82 f8 00 00 00 00 00
>> f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00
>> PCI: 00:02.0 [1106/a238] enabled
>> malloc Enter, size 228, free_mem_ptr 001408e8
>> malloc 001408e8
>> PCI: 00:03.0 [1106/c238] bus ops
>> Configuring PCIe PEXs
>> 00: 06 11 38 c2 00 00 10 00 00 00 04 06 00 00 01 00
>> 10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00
>> 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00
>> 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00
>> 40: 10 68 41 01 01 0e 00 00 00 00 10 00 11 0c 10 01
>> 50: 00 00 01 00 60 00 00 00 00 00 00 00 00 00 00 00
>> 60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00
>> 70: 05 dc 80 01 00 00 00 00 00 00 00 00 00 00 00 00
>> 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 90: 00 00 00 00 00 00 00 00 0d 00 00 00 06 11 36 d3
>> a0: 01 04 00 00 5c 00 00 00 00 00 00 00 00 00 00 00
>> b0: 3b 59 40 81 00 00 03 00 00 00 00 00 00 00 00 00
>> c0: 03 00 27 00 44 44 00 00 00 00 00 00 00 00 00 00
>> d0: 50 00 00 00 02 00 00 00 00 00 00 00 08 00 02 a8
>> e0: 00 0b 01 9a f8 00 00 00 00 00 00 00 00 00 00 00
>> f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00
>> 00: 06 11 38 c2 00 00 10 00 00 00 04 06 00 00 01 00
>> 10: 00 00 00 00 00 00 00 00 00 00 00 00 f0 00 00 00
>> 20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00
>> 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00
>> 40: 10 68 41 01 01 0e 00 00 00 00 10 00 11 0c 10 01
>> 50: 00 00 01 00 60 00 00 00 00 00 00 00 00 00 00 00
>> 60: 00 00 00 00 00 00 00 00 01 70 22 c8 00 00 00 00
>> 70: 05 dc 80 01 00 00 00 00 00 00 00 00 00 00 00 00
>> 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 90: 00 00 00 00 00 00 00 00 0d 00 00 00 06 11 36 d3
>> a0: 01 04 00 00 5c 00 00 00 00 00 00 00 00 00 00 00
>> b0: 3b f0 40 81 00 00 03 00 00 00 00 00 00 00 00 00
>> c0: 03 00 27 00 44 44 00 00 00 00 00 00 00 00 00 00
>> d0: 50 00 00 00 02 00 00 00 00 00 00 00 08 00 02 a8
>> e0: 00 0b 01 9a f8 00 00 00 00 00 00 00 00 00 00 00
>> f0: 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00
>> PCI: 00:03.0 [1106/c238] enabled
>> malloc Enter, size 228, free_mem_ptr 001409cc
>> malloc 001409cc
>> PCI: 00:0f.0 [1106/5372] ops
>> PCI: 00:0f.0 [1106/5372] enabled
>> PCI: 00:0f.1 [1106/0571] ops
>> PCI: 00:0f.1 [1106/0571] enabled
>> malloc Enter, size 228, free_mem_ptr 00140ab0
>> malloc 00140ab0
>> PCI: 00:10.0 [1106/3038] ops
>> PCI: 00:10.0 [1106/3038] enabled
>> malloc Enter, size 228, free_mem_ptr 00140b94
>> malloc 00140b94
>> PCI: 00:10.1 [1106/3038] ops
>> PCI: 00:10.1 [1106/3038] enabled
>> malloc Enter, size 228, free_mem_ptr 00140c78
>> malloc 00140c78
>> PCI: 00:10.2 [1106/3038] ops
>> PCI: 00:10.2 [1106/3038] enabled
>> malloc Enter, size 228, free_mem_ptr 00140d5c
>> malloc 00140d5c
>> PCI: 00:10.3 [1106/3038] ops
>> PCI: 00:10.3 [1106/3038] enabled
>> malloc Enter, size 228, free_mem_ptr 00140e40
>> malloc 00140e40
>> PCI: 00:10.4 [1106/3104] ops
>> PCI: 00:10.4 [1106/3104] enabled
>> PCI: 00:11.0 [1106/3372] bus ops
>> PCI: 00:11.0 [1106/3372] enabled
>> malloc Enter, size 228, free_mem_ptr 00140f24
>> malloc 00140f24
>> PCI: 00:11.7 [1106/287e] ops
>> PCI: 00:11.7 [1106/287e] enabled
>> PCI: 00:12.0 [1106/3065] ops
>> PCI: 00:12.0 [1106/3065] enabled
>> Capability: type 0x08 @ 0x60
>> Capability: type 0x0d @ 0x70
>> Capability: type 0x08 @ 0x60
>> Capability: type 0x08 @ 0x60
>> Capability: type 0x0d @ 0x70
>> Capability: type 0x08 @ 0x60
>> Capability: type 0x0d @ 0x70
>> PCI: 00:13.0 [1106/337b] enabled
>> Capability: type 0x08 @ 0x60
>> Capability: type 0x0d @ 0x70
>> Capability: type 0x08 @ 0x60
>> Capability: type 0x08 @ 0x60
>> Capability: type 0x0d @ 0x70
>> Capability: type 0x08 @ 0x60
>> Capability: type 0x0d @ 0x70
>> PCI: 00:13.1 [1106/337a] enabled
>> do_pci_scan_bridge for PCI: 00:01.0
>> PCI: pci_scan_bus for bus 01
>> PCI: pci_scan_bus returning with max=001
>> do_pci_scan_bridge returns max 1
>> do_pci_scan_bridge for PCI: 00:02.0
>> PCI: pci_scan_bus for bus 02
>> malloc Enter, size 228, free_mem_ptr 00141008
>> malloc 00141008
>> PCI: 02:00.0 [10de/0641] enabled
>> PCI: pci_scan_bus returning with max=002
>> Capability: type 0x01 @ 0x60
>> Capability: type 0x05 @ 0x68
>> Capability: type 0x10 @ 0x78
>> do_pci_scan_bridge returns max 2
>> do_pci_scan_bridge for PCI: 00:03.0
>> PCI: pci_scan_bus for bus 03
>> PCI: pci_scan_bus returning with max=003
>> do_pci_scan_bridge returns max 3
>> scan_static_bus for PCI: 00:11.0
>> smbus: PCI: 00:11.0[0]->I2C: 01:50 enabled
>> smbus: PCI: 00:11.0[0]->I2C: 01:51 enabled
>> smbus: PCI: 00:11.0[0]->I2C: 01:52 enabled
>> smbus: PCI: 00:11.0[0]->I2C: 01:53 enabled
>> malloc Enter, size 2560, free_mem_ptr 001410ec
>> malloc 001410ec
>> PNP: 002e.0 enabled
>> PNP: 002e.1 enabled
>> PNP: 002e.2 disabled
>> PNP: 002e.3 enabled
>> PNP: 002e.4 enabled
>> PNP: 002e.5 disabled
>> PNP: 002e.6 disabled
>> PNP: 002e.7 disabled
>> PNP: 002e.8 disabled
>> PNP: 002e.9 disabled
>> PNP: 002e.a disabled
>> scan_static_bus for PCI: 00:11.0 done
>> do_pci_scan_bridge for PCI: 00:13.0
>> PCI: pci_scan_bus for bus 04
>> malloc Enter, size 228, free_mem_ptr 00141aec
>> malloc 00141aec
>> PCI: 04:01.0 [1106/3288] enabled
>> PCI: pci_scan_bus returning with max=004
>> do_pci_scan_bridge returns max 4
>> do_pci_scan_bridge for PCI: 00:13.1
>> PCI: pci_scan_bus for bus 05
>> PCI: pci_scan_bus returning with max=005
>> do_pci_scan_bridge returns max 5
>> PCI: pci_scan_bus returning with max=005
>> PCI: pci_scan_bus returning with max=005
>> PCI_DOMAIN: 0000 passpw: enabled
>> scan_static_bus for Root Device done
>> done
>> Setting up VGA for PCI: 02:00.0
>> Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:02.0
>> Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
>> Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
>> Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
>> Allocating resources...
>> Reading resources...
>> Root Device read_resources bus 0 link: 0
>> APIC_CLUSTER: 0 read_resources bus 0 link: 0
>> APIC: 00 missing read_resources
>> APIC: 01 missing read_resources
>> APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
>> PCI_DOMAIN: 0000 read_resources bus 0 link: 0
>> VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device
>> PCI: 00:18.0 read_resources bus 0 link: 0
>> PCI: 00:01.0 read_resources bus 1 link: 0
>> PCI: 00:01.0 read_resources bus 1 link: 0 done
>> PCI: 00:02.0 read_resources bus 2 link: 0
>> PCI: 00:02.0 read_resources bus 2 link: 0 done
>> PCI: 00:03.0 read_resources bus 3 link: 0
>> PCI: 00:03.0 read_resources bus 3 link: 0 done
>> PCI: 00:11.0 read_resources bus 1 link: 0
>> I2C: 01:50 missing read_resources
>> I2C: 01:51 missing read_resources
>> I2C: 01:52 missing read_resources
>> I2C: 01:53 missing read_resources
>> PCI: 00:11.0 read_resources bus 1 link: 0 done
>> PCI: 00:13.0 read_resources bus 4 link: 0
>> PCI: 00:13.0 read_resources bus 4 link: 0 done
>> malloc Enter, size 2560, free_mem_ptr 00141bd0
>> malloc 00141bd0
>> PCI: 00:13.1 read_resources bus 5 link: 0
>> PCI: 00:13.1 read_resources bus 5 link: 0 done
>> PCI: 00:18.0 read_resources bus 0 link: 0 done
>> PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
>> Root Device read_resources bus 0 link: 0 done
>> Done reading resources.
>> Show resources in subtree (Root Device)...After reading.
>> Root Device links 1 child on link 0 APIC_CLUSTER: 0
>> APIC_CLUSTER: 0 links 1 child on link 0 APIC: 00
>> APIC: 00 links 0 child on link 0 NULL
>> APIC: 01 links 0 child on link 0 NULL
>> PCI_DOMAIN: 0000 links 1 child on link 0 PCI: 00:18.0
>> PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff
>> flags 40040100 index 10000000
>> PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff
>> flags 40040200 index 10000100
>> PCI: 00:18.0 links 1 child on link 0 PCI: 00:00.0
>> PCI: 00:18.0 resource base fc0003 size 0 align 0 gran 0 limit ffff00
>> flags 1 index 1b8
>> PCI: 00:18.0 resource base 3 size 0 align 0 gran 0 limit 1fff000 flags
>> 1 index 1c0
>> PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags
>> 80100 index 0
>> PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff
>> flags 81200 index 2
>> PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffff
>> flags 80200 index 1
>> PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit
>> ffffffff flags c0000200 index 4
>> PCI: 00:00.0 links 0 child on link 0 NULL
>> PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit
>> ffffffff flags 1200 index 10
>> PCI: 00:00.1 links 0 child on link 0 NULL
>> PCI: 00:00.2 links 0 child on link 0 NULL
>> PCI: 00:00.3 links 0 child on link 0 NULL
>> PCI: 00:00.4 links 0 child on link 0 NULL
>> PCI: 00:00.5 links 0 child on link 0 NULL
>> PCI: 00:00.5 resource base fecc0000 size 100 align 8 gran 8 limit
>> fecc00ff flags e0000200 index 40
>> PCI: 00:00.5 resource base 0 size 10000000 align 28 gran 28 limit
>> ffffffff flags 200 index 61
>> PCI: 00:00.6 links 0 child on link 0 NULL
>> PCI: 00:00.7 links 0 child on link 0 NULL
>> PCI: 00:01.0 links 1 child on link 0 NULL
>> PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags
>> 80102 index 1c
>> PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff
>> flags 81202 index 24
>> PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff
>> flags 80202 index 20
>> PCI: 00:02.0 links 1 child on link 0 PCI: 02:00.0
>> PCI: 00:02.0 resource base 0 size 0 align 12 gran 12 limit ffff flags
>> 80102 index 1c
>> PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit
>> ffffffffffffffff flags 81202 index 24
>> PCI: 00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff
>> flags 80202 index 20
>> PCI: 02:00.0 links 0 child on link 0 NULL
>> PCI: 02:00.0 resource base 0 size 1000000 align 24 gran 24 limit
>> ffffffff flags 200 index 10
>> PCI: 02:00.0 resource base 0 size 10000000 align 28 gran 28 limit
>> ffffffffffffffff flags 1201 index 14
>> PCI: 02:00.0 resource base 0 size 2000000 align 25 gran 25 limit
>> ffffffffffffffff flags 201 index 1c
>> PCI: 02:00.0 resource base 0 size 80 align 7 gran 7 limit ffff flags
>> 100 index 24
>> PCI: 02:00.0 resource base 0 size 80000 align 19 gran 19 limit
>> ffffffff flags 2200 index 30
>> PCI: 00:03.0 links 1 child on link 0 NULL
>> PCI: 00:03.0 resource base 0 size 0 align 12 gran 12 limit ffff flags
>> 80102 index 1c
>> PCI: 00:03.0 resource base 0 size 0 align 20 gran 20 limit
>> ffffffffffffffff flags 81202 index 24
>> PCI: 00:03.0 resource base 0 size 0 align 20 gran 20 limit ffffffff
>> flags 80202 index 20
>> PCI: 00:0f.0 links 0 child on link 0 NULL
>> PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit ffff flags
>> 100 index 10
>> PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit ffff flags
>> 100 index 14
>> PCI: 00:0f.0 resource base 0 size 8 align 3 gran 3 limit ffff flags
>> 100 index 18
>> PCI: 00:0f.0 resource base 0 size 4 align 2 gran 2 limit ffff flags
>> 100 index 1c
>> PCI: 00:0f.0 resource base 0 size 10 align 4 gran 4 limit ffff flags
>> 100 index 20
>> PCI: 00:0f.0 resource base 0 size 100 align 8 gran 8 limit ffff flags
>> 100 index 24
>> PCI: 00:0f.1 links 0 child on link 0 NULL
>> PCI: 00:0f.1 resource base 0 size 10 align 4 gran 4 limit ffff flags
>> 100 index 20
>> PCI: 00:10.0 links 0 child on link 0 NULL
>> PCI: 00:10.0 resource base 0 size 20 align 5 gran 5 limit ffff flags
>> 100 index 20
>> PCI: 00:10.1 links 0 child on link 0 NULL
>> PCI: 00:10.1 resource base 0 size 20 align 5 gran 5 limit ffff flags
>> 100 index 20
>> PCI: 00:10.2 links 0 child on link 0 NULL
>> PCI: 00:10.2 resource base 0 size 20 align 5 gran 5 limit ffff flags
>> 100 index 20
>> PCI: 00:10.3 links 0 child on link 0 NULL
>> PCI: 00:10.3 resource base 0 size 20 align 5 gran 5 limit ffff flags
>> 100 index 20
>> PCI: 00:10.4 links 0 child on link 0 NULL
>> PCI: 00:10.4 resource base 0 size 100 align 8 gran 8 limit ffffffff
>> flags 200 index 10
>> PCI: 00:11.0 links 1 child on link 0 I2C: 01:50
>> PCI: 00:11.0 resource base 500 size 80 align 0 gran 0 limit ffff flags
>> e0000100 index 88
>> PCI: 00:11.0 resource base 4d0 size 2 align 0 gran 0 limit ffff flags
>> e0000100 index 3
>> PCI: 00:11.0 resource base 400 size 10 align 0 gran 0 limit ffff flags
>> e0000100 index d0
>> PCI: 00:11.0 resource base fec00000 size 100 align 8 gran 8 limit
>> ffffffff flags e0000200 index 44
>> PCI: 00:11.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags
>> c0000100 index 1
>> I2C: 01:50 links 0 child on link 0 NULL
>> I2C: 01:51 links 0 child on link 0 NULL
>> I2C: 01:52 links 0 child on link 0 NULL
>> I2C: 01:53 links 0 child on link 0 NULL
>> PNP: 002e.0 links 0 child on link 0 NULL
>> PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit fff flags
>> c0000100 index 60
>> PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags
>> c0000400 index 70
>> PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags
>> c0000800 index 74
>> PNP: 002e.1 links 0 child on link 0 NULL
>> PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit fff flags
>> c0000100 index 60
>> PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags
>> c0000400 index 70
>> PNP: 002e.2 links 0 child on link 0 NULL
>> PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit fff flags
>> c0000100 index 60
>> PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags
>> c0000400 index 70
>> PNP: 002e.3 links 0 child on link 0 NULL
>> PNP: 002e.3 resource base 378 size 4 align 2 gran 2 limit fff flags
>> c0000100 index 60
>> PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags
>> c0000400 index 70
>> PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800
>> index 74
>> PNP: 002e.4 links 0 child on link 0 NULL
>> PNP: 002e.4 resource base 290 size 8 align 3 gran 3 limit fff flags
>> c0000100 index 60
>> PNP: 002e.4 resource base 230 size 8 align 3 gran 3 limit fff flags
>> c0000100 index 62
>> PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags
>> c0000400 index 70
>> PNP: 002e.5 links 0 child on link 0 NULL
>> PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit ffffffff flags
>> 100 index 60
>> PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit ffffffff flags
>> 100 index 62
>> PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400
>> index 70
>> PNP: 002e.6 links 0 child on link 0 NULL
>> PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400
>> index 70
>> PNP: 002e.7 links 0 child on link 0 NULL
>> PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags
>> 100 index 60
>> PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit fff flags 100
>> index 62
>> PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit fff flags 100
>> index 64
>> PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400
>> index 70
>> PNP: 002e.8 links 0 child on link 0 NULL
>> PNP: 002e.8 resource base 0 size 8 align 3 gran 3 limit fff flags 100
>> index 60
>> PNP: 002e.8 resource base 0 size 1 align 0 gran 0 limit 0 flags 400
>> index 70
>> PNP: 002e.9 links 0 child on link 0 NULL
>> PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit ffffffff flags
>> 100 index 60
>> PNP: 002e.a links 0 child on link 0 NULL
>> PNP: 002e.a resource base 0 size 8 align 3 gran 3 limit fff flags 100
>> index 60
>> PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400
>> index 70
>> PCI: 00:11.7 links 0 child on link 0 NULL
>> PCI: 00:12.0 links 0 child on link 0 NULL
>> PCI: 00:12.0 resource base 0 size 100 align 8 gran 8 limit ffff flags
>> 100 index 10
>> PCI: 00:12.0 resource base 0 size 100 align 8 gran 8 limit ffffffff
>> flags 200 index 14
>> PCI: 00:13.0 links 1 child on link 0 PCI: 04:01.0
>> PCI: 00:13.0 resource base 0 size 0 align 12 gran 12 limit ffff flags
>> 80102 index 1c
>> PCI: 00:13.0 resource base 0 size 0 align 20 gran 20 limit
>> ffffffffffffffff flags 81202 index 24
>> PCI: 00:13.0 resource base 0 size 0 align 20 gran 20 limit ffffffff
>> flags 80202 index 20
>> PCI: 04:01.0 links 0 child on link 0 NULL
>> PCI: 04:01.0 resource base 0 size 4000 align 14 gran 14 limit
>> ffffffffffffffff flags 201 index 10
>> PCI: 00:13.1 links 1 child on link 0 NULL
>> PCI: 00:13.1 resource base 0 size 0 align 12 gran 12 limit ffff flags
>> 80102 index 1c
>> PCI: 00:13.1 resource base 0 size 0 align 20 gran 20 limit
>> ffffffffffffffff flags 81202 index 24
>> PCI: 00:13.1 resource base 0 size 0 align 20 gran 20 limit ffffffff
>> flags 80202 index 20
>> PCI: 00:18.1 links 0 child on link 0 NULL
>> PCI: 00:18.2 links 0 child on link 0 NULL
>> PCI: 00:18.3 links 0 child on link 0 NULL
>> PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit
>> ffffffff flags 200 index 94
>> PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran:
>> 0 limit: ffff
>> PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
>> limit: ffff
>> PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
>> limit: ffff
>> PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
>> limit: ffff done
>> PCI: 00:02.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
>> limit: ffff
>> PCI: 02:00.0 24 * [0x0 - 0x7f] io
>> PCI: 00:02.0 compute_resources_io: base: 80 size: 1000 align: 12 gran:
>> 12 limit: ffff done
>> PCI: 00:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
>> limit: ffff
>> PCI: 00:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
>> limit: ffff done
>> PCI: 00:13.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
>> limit: ffff
>> PCI: 00:13.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
>> limit: ffff done
>> PCI: 00:13.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
>> limit: ffff
>> PCI: 00:13.1 compute_resources_io: base: 0 size: 0 align: 12 gran: 12
>> limit: ffff done
>> PCI: 00:02.0 1c * [0x0 - 0xfff] io
>> PCI: 00:0f.0 24 * [0x1000 - 0x10ff] io
>> PCI: 00:12.0 10 * [0x1400 - 0x14ff] io
>> PCI: 00:10.0 20 * [0x1800 - 0x181f] io
>> PCI: 00:10.1 20 * [0x1820 - 0x183f] io
>> PCI: 00:10.2 20 * [0x1840 - 0x185f] io
>> PCI: 00:10.3 20 * [0x1860 - 0x187f] io
>> PCI: 00:0f.0 20 * [0x1880 - 0x188f] io
>> PCI: 00:0f.1 20 * [0x1890 - 0x189f] io
>> PCI: 00:0f.0 10 * [0x18a0 - 0x18a7] io
>> PCI: 00:0f.0 18 * [0x18a8 - 0x18af] io
>> PCI: 00:0f.0 14 * [0x18b0 - 0x18b3] io
>> PCI: 00:0f.0 1c * [0x18b4 - 0x18b7] io
>> PCI: 00:18.0 compute_resources_io: base: 18b8 size: 2000 align: 12
>> gran: 12 limit: ffff done
>> PCI: 00:18.0 00 * [0x0 - 0x1fff] io
>> PCI_DOMAIN: 0000 compute_resources_io: base: 2000 size: 2000 align: 12
>> gran: 0 limit: ffff done
>> PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran:
>> 0 limit: ffffffff
>> PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20
>> gran: 20 limit: ffffffffff
>> PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20
>> gran: 20 limit: ffffffff
>> PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20
>> gran: 20 limit: ffffffff done
>> PCI: 00:02.0 compute_resources_prefmem: base: 0 size: 0 align: 20
>> gran: 20 limit: ffffffffffffffff
>> PCI: 02:00.0 14 * [0x0 - 0xfffffff] prefmem
>> PCI: 00:02.0 compute_resources_prefmem: base: 10000000 size: 10000000
>> align: 28 gran: 20 limit: ffffffffffffffff done
>> PCI: 00:03.0 compute_resources_prefmem: base: 0 size: 0 align: 20
>> gran: 20 limit: ffffffffffffffff
>> PCI: 00:03.0 compute_resources_prefmem: base: 0 size: 0 align: 20
>> gran: 20 limit: ffffffffffffffff done
>> PCI: 00:13.0 compute_resources_prefmem: base: 0 size: 0 align: 20
>> gran: 20 limit: ffffffffffffffff
>> PCI: 00:13.0 compute_resources_prefmem: base: 0 size: 0 align: 20
>> gran: 20 limit: ffffffffffffffff done
>> PCI: 00:13.1 compute_resources_prefmem: base: 0 size: 0 align: 20
>> gran: 20 limit: ffffffffffffffff
>> PCI: 00:13.1 compute_resources_prefmem: base: 0 size: 0 align: 20
>> gran: 20 limit: ffffffffffffffff done
>> PCI: 00:00.0 10 * [0x0 - 0xfffffff] prefmem
>> PCI: 00:02.0 24 * [0x10000000 - 0x1fffffff] prefmem
>> PCI: 00:18.0 compute_resources_prefmem: base: 20000000 size: 20000000
>> align: 28 gran: 20 limit: ffffffff done
>> PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
>> limit: ffffffff
>> PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
>> limit: ffffffff
>> PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
>> limit: ffffffff done
>> PCI: 00:02.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
>> limit: ffffffff
>> PCI: 02:00.0 1c * [0x0 - 0x1ffffff] mem
>> PCI: 02:00.0 10 * [0x2000000 - 0x2ffffff] mem
>> PCI: 02:00.0 30 * [0x3000000 - 0x307ffff] mem
>> PCI: 00:02.0 compute_resources_mem: base: 3080000 size: 3100000 align:
>> 25 gran: 20 limit: ffffffff done
>> PCI: 00:03.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
>> limit: ffffffff
>> PCI: 00:03.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
>> limit: ffffffff done
>> PCI: 00:13.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
>> limit: ffffffff
>> PCI: 04:01.0 10 * [0x0 - 0x3fff] mem
>> PCI: 00:13.0 compute_resources_mem: base: 4000 size: 100000 align: 20
>> gran: 20 limit: ffffffff done
>> PCI: 00:13.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
>> limit: ffffffff
>> PCI: 00:13.1 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20
>> limit: ffffffff done
>> PCI: 00:00.5 61 * [0x0 - 0xfffffff] mem
>> PCI: 00:02.0 20 * [0x10000000 - 0x130fffff] mem
>> PCI: 00:13.0 20 * [0x13100000 - 0x131fffff] mem
>> PCI: 00:10.4 10 * [0x13200000 - 0x132000ff] mem
>> PCI: 00:12.0 14 * [0x13200100 - 0x132001ff] mem
>> PCI: 00:18.0 compute_resources_mem: base: 13200200 size: 13300000
>> align: 28 gran: 20 limit: ffffffff done
>> PCI: 00:18.0 02 * [0x0 - 0x1fffffff] prefmem
>> PCI: 00:18.0 01 * [0x20000000 - 0x332fffff] mem
>> PCI: 00:18.3 94 * [0x34000000 - 0x37ffffff] mem
>> PCI_DOMAIN: 0000 compute_resources_mem: base: 38000000 size: 38000000
>> align: 28 gran: 0 limit: ffffffff done
>> avoid_fixed_resources: PCI_DOMAIN: 0000
>> avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
>> avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
>> constrain_resources: PCI_DOMAIN: 0000
>> constrain_resources: PCI: 00:18.0
>> constrain_resources: PCI: 00:00.0
>> constrain_resources: PCI: 00:00.1
>> constrain_resources: PCI: 00:00.2
>> constrain_resources: PCI: 00:00.3
>> constrain_resources: PCI: 00:00.4
>> constrain_resources: PCI: 00:00.5
>> constrain_resources: PCI: 00:00.6
>> constrain_resources: PCI: 00:00.7
>> constrain_resources: PCI: 00:01.0
>> constrain_resources: PCI: 00:02.0
>> constrain_resources: PCI: 02:00.0
>> constrain_resources: PCI: 00:03.0
>> constrain_resources: PCI: 00:0f.0
>> constrain_resources: PCI: 00:0f.1
>> constrain_resources: PCI: 00:10.0
>> constrain_resources: PCI: 00:10.1
>> constrain_resources: PCI: 00:10.2
>> constrain_resources: PCI: 00:10.3
>> constrain_resources: PCI: 00:10.4
>> constrain_resources: PCI: 00:11.0
>> constrain_resources: I2C: 01:50
>> constrain_resources: I2C: 01:51
>> constrain_resources: I2C: 01:52
>> constrain_resources: I2C: 01:53
>> constrain_resources: PNP: 002e.0
>> constrain_resources: PNP: 002e.1
>> constrain_resources: PNP: 002e.3
>> constrain_resources: PNP: 002e.4
>> constrain_resources: PCI: 00:11.7
>> constrain_resources: PCI: 00:12.0
>> constrain_resources: PCI: 00:13.0
>> constrain_resources: PCI: 04:01.0
>> constrain_resources: PCI: 00:13.1
>> constrain_resources: PCI: 00:18.1
>> constrain_resources: PCI: 00:18.2
>> constrain_resources: PCI: 00:18.3
>> avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000000 limit 0000ffff
>> lim->base 00001000 lim->limit 0000ffff
>> avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000100 limit ffffffff
>> lim->base 000c0000 lim->limit febfffff
>> Setting resources...
>> PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:2000 align:12
>> gran:0 limit:ffff
>> Assigned: PCI: 00:18.0 00 * [0x1000 - 0x2fff] io
>> PCI_DOMAIN: 0000 allocate_resources_io: next_base: 3000 size: 2000
>> align: 12 gran: 0 done
>> PCI: 00:18.0 allocate_resources_io: base:1000 size:2000 align:12
>> gran:12 limit:ffff
>> Assigned: PCI: 00:02.0 1c * [0x1000 - 0x1fff] io
>> Assigned: PCI: 00:0f.0 24 * [0x2000 - 0x20ff] io
>> Assigned: PCI: 00:12.0 10 * [0x2400 - 0x24ff] io
>> Assigned: PCI: 00:10.0 20 * [0x2800 - 0x281f] io
>> Assigned: PCI: 00:10.1 20 * [0x2820 - 0x283f] io
>> Assigned: PCI: 00:10.2 20 * [0x2840 - 0x285f] io
>> Assigned: PCI: 00:10.3 20 * [0x2860 - 0x287f] io
>> Assigned: PCI: 00:0f.0 20 * [0x2880 - 0x288f] io
>> Assigned: PCI: 00:0f.1 20 * [0x2890 - 0x289f] io
>> Assigned: PCI: 00:0f.0 10 * [0x28a0 - 0x28a7] io
>> Assigned: PCI: 00:0f.0 18 * [0x28a8 - 0x28af] io
>> Assigned: PCI: 00:0f.0 14 * [0x28b0 - 0x28b3] io
>> Assigned: PCI: 00:0f.0 1c * [0x28b4 - 0x28b7] io
>> PCI: 00:18.0 allocate_resources_io: next_base: 28b8 size: 2000 align:
>> 12 gran: 12 done
>> PCI: 00:01.0 allocate_resources_io: base:ffff size:0 align:12 gran:12
>> limit:ffff
>> PCI: 00:01.0 allocate_resources_io: next_base: ffff size: 0 align: 12
>> gran: 12 done
>> PCI: 00:02.0 allocate_resources_io: base:1000 size:1000 align:12
>> gran:12 limit:ffff
>> Assigned: PCI: 02:00.0 24 * [0x1000 - 0x107f] io
>> PCI: 00:02.0 allocate_resources_io: next_base: 1080 size: 1000 align:
>> 12 gran: 12 done
>> PCI: 00:03.0 allocate_resources_io: base:ffff size:0 align:12 gran:12
>> limit:ffff
>> PCI: 00:03.0 allocate_resources_io: next_base: ffff size: 0 align: 12
>> gran: 12 done
>> PCI: 00:13.0 allocate_resources_io: base:ffff size:0 align:12 gran:12
>> limit:ffff
>> PCI: 00:13.0 allocate_resources_io: next_base: ffff size: 0 align: 12
>> gran: 12 done
>> PCI: 00:13.1 allocate_resources_io: base:ffff size:0 align:12 gran:12
>> limit:ffff
>> PCI: 00:13.1 allocate_resources_io: next_base: ffff size: 0 align: 12
>> gran: 12 done
>> PCI_DOMAIN: 0000 allocate_resources_mem: base:c0000000 size:38000000
>> align:28 gran:0 limit:febfffff
>> Assigned: PCI: 00:18.0 02 * [0xc0000000 - 0xdfffffff] prefmem
>> Assigned: PCI: 00:18.0 01 * [0xe0000000 - 0xf32fffff] mem
>> Assigned: PCI: 00:18.3 94 * [0xf4000000 - 0xf7ffffff] mem
>> PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f8000000 size:
>> 38000000 align: 28 gran: 0 done
>> PCI: 00:18.0 allocate_resources_prefmem: base:c0000000 size:20000000
>> align:28 gran:20 limit:febfffff
>> Assigned: PCI: 00:00.0 10 * [0xc0000000 - 0xcfffffff] prefmem
>> Assigned: PCI: 00:02.0 24 * [0xd0000000 - 0xdfffffff] prefmem
>> PCI: 00:18.0 allocate_resources_prefmem: next_base: e0000000 size:
>> 20000000 align: 28 gran: 20 done
>> PCI: 00:01.0 allocate_resources_prefmem: base:febfffff size:0 align:20
>> gran:20 limit:febfffff
>> PCI: 00:01.0 allocate_resources_prefmem: next_base: febfffff size: 0
>> align: 20 gran: 20 done
>> PCI: 00:02.0 allocate_resources_prefmem: base:d0000000 size:10000000
>> align:28 gran:20 limit:febfffff
>> Assigned: PCI: 02:00.0 14 * [0xd0000000 - 0xdfffffff] prefmem
>> PCI: 00:02.0 allocate_resources_prefmem: next_base: e0000000 size:
>> 10000000 align: 28 gran: 20 done
>> PCI: 00:03.0 allocate_resources_prefmem: base:febfffff size:0 align:20
>> gran:20 limit:febfffff
>> PCI: 00:03.0 allocate_resources_prefmem: next_base: febfffff size: 0
>> align: 20 gran: 20 done
>> PCI: 00:13.0 allocate_resources_prefmem: base:febfffff size:0 align:20
>> gran:20 limit:febfffff
>> PCI: 00:13.0 allocate_resources_prefmem: next_base: febfffff size: 0
>> align: 20 gran: 20 done
>> PCI: 00:13.1 allocate_resources_prefmem: base:febfffff size:0 align:20
>> gran:20 limit:febfffff
>> PCI: 00:13.1 allocate_resources_prefmem: next_base: febfffff size: 0
>> align: 20 gran: 20 done
>> PCI: 00:18.0 allocate_resources_mem: base:e0000000 size:13300000
>> align:28 gran:20 limit:febfffff
>> Assigned: PCI: 00:00.5 61 * [0xe0000000 - 0xefffffff] mem
>> Assigned: PCI: 00:02.0 20 * [0xf0000000 - 0xf30fffff] mem
>> Assigned: PCI: 00:13.0 20 * [0xf3100000 - 0xf31fffff] mem
>> Assigned: PCI: 00:10.4 10 * [0xf3200000 - 0xf32000ff] mem
>> Assigned: PCI: 00:12.0 14 * [0xf3200100 - 0xf32001ff] mem
>> PCI: 00:18.0 allocate_resources_mem: next_base: f3200200 size:
>> 13300000 align: 28 gran: 20 done
>> PCI: 00:01.0 allocate_resources_mem: base:febfffff size:0 align:20
>> gran:20 limit:febfffff
>> PCI: 00:01.0 allocate_resources_mem: next_base: febfffff size: 0
>> align: 20 gran: 20 done
>> PCI: 00:02.0 allocate_resources_mem: base:f0000000 size:3100000
>> align:25 gran:20 limit:febfffff
>> Assigned: PCI: 02:00.0 1c * [0xf0000000 - 0xf1ffffff] mem
>> Assigned: PCI: 02:00.0 10 * [0xf2000000 - 0xf2ffffff] mem
>> Assigned: PCI: 02:00.0 30 * [0xf3000000 - 0xf307ffff] mem
>> PCI: 00:02.0 allocate_resources_mem: next_base: f3080000 size: 3100000
>> align: 25 gran: 20 done
>> PCI: 00:03.0 allocate_resources_mem: base:febfffff size:0 align:20
>> gran:20 limit:febfffff
>> PCI: 00:03.0 allocate_resources_mem: next_base: febfffff size: 0
>> align: 20 gran: 20 done
>> PCI: 00:13.0 allocate_resources_mem: base:f3100000 size:100000
>> align:20 gran:20 limit:febfffff
>> Assigned: PCI: 04:01.0 10 * [0xf3100000 - 0xf3103fff] mem
>> PCI: 00:13.0 allocate_resources_mem: next_base: f3104000 size: 100000
>> align: 20 gran: 20 done
>> PCI: 00:13.1 allocate_resources_mem: base:febfffff size:0 align:20
>> gran:20 limit:febfffff
>> PCI: 00:13.1 allocate_resources_mem: next_base: febfffff size: 0
>> align: 20 gran: 20 done
>> Root Device assign_resources, bus 0 link: 0
>> 0: mmio_basek=00300000, basek=00000300, limitk=00100000
>> PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
>> amdk8_set_resource, enabling legacy VGA IO forwarding for PCI: 00:18.0
>> link 0x0
>> PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000002fff] size 0x00002000 gran
>> 0x0c io <node 0 link 0>
>> PCI: 00:18.0 1b8 <- [0x00c0000000 - 0x00dfffffff] size 0x20000000 gran
>> 0x14 prefmem <node 0 link 0>
>> PCI: 00:18.0 1b0 <- [0x00e0000000 - 0x00f32fffff] size 0x13300000 gran
>> 0x14 mem <node 0 link 0>
>> PCI: 00:18.0 1a8 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran
>> 0x00 mem <node 0 link 0>
>> PCI: 00:18.0 assign_resources, bus 0 link: 0
>> PCI: 00:00.0 10 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran
>> 0x1c prefmem
>> PCI: 00:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran
>> 0x0c bus 01 io
>> PCI: 00:01.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
>> 0x14 bus 01 prefmem
>> PCI: 00:01.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
>> 0x14 bus 01 mem
>> PCI: 00:02.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran
>> 0x0c bus 02 io
>> PCI: 00:02.0 24 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran
>> 0x14 bus 02 prefmem
>> PCI: 00:02.0 20 <- [0x00f0000000 - 0x00f30fffff] size 0x03100000 gran
>> 0x14 bus 02 mem
>> PCI: 00:02.0 assign_resources, bus 2 link: 0
>> PCI: 02:00.0 10 <- [0x00f2000000 - 0x00f2ffffff] size 0x01000000 gran
>> 0x18 mem
>> PCI: 02:00.0 14 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran
>> 0x1c prefmem64
>> PCI: 02:00.0 1c <- [0x00f0000000 - 0x00f1ffffff] size 0x02000000 gran
>> 0x19 mem64
>> PCI: 02:00.0 24 <- [0x0000001000 - 0x000000107f] size 0x00000080 gran
>> 0x07 io
>> PCI: 02:00.0 30 <- [0x00f3000000 - 0x00f307ffff] size 0x00080000 gran
>> 0x13 romem
>> PCI: 00:02.0 assign_resources, bus 2 link: 0
>> PCI: 00:03.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran
>> 0x0c bus 03 io
>> PCI: 00:03.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
>> 0x14 bus 03 prefmem
>> PCI: 00:03.0 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
>> 0x14 bus 03 mem
>> PCI: 00:0f.0 10 <- [0x00000028a0 - 0x00000028a7] size 0x00000008 gran
>> 0x03 io
>> PCI: 00:0f.0 14 <- [0x00000028b0 - 0x00000028b3] size 0x00000004 gran
>> 0x02 io
>> PCI: 00:0f.0 18 <- [0x00000028a8 - 0x00000028af] size 0x00000008 gran
>> 0x03 io
>> PCI: 00:0f.0 1c <- [0x00000028b4 - 0x00000028b7] size 0x00000004 gran
>> 0x02 io
>> PCI: 00:0f.0 20 <- [0x0000002880 - 0x000000288f] size 0x00000010 gran
>> 0x04 io
>> PCI: 00:0f.0 24 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran
>> 0x08 io
>> PCI: 00:0f.1 20 <- [0x0000002890 - 0x000000289f] size 0x00000010 gran
>> 0x04 io
>> PCI: 00:10.0 20 <- [0x0000002800 - 0x000000281f] size 0x00000020 gran
>> 0x05 io
>> PCI: 00:10.1 20 <- [0x0000002820 - 0x000000283f] size 0x00000020 gran
>> 0x05 io
>> PCI: 00:10.2 20 <- [0x0000002840 - 0x000000285f] size 0x00000020 gran
>> 0x05 io
>> PCI: 00:10.3 20 <- [0x0000002860 - 0x000000287f] size 0x00000020 gran
>> 0x05 io
>> PCI: 00:10.4 10 <- [0x00f3200000 - 0x00f32000ff] size 0x00000100 gran
>> 0x08 mem
>> PCI: 00:11.0 assign_resources, bus 1 link: 0
>> PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran
>> 0x03 io
>> PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran
>> 0x00 irq
>> PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran
>> 0x00 drq
>> PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran
>> 0x03 io
>> PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran
>> 0x00 irq
>> PNP: 002e.3 60 <- [0x0000000378 - 0x000000037b] size 0x00000004 gran
>> 0x02 io
>> PNP: 002e.3 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran
>> 0x00 irq
>> ERROR: PNP: 002e.3 74 drq size: 0x0000000001 not assigned
>> PNP: 002e.4 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran
>> 0x03 io
>> PNP: 002e.4 62 <- [0x0000000230 - 0x0000000237] size 0x00000008 gran
>> 0x03 io
>> PNP: 002e.4 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran
>> 0x00 irq
>> PCI: 00:11.0 assign_resources, bus 1 link: 0
>> PCI: 00:12.0 10 <- [0x0000002400 - 0x00000024ff] size 0x00000100 gran
>> 0x08 io
>> PCI: 00:12.0 14 <- [0x00f3200100 - 0x00f32001ff] size 0x00000100 gran
>> 0x08 mem
>> PCI: 00:13.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran
>> 0x0c bus 04 io
>> PCI: 00:13.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
>> 0x14 bus 04 prefmem
>> PCI: 00:13.0 20 <- [0x00f3100000 - 0x00f31fffff] size 0x00100000 gran
>> 0x14 bus 04 mem
>> PCI: 00:13.0 assign_resources, bus 4 link: 0
>> PCI: 04:01.0 10 <- [0x00f3100000 - 0x00f3103fff] size 0x00004000 gran
>> 0x0e mem64
>> PCI: 00:13.0 assign_resources, bus 4 link: 0
>> PCI: 00:13.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran
>> 0x0c bus 05 io
>> PCI: 00:13.1 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
>> 0x14 bus 05 prefmem
>> PCI: 00:13.1 20 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran
>> 0x14 bus 05 mem
>> PCI: 00:18.0 assign_resources, bus 0 link: 0
>> PCI: 00:18.3 94 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran
>> 0x1a mem <gart>
>> PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
>> Root Device assign_resources, bus 0 link: 0
>> Done setting resources.
>> Show resources in subtree (Root Device)...After assigning values.
>> Root Device links 1 child on link 0 APIC_CLUSTER: 0
>> APIC_CLUSTER: 0 links 1 child on link 0 APIC: 00
>> APIC: 00 links 0 child on link 0 NULL
>> APIC: 01 links 0 child on link 0 NULL
>> PCI_DOMAIN: 0000 links 1 child on link 0 PCI: 00:18.0
>> PCI_DOMAIN: 0000 resource base 1000 size 2000 align 12 gran 0 limit
>> ffff flags 40040100 index 10000000
>> PCI_DOMAIN: 0000 resource base c0000000 size 38000000 align 28 gran 0
>> limit febfffff flags 40040200 index 10000100
>> PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0
>> flags e0004200 index 10
>> PCI_DOMAIN: 0000 resource base c0000 size 3ff40000 align 0 gran 0
>> limit 0 flags e0004200 index 20
>> PCI: 00:18.0 links 1 child on link 0 PCI: 00:00.0
>> PCI: 00:18.0 resource base 1000 size 2000 align 12 gran 12 limit ffff
>> flags 60080100 index 1c0
>> PCI: 00:18.0 resource base c0000000 size 20000000 align 28 gran 20
>> limit febfffff flags 60081200 index 1b8
>> PCI: 00:18.0 resource base e0000000 size 13300000 align 28 gran 20
>> limit febfffff flags 60080200 index 1b0
>> PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit
>> ffffffff flags e0000200 index 1a8
>> PCI: 00:00.0 links 0 child on link 0 NULL
>> PCI: 00:00.0 resource base c0000000 size 10000000 align 28 gran 28
>> limit febfffff flags 60001200 index 10
>> PCI: 00:00.1 links 0 child on link 0 NULL
>> PCI: 00:00.2 links 0 child on link 0 NULL
>> PCI: 00:00.3 links 0 child on link 0 NULL
>> PCI: 00:00.4 links 0 child on link 0 NULL
>> PCI: 00:00.5 links 0 child on link 0 NULL
>> PCI: 00:00.5 resource base fecc0000 size 100 align 8 gran 8 limit
>> fecc00ff flags e0000200 index 40
>> PCI: 00:00.5 resource base e0000000 size 10000000 align 28 gran 28
>> limit febfffff flags 60000200 index 61
>> PCI: 00:00.6 links 0 child on link 0 NULL
>> PCI: 00:00.7 links 0 child on link 0 NULL
>> PCI: 00:01.0 links 1 child on link 0 NULL
>> PCI: 00:01.0 resource base ffff size 0 align 12 gran 12 limit ffff
>> flags 60080102 index 1c
>> PCI: 00:01.0 resource base febfffff size 0 align 20 gran 20 limit
>> febfffff flags 60081202 index 24
>> PCI: 00:01.0 resource base febfffff size 0 align 20 gran 20 limit
>> febfffff flags 60080202 index 20
>> PCI: 00:02.0 links 1 child on link 0 PCI: 02:00.0
>> PCI: 00:02.0 resource base 1000 size 1000 align 12 gran 12 limit ffff
>> flags 60080102 index 1c
>> PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 20
>> limit febfffff flags 60081202 index 24
>> PCI: 00:02.0 resource base f0000000 size 3100000 align 25 gran 20
>> limit febfffff flags 60080202 index 20
>> PCI: 02:00.0 links 0 child on link 0 NULL
>> PCI: 02:00.0 resource base f2000000 size 1000000 align 24 gran 24
>> limit febfffff flags 60000200 index 10
>> PCI: 02:00.0 resource base d0000000 size 10000000 align 28 gran 28
>> limit febfffff flags 60001201 index 14
>> PCI: 02:00.0 resource base f0000000 size 2000000 align 25 gran 25
>> limit febfffff flags 60000201 index 1c
>> PCI: 02:00.0 resource base 1000 size 80 align 7 gran 7 limit ffff
>> flags 60000100 index 24
>> PCI: 02:00.0 resource base f3000000 size 80000 align 19 gran 19 limit
>> febfffff flags 60002200 index 30
>> PCI: 00:03.0 links 1 child on link 0 NULL
>> PCI: 00:03.0 resource base ffff size 0 align 12 gran 12 limit ffff
>> flags 60080102 index 1c
>> PCI: 00:03.0 resource base febfffff size 0 align 20 gran 20 limit
>> febfffff flags 60081202 index 24
>> PCI: 00:03.0 resource base febfffff size 0 align 20 gran 20 limit
>> febfffff flags 60080202 index 20
>> PCI: 00:0f.0 links 0 child on link 0 NULL
>> PCI: 00:0f.0 resource base 28a0 size 8 align 3 gran 3 limit ffff flags
>> 60000100 index 10
>> PCI: 00:0f.0 resource base 28b0 size 4 align 2 gran 2 limit ffff flags
>> 60000100 index 14
>> PCI: 00:0f.0 resource base 28a8 size 8 align 3 gran 3 limit ffff flags
>> 60000100 index 18
>> PCI: 00:0f.0 resource base 28b4 size 4 align 2 gran 2 limit ffff flags
>> 60000100 index 1c
>> PCI: 00:0f.0 resource base 2880 size 10 align 4 gran 4 limit ffff
>> flags 60000100 index 20
>> PCI: 00:0f.0 resource base 2000 size 100 align 8 gran 8 limit ffff
>> flags 60000100 index 24
>> PCI: 00:0f.1 links 0 child on link 0 NULL
>> PCI: 00:0f.1 resource base 2890 size 10 align 4 gran 4 limit ffff
>> flags 60000100 index 20
>> PCI: 00:10.0 links 0 child on link 0 NULL
>> PCI: 00:10.0 resource base 2800 size 20 align 5 gran 5 limit ffff
>> flags 60000100 index 20
>> PCI: 00:10.1 links 0 child on link 0 NULL
>> PCI: 00:10.1 resource base 2820 size 20 align 5 gran 5 limit ffff
>> flags 60000100 index 20
>> PCI: 00:10.2 links 0 child on link 0 NULL
>> PCI: 00:10.2 resource base 2840 size 20 align 5 gran 5 limit ffff
>> flags 60000100 index 20
>> PCI: 00:10.3 links 0 child on link 0 NULL
>> PCI: 00:10.3 resource base 2860 size 20 align 5 gran 5 limit ffff
>> flags 60000100 index 20
>> PCI: 00:10.4 links 0 child on link 0 NULL
>> PCI: 00:10.4 resource base f3200000 size 100 align 8 gran 8 limit
>> febfffff flags 60000200 index 10
>> PCI: 00:11.0 links 1 child on link 0 I2C: 01:50
>> PCI: 00:11.0 resource base 500 size 80 align 0 gran 0 limit ffff flags
>> e0000100 index 88
>> PCI: 00:11.0 resource base 4d0 size 2 align 0 gran 0 limit ffff flags
>> e0000100 index 3
>> PCI: 00:11.0 resource base 400 size 10 align 0 gran 0 limit ffff flags
>> e0000100 index d0
>> PCI: 00:11.0 resource base fec00000 size 100 align 8 gran 8 limit
>> ffffffff flags e0000200 index 44
>> PCI: 00:11.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags
>> c0000100 index 1
>> I2C: 01:50 links 0 child on link 0 NULL
>> I2C: 01:51 links 0 child on link 0 NULL
>> I2C: 01:52 links 0 child on link 0 NULL
>> I2C: 01:53 links 0 child on link 0 NULL
>> PNP: 002e.0 links 0 child on link 0 NULL
>> PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit fff flags
>> e0000100 index 60
>> PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags
>> e0000400 index 70
>> PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags
>> e0000800 index 74
>> PNP: 002e.1 links 0 child on link 0 NULL
>> PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit fff flags
>> e0000100 index 60
>> PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags
>> e0000400 index 70
>> PNP: 002e.2 links 0 child on link 0 NULL
>> PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit fff flags
>> c0000100 index 60
>> PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags
>> c0000400 index 70
>> PNP: 002e.3 links 0 child on link 0 NULL
>> PNP: 002e.3 resource base 378 size 4 align 2 gran 2 limit fff flags
>> e0000100 index 60
>> PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags
>> e0000400 index 70
>> PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800
>> index 74
>> PNP: 002e.4 links 0 child on link 0 NULL
>> PNP: 002e.4 resource base 290 size 8 align 3 gran 3 limit fff flags
>> e0000100 index 60
>> PNP: 002e.4 resource base 230 size 8 align 3 gran 3 limit fff flags
>> e0000100 index 62
>> PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags
>> e0000400 index 70
>> PNP: 002e.5 links 0 child on link 0 NULL
>> PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit ffffffff flags
>> 100 index 60
>> PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit ffffffff flags
>> 100 index 62
>> PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400
>> index 70
>> PNP: 002e.6 links 0 child on link 0 NULL
>> PNP: 002e.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400
>> index 70
>> PNP: 002e.7 links 0 child on link 0 NULL
>> PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags
>> 100 index 60
>> PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit fff flags 100
>> index 62
>> PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit fff flags 100
>> index 64
>> PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400
>> index 70
>> PNP: 002e.8 links 0 child on link 0 NULL
>> PNP: 002e.8 resource base 0 size 8 align 3 gran 3 limit fff flags 100
>> index 60
>> PNP: 002e.8 resource base 0 size 1 align 0 gran 0 limit 0 flags 400
>> index 70
>> PNP: 002e.9 links 0 child on link 0 NULL
>> PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit ffffffff flags
>> 100 index 60
>> PNP: 002e.a links 0 child on link 0 NULL
>> PNP: 002e.a resource base 0 size 8 align 3 gran 3 limit fff flags 100
>> index 60
>> PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400
>> index 70
>> PCI: 00:11.7 links 0 child on link 0 NULL
>> PCI: 00:12.0 links 0 child on link 0 NULL
>> PCI: 00:12.0 resource base 2400 size 100 align 8 gran 8 limit ffff
>> flags 60000100 index 10
>> PCI: 00:12.0 resource base f3200100 size 100 align 8 gran 8 limit
>> febfffff flags 60000200 index 14
>> PCI: 00:13.0 links 1 child on link 0 PCI: 04:01.0
>> PCI: 00:13.0 resource base ffff size 0 align 12 gran 12 limit ffff
>> flags 60080102 index 1c
>> PCI: 00:13.0 resource base febfffff size 0 align 20 gran 20 limit
>> febfffff flags 60081202 index 24
>> PCI: 00:13.0 resource base f3100000 size 100000 align 20 gran 20 limit
>> febfffff flags 60080202 index 20
>> PCI: 04:01.0 links 0 child on link 0 NULL
>> PCI: 04:01.0 resource base f3100000 size 4000 align 14 gran 14 limit
>> febfffff flags 60000201 index 10
>> PCI: 00:13.1 links 1 child on link 0 NULL
>> PCI: 00:13.1 resource base ffff size 0 align 12 gran 12 limit ffff
>> flags 60080102 index 1c
>> PCI: 00:13.1 resource base febfffff size 0 align 20 gran 20 limit
>> febfffff flags 60081202 index 24
>> PCI: 00:13.1 resource base febfffff size 0 align 20 gran 20 limit
>> febfffff flags 60080202 index 20
>> PCI: 00:18.1 links 0 child on link 0 NULL
>> PCI: 00:18.2 links 0 child on link 0 NULL
>> PCI: 00:18.3 links 0 child on link 0 NULL
>> PCI: 00:18.3 resource base f4000000 size 4000000 align 26 gran 26
>> limit febfffff flags 60000200 index 94
>> Done allocating resources.
>> Enabling resources...
>> PCI: 00:18.0 cmd <- 00
>> PCI: 00:00.0 cmd <- 02
>> PCI: 00:00.1 cmd <- 06
>> PCI: 00:00.2 cmd <- 06
>> PCI: 00:00.3 cmd <- 06
>> PCI: 00:00.4 cmd <- 06
>> PCI: 00:00.5 cmd <- 06
>> PCI: 00:00.6 cmd <- 06
>> PCI: 00:00.7 cmd <- 06
>> PCI: 00:01.0 bridge ctrl <- 0017
>> PCI: 00:01.0 cmd <- 04
>> PCI: 00:02.0 bridge ctrl <- 000b
>> PCI: 00:02.0 cmd <- 07
>> PCI: 02:00.0 cmd <- 03
>> PCI: 00:03.0 bridge ctrl <- 0003
>> PCI: 00:03.0 cmd <- 00
>> PCI: 00:0f.0 cmd <- 01
>> PCI: 00:0f.1 cmd <- 01
>> PCI: 00:10.0 cmd <- 01
>> PCI: 00:10.1 cmd <- 01
>> PCI: 00:10.2 cmd <- 01
>> PCI: 00:10.3 cmd <- 01
>> PCI: 00:10.4 cmd <- 02
>> PCI: 00:11.0 cmd <- 01
>> I2C: 01:50 missing enable_resources
>> I2C: 01:51 missing enable_resources
>> I2C: 01:52 missing enable_resources
>> I2C: 01:53 missing enable_resources
>> PCI: 00:11.7 cmd <- 00
>> PCI: 00:12.0 cmd <- 03
>> PCI: 00:13.0 bridge ctrl <- 0003
>> PCI: 00:13.0 cmd <- 07
>> PCI: 04:01.0 cmd <- 02
>> PCI: 00:13.1 bridge ctrl <- 0003
>> PCI: 00:13.1 cmd <- 01
>> PCI: 00:18.1 subsystem <- 1043/00
>> PCI: 00:18.1 cmd <- 00
>> PCI: 00:18.2 subsystem <- 1043/00
>> PCI: 00:18.2 cmd <- 00
>> PCI: 00:18.3 cmd <- 00
>> done.
>> Initializing devices...
>> Root Device init
>> APIC_CLUSTER: 0 init
>> start_eip=0x0000e000, offset=0x00100000, code_size=0x0000005b
>> Initializing CPU #0
>> CPU: vendor AMD device 60fb2
>> CPU: family 0f, model 6b, stepping 02
>> Enabling cache
>> Setting fixed MTRRs(0-88) type: UC
>> Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
>> Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
>> DONE fixed MTRRs
>> Setting variable MTRR 0, base: 0MB, range: 1024MB, type WB
>> ADDRESS_MASK_HIGH=0xff
>> Zero-sized MTRR range @0KB
>> DONE variable MTRRs
>> Clear out the extra MTRR's
>> call enable_var_mtrr()
>> Leave x86_setup_var_mtrrs
>> MTRR check
>> Fixed MTRRs : Enabled
>> Variable MTRRs: Enabled
>> CPU model AMD Athlon(tm) 64 X2 Dual Core Processor 5200+
>> Setting up local apic... apic_id: 0x00 done.
>> ECC Disabled
>> CPU #0 initialized
>> Asserting INIT.
>> Waiting for send to finish...
>> +Deasserting INIT.
>> Waiting for send to finish...
>> +#startup loops: 2.
>> Sending STARTUP #1 to 1.
>> After apic_write.
>> Initializing CPU #1
>> Startup point 1.
>> Waiting for send to finish...
>> +CPU: vendor AMD device 60fb2
>> Sending STARTUP #2 to 1.
>> After apic_write.
>> CPU: family 0f, model 6b, stepping 02
>> Startup point 1.
>> Waiting for send to finish...
>> +Enabling cache
>> After Startup.
>> Waiting for 1 CPUS to stop
>> Setting fixed MTRRs(0-88) type: UC
>> Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
>> Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
>> DONE fixed MTRRs
>> Setting variable MTRR 0, base: 0MB, range: 1024MB, type WB
>> ADDRESS_MASK_HIGH=0xff
>> Zero-sized MTRR range @0KB
>> DONE variable MTRRs
>> Clear out the extra MTRR's
>> call enable_var_mtrr()
>> Leave x86_setup_var_mtrrs
>> MTRR check
>> Fixed MTRRs : Enabled
>> Variable MTRRs: Enabled
>> CPU model AMD Athlon(tm) 64 X2 Dual Core Processor 5200+
>> Setting up local apic... apic_id: 0x01 done.
>> CPU #1 initialized
>> All AP CPUs stopped
>> PCI: 00:18.0 init
>> PCI: 00:00.0 init
>> PCI: 00:0f.1 init
>> Primary IDE interface enabled
>> Secondary IDE interface enabled
>> Enables in reg 0x40 read back as 0xf
>> Enables in reg 0x42 read back as 0x9
>> PCI: 00:11.0 init
>> RTC Init
>> RTC: Checksum invalid zeroing cmos
>> Invalid CMOS LB checksum
>> IOAPIC: Initializing IOAPIC at 0xfec00000
>> IOAPIC: Bootstrap Processor Local APIC = 00
>> IOAPIC: ID = 0x02
>> IOAPIC: 23 interrupts
>> IOAPIC: Enabling interrupts on FSB
>> IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
>> IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
>> IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
>> IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
>> IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
>> IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
>> IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
>> IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
>> IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
>> Keyboard init...
>> Keyboard controller output buffer result timeout
>> 00: 06 11 72 33 01 00 10 02 00 00 01 06 00 00 80 00
>> 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00
>> 40: 44 7f f8 0b 00 00 10 00 0c 20 00 00 44 00 00 00
>> 50: c0 1d 09 00 00 00 00 00 43 80 00 0b 00 00 00 00
>> 60: 00 00 00 00 00 00 00 04 80 00 d0 fe 80 00 00 00
>> 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 80: 20 84 59 00 b2 30 00 00 01 05 00 00 05 18 00 00
>> 90: 00 7f ff 88 a0 cc 07 02 00 bf 00 00 00 00 00 00
>> a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> b0: 00 00 00 00 00 00 00 00 00 00 00 00 20 d0 fe 00
>> c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00
>> d0: 01 04 01 00 00 00 00 00 00 00 00 00 00 00 00 00
>> e0: 00 00 00 00 04 40 08 00 00 00 00 00 04 00 00 00
>> f0: 00 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00
>> PNP: 002e.0 init
>> PNP: 002e.1 init
>> PNP: 002e.3 init
>> PNP: 002e.4 init
>> PCI: 00:18.1 init
>> Check CBFS header at fffffc6e
>> magic is 4f524243
>> Found CBFS header at fffffc6e
>> Check fallback/romstage
>> CBFS: follow chain: fff80000 + 38 + b885 + align -> fff8b8c0
>> Check fallback/coreboot_ram
>> CBFS: follow chain: fff8b8c0 + 38 + c97a + align -> fff98280
>> Check fallback/payload
>> CBFS: follow chain: fff98280 + 38 + 9dfb + align -> fffa20c0
>> Check
>> CBFS: follow chain: fffa20c0 + 28 + 5db86 + align -> fffffc80
>> CBFS: Could not find file pci1022,1101.rom
>> PCI: 00:18.2 init
>> Check CBFS header at fffffc6e
>> magic is 4f524243
>> Found CBFS header at fffffc6e
>> Check fallback/romstage
>> CBFS: follow chain: fff80000 + 38 + b885 + align -> fff8b8c0
>> Check fallback/coreboot_ram
>> CBFS: follow chain: fff8b8c0 + 38 + c97a + align -> fff98280
>> Check fallback/payload
>> CBFS: follow chain: fff98280 + 38 + 9dfb + align -> fffa20c0
>> Check
>> CBFS: follow chain: fffa20c0 + 28 + 5db86 + align -> fffffc80
>> CBFS: Could not find file pci1022,1102.rom
>> PCI: 00:18.3 init
>> NB: Function 3 Misc Control.. done.
>> PCI: 00:00.3 init
>> PCI: 00:00.4 init
>> Check CBFS header at fffffc6e
>> magic is 4f524243
>> Found CBFS header at fffffc6e
>> Check fallback/romstage
>> CBFS: follow chain: fff80000 + 38 + b885 + align -> fff8b8c0
>> Check fallback/coreboot_ram
>> CBFS: follow chain: fff8b8c0 + 38 + c97a + align -> fff98280
>> Check fallback/payload
>> CBFS: follow chain: fff98280 + 38 + 9dfb + align -> fffa20c0
>> Check
>> CBFS: follow chain: fffa20c0 + 28 + 5db86 + align -> fffffc80
>> CBFS: Could not find file pci1106,4336.rom
>> PCI: 00:00.6 init
>> Check CBFS header at fffffc6e
>> magic is 4f524243
>> Found CBFS header at fffffc6e
>> Check fallback/romstage
>> CBFS: follow chain: fff80000 + 38 + b885 + align -> fff8b8c0
>> Check fallback/coreboot_ram
>> CBFS: follow chain: fff8b8c0 + 38 + c97a + align -> fff98280
>> Check fallback/payload
>> CBFS: follow chain: fff98280 + 38 + 9dfb + align -> fffa20c0
>> Check
>> CBFS: follow chain: fffa20c0 + 28 + 5db86 + align -> fffffc80
>> CBFS: Could not find file pci1106,6290.rom
>> PCI: 00:00.7 init
>> PCI: 00:0f.0 init
>> Configuring VIA SATA controller
>> PCI: 00:10.0 init
>> PCI: 00:10.1 init
>> PCI: 00:10.2 init
>> PCI: 00:10.3 init
>> PCI: 00:10.4 init
>> PCI: 00:11.7 init
>> 00: 06 11 7e 28 00 00 10 22 00 00 00 06 00 00 00 00
>> 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 7e 33
>> 30: 00 00 00 00 58 00 00 00 00 00 00 00 00 00 00 00
>> 40: f4 24 00 80 82 00 00 00 a3 3b 88 80 82 44 00 43
>> 50: 00 03 33 01 00 04 01 40 08 00 01 80 00 00 00 00
>> 60: 00 ff ff 30 30 00 00 00 00 00 00 00 00 00 00 00
>> 70: c2 c8 ee 01 3c 0f 50 48 01 00 00 00 77 00 12 12
>> 80: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> a0: fd 3f df 00 00 00 00 e0 00 00 00 00 00 00 00 00
>> b0: 00 00 00 00 00 00 00 60 68 88 88 89 00 03 00 00
>> c0: 01 00 02 00 00 00 00 00 0c 20 00 00 00 00 00 00
>> d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> e0: 00 00 00 00 00 00 39 00 00 00 00 00 00 00 00 00
>> f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>> PCI: 02:00.0 init
>> Check CBFS header at fffffc6e
>> magic is 4f524243
>> Found CBFS header at fffffc6e
>> Check fallback/romstage
>> CBFS: follow chain: fff80000 + 38 + b885 + align -> fff8b8c0
>> Check fallback/coreboot_ram
>> CBFS: follow chain: fff8b8c0 + 38 + c97a + align -> fff98280
>> Check fallback/payload
>> CBFS: follow chain: fff98280 + 38 + 9dfb + align -> fffa20c0
>> Check
>> CBFS: follow chain: fffa20c0 + 28 + 5db86 + align -> fffffc80
>> CBFS: Could not find file pci10de,0641.rom
>> On card, rom address for PCI: 02:00.0 = f3000000
>> PCI Expansion ROM, signature 0xaa55, INIT size 0xf800, data ptr 0x01f0
>> PCI ROM Image, Vendor 10de, Device 0641,
>> PCI ROM Image, Class Code 030000, Code Type 00
>> copying VGA ROM Image from f3000000 to 0xc0000, 0xf800 bytes
>> Real mode stub @00000600: 609 bytes
>> Calling Option ROM...
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