[coreboot] Upgrading SPI ROM chip?

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Sun Dec 5 14:33:34 CET 2010

On 05.12.2010 12:26, Juhana Helovuo wrote:
> How does a chipset know the size of the SPI BIOS ROM on board

Chipsets do not know the size of the flash ROM chip.

> It could be that the chipset reads the SPI ROM size from the ROM chip
> itself at boot.

That is not possible because the flash chip does not have any command
which returns the chip size.

Chipsets and flash chips cooperate with a trick:
The chipset sends the full mapped address (e.g. 0xfff00000) to the flash
chip, and the flash chip simply ignores the upper address bits. This
ensures that all flash chips are automatically aligned to the top of the
4 GB address space regardless of flash chip size.

Note: Sometimes the chipset strips the upper address bits (e.g. strip 8
upper bits, keep lower 24 bits) if it knows that no compatible flash
chip is larger than any stripped address. You don't have to care about
that, the chipset and the flash chip will just work right automatically
with their ignore-upper-address-bits trick.



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