[coreboot] Porting to Asus M4A78-EM

Myles Watson mylesgw at gmail.com
Tue Dec 7 05:31:11 CET 2010

On Mon, Dec 6, 2010 at 11:41 AM, Myles Watson <mylesgw at gmail.com> wrote:
>> And you are right, the PCI resources do not show up. The resources of
>> the PCI root device include
>> PCI: 00:18.0 resource base c0000000 size 10000000 align 28 gran 20 limit
>> dff8
>> PCI: 00:18.0 resource base d0000000 size 4400000 align 26 gran 20 limit
>> dfff0
>> These resources do not show up in the coreboot table either:
>> coreboot memory table:
>>   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
>>   1. 0000000000001000-000000000009ffff: RAM
>>   2. 00000000000c0000-000000002ffeffff: RAM
>>   3. 000000002fff0000-000000002fffffff: CONFIGURATION TABLES
>>   4. 0000000030000000-000000003fffffff: RESERVED
>>   5. 00000000e0000000-00000000efffffff: RESERVED
>> Wrote coreboot table at: 2fffe000 - 2fffe1bc  checksum ba50
>> But does it really matter? There is now physical RAM only up to
>> 40000000. Or is it going to be a problem if there is more than 3 GB RAM?
> I'm worried that Linux will put something in the wrong place if it doesn't
> know what areas are used.  It may not matter in practice, but as long as
> things are broken for you it's probably worth checking into.
Never mind.  I don't have any reserved areas in my tables.  I was
confusing myself.

So the only problem that you have now is incorrectly routed
interrupts?  Or is there something more?


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