[coreboot] [PATCH] Set the register based on the ROMSIZE (Patch is updated)

Uwe Hermann uwe at hermann-uwe.de
Tue Dec 14 03:05:07 CET 2010


On Mon, Dec 13, 2010 at 05:47:33PM +0800, Bao, Zheng wrote:
> +	string
> +	default "southbridge/amd/sb600/bootblock.c"
> +	depends on SOUTHBRIDGE_AMD_SB600
> +
> +	string
> +	default "southbridge/amd/sb700/bootblock.c"
> +	depends on SOUTHBRIDGE_AMD_SB700
> +

Thanks for adding these, looks like I forgot them in the TINY_BOOTBLOCK

> - * Enable 1MB (LPC) ROM access at 0xFFF00000 - 0xFFFFFFFF.
> + * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF.
>   *
>   * Hardware should enable LPC ROM by pin straps. This function does not
>   * handle the theoretically possible PCI ROM, FWH, or SPI ROM
> configurations.
>   *
> - * The SB700 power-on default is to map 256K ROM space.
> + * The SB700 power-on default is to map 512K ROM space.

Nice! I guess these new values are correct, however I could not find
this specified in the SB700 datasheets (?) Is this undocumented or did
I not look in the right place?

The BKDG at

"Upon system power on, the SB700 enables 256K ROM by default. The BIOS needs
to enable 512K ROM or up to 1M for LPC ROM, if required."

It also only mentions 512KB and 1MB configs (no mention of up to 4MB
being supported). Is the datasheet outdated maybe?

Thanks, Uwe.
http://hermann-uwe.de     | http://sigrok.org
http://randomprojects.org | http://unmaintained-free-software.org

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