[coreboot] [commit] r5074 - trunk/src/southbridge/amd/cs5536
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svn at coreboot.org
Wed Feb 3 14:49:24 CET 2010
Author: oxygene
Date: Wed Feb 3 14:49:24 2010
New Revision: 5074
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5074
Log:
The UART2 on the AMD cs5536 is incorrectly configured in two places.
GPIO lines 4 and 3 are swapped and also incorrectly put in IR mode receive (compound fault).
Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Edwin Beasant <edwin_beasant at virtensys.com>
Modified:
trunk/src/southbridge/amd/cs5536/cs5536.c
trunk/src/southbridge/amd/cs5536/cs5536_early_setup.c
Modified: trunk/src/southbridge/amd/cs5536/cs5536.c
==============================================================================
--- trunk/src/southbridge/amd/cs5536/cs5536.c Mon Feb 1 23:51:18 2010 (r5073)
+++ trunk/src/southbridge/amd/cs5536/cs5536.c Wed Feb 3 14:49:24 2010 (r5074)
@@ -298,7 +298,7 @@
/* Set: OUTAUX1 Select (0x10) */
outl(GPIOL_8_SET, gpio_addr + GPIOL_OUT_AUX1_SELECT);
- /* GPIO8 - UART1_RX */
+ /* GPIO9 - UART1_RX */
/* Set: Input Enable (0x20) */
outl(GPIOL_9_SET, gpio_addr + GPIOL_INPUT_ENABLE);
/* Set: INAUX1 Select (0x34) */
@@ -356,18 +356,18 @@
msr.lo |= sb->com2_irq << 28;
wrmsr(MDD_IRQM_YHIGH, msr);
- /* GPIO4 - UART2_RX */
- /* Set: Output Enable (0x4) */
- outl(GPIOL_4_SET, gpio_addr + GPIOL_OUTPUT_ENABLE);
- /* Set: OUTAUX1 Select (0x10) */
- outl(GPIOL_4_SET, gpio_addr + GPIOL_OUT_AUX1_SELECT);
-
- /* GPIO3 - UART2_TX */
+ /* GPIO3 - UART2_RX */
/* Set: Input Enable (0x20) */
outl(GPIOL_3_SET, gpio_addr + GPIOL_INPUT_ENABLE);
/* Set: INAUX1 Select (0x34) */
outl(GPIOL_3_SET, gpio_addr + GPIOL_IN_AUX1_SELECT);
+ /* GPIO4 - UART2_TX */
+ /* Set: Output Enable (0x4) */
+ outl(GPIOL_4_SET, gpio_addr + GPIOL_OUTPUT_ENABLE);
+ /* Set: OUTAUX1 Select (0x10) */
+ outl(GPIOL_4_SET, gpio_addr + GPIOL_OUT_AUX1_SELECT);
+
/* Set: GPIO 3 and 4 Pull Up (0x18) */
outl(GPIOL_3_SET | GPIOL_4_SET,
gpio_addr + GPIOL_PULLUP_ENABLE);
Modified: trunk/src/southbridge/amd/cs5536/cs5536_early_setup.c
==============================================================================
--- trunk/src/southbridge/amd/cs5536/cs5536_early_setup.c Mon Feb 1 23:51:18 2010 (r5073)
+++ trunk/src/southbridge/amd/cs5536/cs5536_early_setup.c Wed Feb 3 14:49:24 2010 (r5074)
@@ -172,6 +172,7 @@
outl(GPIOL_8_SET, GPIO_IO_BASE + GPIOL_OUTPUT_ENABLE);
/* Set: OUTAUX1 Select (0x10) */
outl(GPIOL_8_SET, GPIO_IO_BASE + GPIOL_OUT_AUX1_SELECT);
+
/* GPIO9 - UART1_RX */
/* Set: Input Enable (0x20) */
outl(GPIOL_9_SET, GPIO_IO_BASE + GPIOL_INPUT_ENABLE);
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