[coreboot] [commit] r5118 - in trunk/src: arch/i386/init cpu/amd/mtrr cpu/via/car cpu/x86/car cpu/x86/mtrr

[repository service]

Author: oxygene
Date: Thu Feb 11 22:51:04 2010
New Revision: 5118
URL: http://tracker.coreboot.org/trac/coreboot/changeset/5118

Log:
Adapt all uses of CONFIG_XIP_ROM_BASE to use
AUTO_XIP_ROM_BASE (as implemented for tinybootblock) if available.

Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>
Acked-by: Stefan Reinauer <stepan at coresystems.de>

Modified:
   trunk/src/arch/i386/init/car.S
   trunk/src/cpu/amd/mtrr/amd_earlymtrr.c
   trunk/src/cpu/via/car/cache_as_ram.inc
   trunk/src/cpu/x86/car/cache_as_ram.inc
   trunk/src/cpu/x86/mtrr/earlymtrr.c

Modified: trunk/src/arch/i386/init/car.S
==============================================================================
--- trunk/src/arch/i386/init/car.S	Thu Feb 11 13:12:19 2010	(r5117)
+++ trunk/src/arch/i386/init/car.S	Thu Feb 11 22:51:04 2010	(r5118)
@@ -236,12 +236,18 @@
 	wrmsr
 
 #if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE)
+#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
+#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
+#else
+#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
+#endif
 	/* enable write base caching so we can do execute in place
 	 * on the flash rom.
 	 */
 	movl    $0x202, %ecx
 	xorl    %edx, %edx
-	movl    $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
+	movl    $REAL_XIP_ROM_BASE, %eax
+	orl     $MTRR_TYPE_WRBACK, %eax
 	wrmsr
 
 	movl    $0x203, %ecx

Modified: trunk/src/cpu/amd/mtrr/amd_earlymtrr.c
==============================================================================
--- trunk/src/cpu/amd/mtrr/amd_earlymtrr.c	Thu Feb 11 13:12:19 2010	(r5117)
+++ trunk/src/cpu/amd/mtrr/amd_earlymtrr.c	Thu Feb 11 22:51:04 2010	(r5118)
@@ -42,10 +42,15 @@
         wrmsr(TOP_MEM, msr);
 
 #if defined(CONFIG_XIP_ROM_SIZE)
+#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
+#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
+#else
+#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
+#endif
         /* enable write through caching so we can do execute in place
          * on the flash rom.
          */
-        set_var_mtrr(1, CONFIG_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
+        set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
 #endif
 
         /* Set the default memory type and enable fixed and variable MTRRs 

Modified: trunk/src/cpu/via/car/cache_as_ram.inc
==============================================================================
--- trunk/src/cpu/via/car/cache_as_ram.inc	Thu Feb 11 13:12:19 2010	(r5117)
+++ trunk/src/cpu/via/car/cache_as_ram.inc	Thu Feb 11 22:51:04 2010	(r5118)
@@ -83,7 +83,13 @@
 	/* MTRRPhysBase */
 	movl	$0x202, %ecx
 	xorl	%edx, %edx
-	movl	$(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
+#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
+#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
+#else
+#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
+#endif
+	movl    $REAL_XIP_ROM_BASE, %eax
+	orl     $MTRR_TYPE_WRBACK, %eax
 	wrmsr
 
 	/* MTRRPhysMask */

Modified: trunk/src/cpu/x86/car/cache_as_ram.inc
==============================================================================
--- trunk/src/cpu/x86/car/cache_as_ram.inc	Thu Feb 11 13:12:19 2010	(r5117)
+++ trunk/src/cpu/x86/car/cache_as_ram.inc	Thu Feb 11 22:51:04 2010	(r5118)
@@ -200,12 +200,18 @@
 #endif /*  CONFIG_USE_FALLBACK_IMAGE == 1*/
 
 #if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE)
+#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
+#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
+#else
+#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
+#endif
 	/* enable write base caching so we can do execute in place
 	 * on the flash rom.
 	 */
 	movl	$0x202, %ecx
 	xorl	%edx, %edx
-	movl	$(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
+	movl    $REAL_XIP_ROM_BASE, %eax
+	orl     $MTRR_TYPE_WRBACK, %eax
 	wrmsr
 
 	movl	$0x203, %ecx

Modified: trunk/src/cpu/x86/mtrr/earlymtrr.c
==============================================================================
--- trunk/src/cpu/x86/mtrr/earlymtrr.c	Thu Feb 11 13:12:19 2010	(r5117)
+++ trunk/src/cpu/x86/mtrr/earlymtrr.c	Thu Feb 11 22:51:04 2010	(r5118)
@@ -100,10 +100,15 @@
 	}
 
 #if defined(CONFIG_XIP_ROM_SIZE)
+#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
+#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
+#else
+#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
+#endif
 	/* enable write through caching so we can do execute in place
 	 * on the flash rom.
 	 */
-	set_var_mtrr(1, CONFIG_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
+	set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
 #endif
 
 	/* Set the default memory type and enable fixed and variable MTRRs