[coreboot] ASUS P2B-LS support
buurin at gmail.com
Tue Feb 23 03:45:43 CET 2010
On Mon, Feb 22, 2010 at 2:13 PM, Joseph Smith <joe at settoplinux.org> wrote:
> Hello Keith, looks like you are on your way. Are you sure your CPU's are
> 6b1 and 6b4?
> I have this 6b4 on my board and it is a mobile FCBGA PIII:
> Anyways a few of us are working on CAR for the 6bx family. We actually got
> it to boot but it is very slow at this point. I think the mtrr's need some
> This is interesting, I didn't know the Tualatin's were a part of this
The CPU on the test board has sSpec SL5ZF:
The one in my "main desktop", I don't remember the sSpec but it is
definitely a 6B4.
A third one has sSpec SL68G:
That's a 6B1.
So yeah. :)
The CAR thing is promising! While we're talking about cache, Is CAR supposed
to use L1 or L2 cache? Also how did we know the L2 cache isn't enabled on
440BX boards as noted on the wiki? I'm under the impression that once the
caching is configured in the CPU, both levels becomes enabled?
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