[coreboot] Executing bootstrap from MBR in coreboot

Piotr Piwko piotr.piwko at gmail.com
Fri Feb 26 09:49:39 CET 2010

2010/2/26 Marc Jones <marcj303 at gmail.com>:
>> They have some objections about the following registers:
>> - MC_CF1017_DATA (0x2000001a) should be equal something more like
>> 0x00000000_140DD101 instead of 0x00000000_00000101
>> - GLCP_DELAY_CONTROLS (0x4c00000f) should be closer to something like
>> 0xF2F100FF_56960004
> I think you are correct. This looks like the memory init is not able
> to get correct information from the SPD. If that is the problem, you
> should check that the SMBus controller setup is correct.

Ok, I'm going to check it.

Piotr Piwko

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