[coreboot] Integrated graphics controller on second bus?

[Stefan Reinauer]

On 1/3/10 4:13 PM, Andrej Skirn wrote:
> Stefan Reinauer wrote:
>>
>> Are you building with Kconfig or with "newbuild"? If you are not using
>> Kconfig, you have to edit the file Config.lb instead of the file
>> devicetree.cb
>>
>>   
> Kconfig, but I have same device tree in both Config.lb and
> devicetree.cb. Just in case you're wondering, the results are exactly
> same even if I don't have the VGA device defined in the device trees,
> just without the extra debug output (meaning just "PCI: 01:00.0, bad
> id 0xffffffff" instead).
>>> In vt8623 enable_dev for device PCI: 01:00.0.
>>> Disabling static device: PCI: 01:00.0
>>>     
>> The device is explicitly disabled in the static device tree.
>>   
> There's discussion on just this debug message/issue on the v3 at the
> threat on
> http://www.mail-archive.com/coreboot@coreboot.org/msg04745.html; which
> I believe you're well familiar with. Anyway, what that debug message
> really means is the device appears in the static device tree
> (devicetree.cb) but has an undefined vendor & device id. In this case,
> they're 0xffffffff which suggests the bridge isn't really functioning.
> I can't spot any relevant differences from the factory BIOS
> Northbridge registers, though. The EPIA-M code is very old and the
> CLE266 Northbridge code has only ever been used with it, so there
> might be some gotcha's with that.
Indeed, good catch.

Maybe the AGP bridge is not initialized correctly, or at all. This could
cause the device to not be visible on that bus.

Do you have a CLE266 datasheet with the AGP bridge registers so you
could compare what legacy BIOS does in comparison to coreboot?

Best regards,

Stefan