[coreboot] coreboot and MSM800BEV

Patrick Georgi patrick at georgi-clan.de
Fri Jan 8 18:53:13 CET 2010

Am 08.01.2010 18:32, schrieb Piotr Piwko:
> 2010/1/8 Patrick Georgi <patrick at georgi-clan.de>:
>> How long did you wait? it _might_ be that it merely takes a very long
>> time. That must of course be fixed, but is not the same problem as a
>> hanging system.
> I wait for about 15-20 min and nothing special. I put some 'postcode'
> functions for debug capability and I've found out that it hangs on
> 'cbfs_load_stage' function when it calls cbfs_find_file:
> ---------[ lib/cbfs.c ]--------
> // ...
> void * cbfs_load_stage(const char *name)
> {
> 	struct cbfs_stage *stage = (struct cbfs_stage *)
> 		cbfs_find_file(name, CBFS_TYPE_STAGE);
> 	/* this is a mess. There is no ntohll. */
> 	/* for now, assume compatible byte order until we solve this. */
> 	u32 entry;
> 	outb(0xaa, 0x80);        // <--------------- It doesn't occur
In that case, your ROM is probably not entirely mapped yet. That's an
issue that has to be fixed per chipset (southbridge mostly).
I see explicit support for it in cs5530 (even though that _might_
require some more changes), and somewhere in the code of cs5535. I don't
know if this is applicable to cs5536, too. If you want to try, this hack
might help you (untested, as I don't have the hardware). Maybe the call
must be moved around a bit.

Thanks for your effort,

--- src/mainboard/digitallogic/msm800sev/auto.c (revision 5003)
+++ src/mainboard/digitallogic/msm800sev/auto.c (working copy)
@@ -14,6 +14,7 @@
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"
 #include <cpu/amd/lxdef.h>
+#include "southbridge/amd/cs5530/cs5530_enable_rom.c"

 //#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)

@@ -114,6 +115,7 @@

        msr_init();                                     //GX3 OK

+       cs5530_enable_rom();
        cs5536_early_setup();           //GX3 OK

        /* NOTE: must do this AFTER the early_setup!

More information about the coreboot mailing list