[coreboot] HTX (FPGA) device needs more time for initialization butHOW?

Knut Kujat knuku at gap.upv.es
Thu Jul 1 16:59:54 CEST 2010

Myles Watson escribió:
>> my version of coreboot (on Supermicro H8QME-2+) is working just fabulous
>> but now I have a little issue. I have a HTX board with a FPGA on it
>> which needs to boot with coreboot on the motherboard. The problem is
>> that it fails to boot most of the time because it doesn't had time to
>> initialize itself properly. I know that because at HT non coherent
>> device initialization it marks bit 1(InitComplete) in the link type
>> register of the device as 0. What I tried to do is to hard_reset() every
>> time it fails but with no luck. I did that because after a power cycle
>> the card seems to have enough time to initialize and the boot process
>> completes successfully.
> Doing a hard reset works for me here.  I'm surprised that power cycling the
> machine works.  That doesn't work for me.  I always figured that it was
> because on a warm hard reset the power and clocks were already stable.
By power cycling I mean one of those where you plug the cable in again
and the board becomes alive immediately  without any need of pushing the
power button. After cycling you need to push the button it fails also.
>> So is there any way how I could delay the whole initialization process
>> to give the card more time?
> By the time software gets control, it's too late.  The HT links are already
> initialized.
That was kind of I thought it would work without being completely sure.
But now my question is if it is possible to reset the initialization by
software and try to delay it then?
> From your FPGA, you should be able to delay it if your clock is stable and
> you can have CAD driven high and CTL driven low.  Initialization shouldn't
> start until you raise CTL.
Don't know much about that FPGA because I'm not working on/with it. But
the main idea is to modify coreboot to not to modify the FPGA.
> Thanks,
> Myles

Kind regards,
Knut Kujat.

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