[coreboot] HTX (FPGA) device needs more time for, initialization but HOW?
sc at drccomputer.com
Fri Jul 2 23:30:19 CEST 2010
All Opterons support ldtstop (disconnect protocol). According to the spec in x86
systems only the southbridge drives ldtstop.
From: Maximilian Thuermer <Maximilian.Thuermer at ziti.uni-heidelberg.de>
To: coreboot at coreboot.org; knuku at gap.upv.es
Sent: Fri, July 2, 2010 1:25:13 AM
Subject: [coreboot] HTX (FPGA) device needs more time for, initialization but
this is a problem I ran into multiple times since
I've been working with FPGA based HTX boards now and
it appears to me there is - as always - no general way to fix that issue.
It all depends greatly on the mobo setup. Hard reset isnt
always behaving as you would expect. An HT link reinitialization
only takes place if either pwrkok goes down (the cold reset case),
or ldtstop forces the link into idle state (which most Opterons
out there dont seem to support yet).
Additionally, almost every mainboard vendor ignores the fact that
powerok and reset_n on every HT link is defined as bidirectional.
I am working with a Tyan S2912 with fam10 cpus, and its MCP55 seems
to control abovementioned signals unidirectionally.
If this should be the case with your board, too, there are two possible
ways to fix your issue. If you have the southbridge documentation and it truly
controls all HT sideband
signals, implement your own, real hard reset.
Another thing that works on some boards (e.g. on Tyan) is pressing and holding
the reset button
before pressing the power button and letting it go sometimes afterwards. This
holds the southbridge in init state
and leaves your card all the time you need to have it program itself.
Good luck and best regards,
-- coreboot mailing list: coreboot at coreboot.org
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