[coreboot] [commit] r5657 - trunk/src/northbridge/via/vx800
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svn at coreboot.org
Wed Jul 7 19:51:42 CEST 2010
Author: stepan
Date: Wed Jul 7 19:51:41 2010
New Revision: 5657
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5657
Log:
fix some warnings.
Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Stefan Reinauer <stepan at coresystems.de>
Modified:
trunk/src/northbridge/via/vx800/pci_rawops.h
trunk/src/northbridge/via/vx800/vx800.h
trunk/src/northbridge/via/vx800/vx800_early_serial.c
trunk/src/northbridge/via/vx800/vx800_early_smbus.c
Modified: trunk/src/northbridge/via/vx800/pci_rawops.h
==============================================================================
--- trunk/src/northbridge/via/vx800/pci_rawops.h Wed Jul 7 17:09:09 2010 (r5656)
+++ trunk/src/northbridge/via/vx800/pci_rawops.h Wed Jul 7 19:51:41 2010 (r5657)
@@ -43,30 +43,6 @@
pci_write_config8(dev, where, data);
}
-static void pci_modify_config16(device_t dev, unsigned where, u16 orval, u16 mask)
-{
- u16 data = pci_read_config16(dev, where);
- data &= (~mask);
- data |= orval;
- pci_write_config16(dev, where, data);
-}
-
-static void pci_modify_config32(device_t dev, unsigned where, u32 orval, u32 mask)
-{
- u32 data = pci_read_config32(dev, where);
- data &= (~mask);
- data |= orval;
- pci_write_config32(dev, where, data);
-}
-
-static void io_modify_config8(u16 where, u8 orval, u8 mask)
-{
- u8 data = inb(where);
- data &= (~mask);
- data |= orval;
- outb(data, where);
-}
-
static void via_pci_inittable(u8 chipversion,
const struct VIA_PCI_REG_INIT_TABLE *initdata)
{
Modified: trunk/src/northbridge/via/vx800/vx800.h
==============================================================================
--- trunk/src/northbridge/via/vx800/vx800.h Wed Jul 7 17:09:09 2010 (r5656)
+++ trunk/src/northbridge/via/vx800/vx800.h Wed Jul 7 19:51:41 2010 (r5657)
@@ -26,6 +26,17 @@
{
}
#endif
+
+#ifdef __PRE_RAM__
+/* vx800_early_smbus.c */
+struct mem_controller;
+void enable_smbus(void);
+void smbus_fixup(const struct mem_controller *mem_ctrl);
+
+/* vx800_early_serial.c */
+void enable_vx800_serial(void);
+#endif
+
//#define REV_B0 0x10
#define REV_B1 0x11
//#define REV_B2 0x12
Modified: trunk/src/northbridge/via/vx800/vx800_early_serial.c
==============================================================================
--- trunk/src/northbridge/via/vx800/vx800_early_serial.c Wed Jul 7 17:09:09 2010 (r5656)
+++ trunk/src/northbridge/via/vx800/vx800_early_serial.c Wed Jul 7 19:51:41 2010 (r5657)
@@ -27,12 +27,6 @@
#define SIO_BASE 0x3f0
#define SIO_DATA SIO_BASE+1
-static void vx800_writesuper(uint8_t reg, uint8_t val)
-{
- outb(reg, SIO_BASE);
- outb(val, SIO_DATA);
-}
-
static void vx800_writepnpaddr(uint8_t val)
{
outb(val, 0x2e);
@@ -59,7 +53,7 @@
mainboard
*/
-static void enable_vx800_serial(void)
+void enable_vx800_serial(void)
{
outb(6, 0x80);
outb(0x03, 0x22);
Modified: trunk/src/northbridge/via/vx800/vx800_early_smbus.c
==============================================================================
--- trunk/src/northbridge/via/vx800/vx800_early_smbus.c Wed Jul 7 17:09:09 2010 (r5656)
+++ trunk/src/northbridge/via/vx800/vx800_early_smbus.c Wed Jul 7 19:51:41 2010 (r5657)
@@ -19,6 +19,7 @@
#include <device/pci_ids.h>
#include "vx800.h"
+
#define SMBUS_IO_BASE 0x0500 //from award bios
#define PMIO_BASE VX800_ACPI_IO_BASE //might as well set this while we're here
@@ -137,14 +138,11 @@
return val;
}
-static void enable_smbus(void)
+void enable_smbus(void)
{
device_t dev;
- dev =
- pci_locate_device(PCI_ID
- (PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX855_LPC),
- 0);
+ dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX855_LPC), 0);
if (dev == PCI_DEV_INVALID) {
/* This won't display text if enable_smbus() is before serial init */
@@ -183,7 +181,7 @@
*
* @param mem_ctrl The memory controller and SMBus addresses.
*/
-static void smbus_fixup(const struct mem_controller *mem_ctrl)
+void smbus_fixup(const struct mem_controller *mem_ctrl)
{
int i, ram_slots, current_slot = 0;
u8 result = 0;
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