[coreboot] Porting to Asus M4A785-M
Juhana Helovuo
juhe at iki.fi
Thu Jul 29 18:02:04 CEST 2010
Hello All,
Thanks for the tip, Corey.
I commented out the call to isa_dma_init(). Now there is both progress
and new problems:
Progress:
* Coreboot runs to completion, loads a payload from CBFS, and jumps to
execute it.
* I managed to extract the VGA BIOS image, and add it to CBFS. It works,
i.e. initializes the display, and I can see the coreboot log on VGA
also.
Problems:
* So far no success with payloads.
** SeaBIOS gives no output at all.
** GRUB 2 only clears screen, prints "Welcome to GRUB" on VGA, and then
freezes.
** Both payload images are tested to work with coreboot on QEMU. In
QEMU they give sane output and try to load OS.
* There is a suspicious keyboard timeout message in the log.
Clearly something is out of place, but I cannot immediately figure out
what to do next. Any suggestions?
Best regards,
Juhana Helovuo
On Sun, 2010-07-18 at 15:41 -0400, Corey Osgood wrote:
> The file that you're looking for is src/pc80/isa-dma.c. I suspect that
> isa dma init isn't actually shutting the system down, just resetting
> whatever COM you're getting serial output from. Either comment out
> that dma port, or try re-initializing the serial console after doing
> isa_dma_init().
>
> -Corey
>
> On Sun, Jul 18, 2010 at 2:22 PM, Juhana Helovuo <juhe at iki.fi> wrote:
> > On Thu, 2010-06-17 at 07:31 -0600, Myles Watson wrote:
> >> > Yes, here it is attached. It is copied and modified from AMD Tilapia
> >> > mainboard, because that seemed to be a close relative.
> >> Thanks.
> >>
> >> > Meanwhile, I added call to it8712f_kill_watchdog() , like Rudolf Marek
> >> > suggested. That changed the behavior so that the machine no longer
> >> > reboots in the middle of iterating through PCI busses and devices, but
> >> > instead it seems to go on iterating infinitely, or presumably until
> >> > malloc runs out of memory.
> >> OK
> >
> > Hello again,
> >
> > Infinitely looping PCI scan in pci_device.c was resolved:
> >
> > I added the following lines to the beginning of pci_scan_bus:
> >
> > // Maximum sane devfn is 0xFF
> > if (max_devfn > 0xff) {
> > printk(BIOS_DEBUG, "PCI: pci_scan_bus upper limit too big. Using 0xff.\n");
> > max_devfn=0xff;
> > }
> >
> > And then the relevant part of the log is:
> >
> > PCI: pci_scan_bus for bus 00
> > PCI: pci_scan_bus limits devfn 0 - devfn ffffffff
> > PCI: pci_scan_bus upper limit too big. Using 0xff.
> > POST: 0x24
> >
> > It seems that the scan loop was not infinite after all, but just tried
> > to enumerate devices from 0 to 0xffffffff, which seemed like inifinity.
> > I could not find out who calls pci_scan_bus, nor where does the too
> > large upper limit come from.
> >
> >
> > Now the boot process goes through bus probing and starts enabling
> > devices. This goes on until it is time to enable to LPC controller,
> > which I suppose is the bridge to the IT8712F Super I/O -chip. At that
> > point the boot process freezes, or at least there is no more serial
> > output. I added some debug printouts as follows:
> >
> > [src/southbridge/amd/sb700/sb700_lpc.c]
> >
> > static void lpc_init(device_t dev)
> > {
> > u8 byte;
> > u32 dword;
> > device_t sm_dev;
> >
> > printk(BIOS_DEBUG, "sb700 entering lpc_init\n");
> > /* Enable the LPC Controller */
> > sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
> > dword = pci_read_config32(sm_dev, 0x64);
> > dword |= 1 << 20;
> > pci_write_config32(sm_dev, 0x64, dword);
> >
> > /* Initialize isa dma */
> > printk(BIOS_DEBUG, "sb700 initializing isa dma\n");
> > isa_dma_init();
> > printk(BIOS_DEBUG, "sb700 isa dma initialized\n");
> >
> > /* Enable DMA transaction on the LPC bus */
> > byte = pci_read_config8(dev, 0x40);
> > byte |= (1 << 2);
> > pci_write_config8(dev, 0x40, byte);
> > printk(BIOS_DEBUG, "sb700 DMA enabled on LPC bus\n");
> >
> > /* Disable the timeout mechanism on LPC */
> > byte = pci_read_config8(dev, 0x48);
> > byte &= ~(1 << 7);
> > pci_write_config8(dev, 0x48, byte);
> > printk(BIOS_DEBUG, "sb700 LPC Timeout disabled\n");
> >
> > /* Disable LPC MSI Capability */
> > byte = pci_read_config8(dev, 0x78);
> > byte &= ~(1 << 1);
> > pci_write_config8(dev, 0x78, byte);
> > printk(BIOS_DEBUG, "sb700 exiting lpc_init\n");
> > }
> >
> > And the resulting end of boot log is:
> >
> > [...cut...]
> > PCI: 00:14.1 init
> > Check CBFS header at fffffd2e
> > magic is 4f524243
> > Found CBFS header at fffffd2e
> > Check fallback/romstage
> > CBFS: follow chain: fff00000 + 38 + 14769 + align -> fff147c0
> > Check fallback/coreboot_ram
> > CBFS: follow chain: fff147c0 + 38 + ddc2 + align -> fff225c0
> > Check fallback/payload
> > CBFS: follow chain: fff225c0 + 38 + 22483 + align -> fff44a80
> > Check
> > CBFS: follow chain: fff44a80 + 28 + bb286 + align -> fffffd40
> > CBFS: Could not find file pci1002,439c.rom
> > PCI: 00:14.2 init
> > base = 0xd4200000
> > codec_mask = 05
> > 2(th) codec viddid: ffffffff
> > 0(th) codec viddid: ffffffff
> > PCI: 00:14.3 init
> > sb700 entering lpc_init
> > sb700 initializing isa dma
> > [log ends here]
> >
> > PCI tree with the factory BIOS is:
> >
> > # lspci -tvnn
> > -[0000:00]-+-00.0 Advanced Micro Devices [AMD] RS780 Host Bridge Alternate [1022:9601]
> > +-01.0-[0000:01]--+-05.0 ATI Technologies Inc Device [1002:9710]
> > | \-05.1 ATI Technologies Inc Device [1002:970f]
> > +-0a.0-[0000:02]----00.0 Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168]
> > +-11.0 ATI Technologies Inc SB700/SB800 SATA Controller [IDE mode] [1002:4390]
> > +-12.0 ATI Technologies Inc SB700/SB800 USB OHCI0 Controller [1002:4397]
> > +-12.1 ATI Technologies Inc SB700 USB OHCI1 Controller [1002:4398]
> > +-12.2 ATI Technologies Inc SB700/SB800 USB EHCI Controller [1002:4396]
> > +-13.0 ATI Technologies Inc SB700/SB800 USB OHCI0 Controller [1002:4397]
> > +-13.1 ATI Technologies Inc SB700 USB OHCI1 Controller [1002:4398]
> > +-13.2 ATI Technologies Inc SB700/SB800 USB EHCI Controller [1002:4396]
> > +-14.0 ATI Technologies Inc SBx00 SMBus Controller [1002:4385]
> > +-14.1 ATI Technologies Inc SB700/SB800 IDE Controller [1002:439c]
> > +-14.2 ATI Technologies Inc SBx00 Azalia (Intel HDA) [1002:4383]
> > +-14.3 ATI Technologies Inc SB700/SB800 LPC host controller [1002:439d]
> > +-14.4-[0000:03]--
> > +-14.5 ATI Technologies Inc SB700/SB800 USB OHCI2 Controller [1002:4399]
> > +-18.0 Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] HyperTransport Configuration [1022:1200]
> > +-18.1 Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] Address Map [1022:1201]
> > +-18.2 Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] DRAM Controller [1022:1202]
> > +-18.3 Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] Miscellaneous Control [1022:1203]
> > \-18.4 Advanced Micro Devices [AMD] Family 10h [Opteron, Athlon64, Sempron] Link Control [1022:1204]
> >
> >
> > So it seems that something goes wrong inside isa_dma_init();
> >
> > Now I am not sure what I could try next. As the LPC is needed for Super
> > I/O access, it seems like it cannot be just left out, and configuring
> > the LPC controller to "off" will also kill the serial port.
> >
> > Any suggestions?
> >
> > Best regards,
> > Juhana Helovuo
> >
> >
> > --
> > coreboot mailing list: coreboot at coreboot.org
> > http://www.coreboot.org/mailman/listinfo/coreboot
> >
>
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