[coreboot] [h8dme-fam10] acquiring coreboot skills from scratch somewhat daunting
Arne Georg Gleditsch
arne.gleditsch at numascale.com
Thu Jun 10 21:30:09 CEST 2010
Joe Korty <joe.korty at ccur.com> writes:
>> This sounds kinda familiar. Can you check if it is related to
>> http://article.gmane.org/gmane.linux.bios/57707 -- do the patches there
>> help any?
> Doesn't look like it. We are getting hosed (consuming an hour's worth of time)
> between the printk of 'Clearing memory...' and the printk of 'Done.' The only
> thing between those two printk's is a memset.
I believe there's a patch to memset there too, unless I've pasted the
wrong URL? I saw what appeared to be dramatic performance issues,
presumably related to instruction cache misses/refetches in the memset
code. (The impact is likely related to how the alignment turns out as
well as the latency over the SB towards ROM.)
I'm not sure a northbridge timeout on write to coherent memory would be
benign enough to let you continue going gracefully... Either way, it'd
be interesting to know if modifying the code itself helps any.
More information about the coreboot