[coreboot] WARNING: BIOS bug: CPU MTRRs don't cover all of memory, losing 2MB of RAM
Stefan Reinauer
stepan at coresystems.de
Sat Jun 12 16:57:47 CEST 2010
On 6/12/10 4:05 PM, Joseph Smith wrote:
> Setting fixed MTRRs(0-88) Type: UC
> Setting fixed MTRRs(0-16) Type: WB
> Setting fixed MTRRs(24-88) Type: WB
> DONE fixed MTRRs
> call enable_fixed_mtrr()
> Setting variable MTRR 0, base: 0MB, range: 128MB, type WB
> ADDRESS_MASK_HIGH=0xf
> Setting variable MTRR 1, base: 128MB, range: 64MB, type WB
> ADDRESS_MASK_HIGH=0xf
> Setting variable MTRR 2, base: 192MB, range: 32MB, type WB
> ADDRESS_MASK_HIGH=0xf
> Setting variable MTRR 3, base: 224MB, range: 16MB, type WB
> ADDRESS_MASK_HIGH=0xf
> Setting variable MTRR 4, base: 240MB, range: 8MB, type WB
> ADDRESS_MASK_HIGH=0xf
> Setting variable MTRR 5, base: 248MB, range: 4MB, type WB
> ADDRESS_MASK_HIGH=0xf
> Running out of variable MTRRs!
> Zero-sized MTRR range @0KB
> DONE variable MTRRs
> Clear out the extra MTRR's
> call enable_var_mtrr()
> Leave x86_setup_var_mtrrs
>
> MTRR check
> Fixed MTRRs : Enabled
> Variable MTRRs: Enabled
>
>
It looks like an UMA chipset with the UMA mechanism not used correctly
(i.e. uma_memory_base and uma_memory_size are not set and/or
CONFIG_GFXUMA not enabled)
Stefan
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20100612/33a69118/attachment.html>
More information about the coreboot
mailing list