[coreboot] Getting started with Coreboot on Intel Core
kh.nirschl at googlemail.com
Fri Mar 12 10:22:27 CET 2010
i still haven't found whats wrong. toolchain seems to be ok, as
everything works fine with qemu.
could someone confirm that kontron 986lcd-m is working in the current
2010/3/9 Karl-Heinz Nirschl <kh.nirschl at googlemail.com>:
> no i use crossgcc which looks fine, but still can't hang with postcode 0x23.
> if have the following in crt0.disasm:
> 153 0148 B023E680 post_code(0x23)
> 155 014c E8FCFFFF call stage1_main
> 155 FF
> and the following in romstage.inc (both from build dir):
> subl $24, %esp
> / 29 "/home/xxx/coreboot/src/cpu/intel/model_6ex/cache_as_ram_disable.c" 1
> movb 0xa4, %al
> outb %al, $0x80
> so i suppose i should at least see postcode 0xa4 if the call
> instruction succeeds.
> any further hints what i could have done wrong?
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