[coreboot] [Patch] SSE & SSE2

[Stefan Reinauer]

On 3/16/10 6:00 PM, Joseph Smith wrote:
>> Socket PGA370 - SSE but not SSE2 (supports PIII)
>> Slot 1 - SSE but not SSE2
>> Slot 2 - SSE but not SSE2
>> Via C3 - SSE but not SSE2
>> Via C7 - SSE and SSE2
>> Qemu - not SSE2 (I don't know about SSE, so I didn't set it)
>> Geode - not SSE or SSE2
>> intel ep80579 SSE and SSE2
>> Socket 441 SSE and SSE2
>> Socket mPGA479M SSE and SSE2
>> Socket mPGA604 SSE and SSE2
>> Socket BGA956 MMX and SSE and SSE2
>> Socket mFCPGA478 MMX and SSE and SSE2
>> Socket mPGA478 MMX and SSE and SSE2
>> Socket mPGA603 MMX and SSE and SSE2
>>
>>     
> Yes this looks correct.
>
>   
Nope. Not at all.

>> some intel model_f?x Kconfig files weren't being sourced in
>> src/cpu/intel/Kconfig
>>
>> Signed-off-by: Myles Watson <mylesgw at gmail.com>
>>
>>     
> Acked-by: Joseph Smith <joe at settoplinux.org>
>   

Please don't commit... N-Ack/Veto by me!

See other mail in a minute or two.

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