[coreboot] [Patch] SSE & SSE2

Stefan Reinauer stepan at coresystems.de
Wed Mar 17 01:59:51 CET 2010

On 3/17/10 1:05 AM, Myles Watson wrote:

> I understood that, but I guess I was looking in the wrong places.
> I still think we should source all of the models for the intel CPUs.
Hah, sorry I forgot about that hunk.... 5231

>>> Well then we are going to need a different solution......
>> I think the code as it is works just fine. Ok, the warnings should be
>> silenced, but that's about it.
> The easiest way is to have SSE and SSE2 default to n.  Then there will be no
> warnings, and people can enable them when they need them.

I think you mentioned that a warning is generally good if people don't
set this explicitly... So maybe we should just fix what we know for sure
(most likely those with no SSE and SSE2) and wait for people to fix this
while they come along these CPUs/sockets... If nobody does, the warning
is maybe not critical for them ;)

> It's confusing to have SSE and SSE2 settings in some of the models, but not
> others. 
Yes. Since one socket can choose multiple cpus, it must go in the socket
to be safe (otherwise a SSE enabled CPU might break a socket with a
non-SSE enabled CPU), but there are also CPU models that don't come in
sockets... "Fake" sockets? Better solution? Set it in the CPU for those,
with a comment?


More information about the coreboot mailing list