[coreboot] [PATCH] make AMD CAR disable a C function

Rudolf Marek r.marek at assembler.cz
Sun May 16 23:32:06 CEST 2010


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Hi,

My plan is to add backup code for S3 into post_cache_as_ram, I have it working
already but needs cleanup. POC is in [PATCH] WIP - suspend/resume on AMD64 using
CBMEM.

Also I think we could enable whole ROM for caching in the enable_cache_as_ram.
It works fine here.

As the last point, just right after post_cache_as_ram I would like to setup
following MTRR instead of _RAMBASE - _RAMTOP

0MB - TOM WB
(or little over TOM if tom not a power of 2?)

0xA0000 - 0xC0000 UC

I think one could live with this setup until the MTRR are set again in ramstage.

More ideas?

Rudolf

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