[coreboot] Gigabyte M57SLI - some troubles with recent corebootversion
harald.gutmann at gmx.net
Thu Nov 4 20:46:44 CET 2010
thank you for your fast reply!
Your provided solution works fine to fix the MTRR problem on my board!
Just FYI, my CPU is the following:
model name : AMD Athlon(tm) 64 X2 Dual Core Processor 6000+
I'm just thinking if your suggested place for changing the KConfig is the right
one, as the other boards did that config in the socket directory.
And I guess that the model_fxx directory is used in several sockets. Therefor
I think it would be better to add that config value in "cpu/amd/socket_AM2" so
that other sockets don't get affected with this change.
On Thursday 04 November 2010 19:28:39 Scott Duplichan wrote:
> -----Original Message-----
> From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org]
> On Behalf Of Harald Gutmann Sent: Thursday, November 04, 2010 12:46 PM
> To: coreboot at coreboot.org
> Subject: [coreboot] Gigabyte M57SLI - some troubles with recent
> ]Hello readers,
> ]after some while I tried to use coreboot again on my well supported
> Gigabyte ]M57SLI and I was really happy, that the first built image booted
> the machine. ]
> ]Last time I tried this, I stumbled across an error with the RAM, and had
> no ]time to investigate this further.
> ]With the recent version of coreboot (r6013) I get some errors which I'd
> like ]to fix. I don't know if some changes to coreboot happened in the
> meanwhile or, ]if the kernel got changed so that this errors appear. My
> kernel version ]running is from debian sid with the version number
> 2.6.32-27 for AMD64. ]
> ]The problems I get are the following:
> ][ 0.000000] mtrr: your BIOS has set up an incorrect mask, fixing it up.
> It looks like your project uses an AMD family 0Fh processor. Windows 7
> checked build makes a blue screen due to the variable MTRR mask. It
> defaults to 36, which is incorrect for his processor. 40 is needed:
> Index: src/cpu/amd/model_fxx/Kconfig
> --- src/cpu/amd/model_fxx/Kconfig (revision 6017)
> +++ src/cpu/amd/model_fxx/Kconfig (working copy)
> @@ -4,6 +4,11 @@
> select SSE
> select SSE2
> +config CPU_ADDR_BITS
> + int
> + default 40
> + depends on CPU_AMD_MODEL_FXX
> config UDELAY_IO
> default n
> ]Kind regards,
> ]Harald Gutmann
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