[coreboot] [patch 7/7] Dynamically generate PNP0C02 mainboard resources in SSDT

Tobias Diedrich ranma+coreboot at tdiedrich.de
Wed Nov 10 20:06:58 CET 2010

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Previous message: [coreboot] [patch 6/7] Ranges unavailable for PCI BARs should be marked as reserved in the E820 memory map, in case the OS wants to change the BARs.
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