[coreboot] [PATCH] Avoid hang when 4GB or more DRAM is installed on AMD RS780 UMA systems

Scott Duplichan scott at notabs.org
Thu Nov 11 00:18:59 CET 2010

] On i945, UMA is done by providing a fixed resource. I don't think any
] other changes were necessary (see src/northbridge/intel/i945/northbridge.c)

I took a look at the i945 code and found the AMD code also adds the exact
same fixed resource for the UMA area. What I cannot figure out is how this
can reduce the WB DRAM range so that the UMA memory ix excluded.

If I test with 2GB installed and a 256 MB frame buffer, function add_uma_resource
is called with the expected arguments: Adding UMA memory area, base=70000000 size=10000000

Later, set_var_mtrr_resource is passed a range of c0000-7fffffff. The existing
coreboot code assumes this range has already had the UMA part removed, and
adds it back:

      // Increase the base range and set up UMA as an UC hole instead
      var_state.range_sizek += (uma_memory_size >> 10);

What logic should deduct the reserved range from the DRAM range before
this code runs?


More information about the coreboot mailing list