[coreboot] [PATCH] correct setting of non-posted option in RS780 function ProgK8TempMmioBase
Scott Duplichan
scott at notabs.org
Wed Oct 6 22:38:05 CEST 2010
RS780 function ProgK8TempMmioBase is setting a reserved
bit in the AMD processor 'MMIO Limit Address Register'.
I suspect it is because of a typo where 0x80 was entered
as 0x8. If 0x80 is used, then the strap configuration
register accesses become non-posted, which is how the
Shiner reference BIOS does it.
Thanks,
Scott
Signed-off-by: Scott Duplichan <scott at notabs.org>
Index: src/southbridge/amd/rs780/rs780_cmn.c
===================================================================
--- src/southbridge/amd/rs780/rs780_cmn.c (revision 5917)
+++ src/southbridge/amd/rs780/rs780_cmn.c (working copy)
@@ -204,7 +204,7 @@
if (in_out) {
pci_write_config32(k8_f1, 0xbc,
(((pcie_base_add + 0x10000000 -
- 1) >> 8) & 0xffffff00) | 0x8);
+ 1) >> 8) & 0xffffff00) | 0x80); //non-posted
pci_write_config32(k8_f1, 0xb8, (pcie_base_add >> 8) | 0x3);
pci_write_config32(k8_f1, 0xb4,
((mmio_base_add + 0x10000000 -
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