[coreboot] [PATCH] fix cpu ht speed display in rs780_gfx.c
Liu Tao
liutao1980 at gmail.com
Mon Oct 11 05:48:14 CEST 2010
Hello,
the original code reads cpu ht speed from HT chain 0's register.
the patch fix it to read the register from the chain which SB chip is on.
Signed-off-by: Liu Tao <liutao1980 at gmail.com>
Index: src/southbridge/amd/rs780/rs780_gfx.c
===================================================================
--- src/southbridge/amd/rs780/rs780_gfx.c (revision 5923)
+++ src/southbridge/amd/rs780/rs780_gfx.c (working copy)
@@ -302,7 +302,7 @@
unsigned char * bpointer;
volatile u32 * GpuF0MMReg;
volatile u32 * pointer;
- int i;
+ int i, sblk;
u16 command;
u32 value;
u16 deviceid, vendorid;
@@ -453,9 +453,15 @@
vgainfo.usMinNBVoltage = 0;
vgainfo.usBootUpNBVoltage = 0x1a;
+ /* SB link */
+ value = pci_read_config32(k8_f0, 0x64);
+ sblk = (value >> 8) & 0x3;
+ printk(BIOS_DEBUG, "SBLK = %d.\n", sblk);
+
+ /* HT speed */
value = pci_read_config32(nb_dev, 0xd0);
printk(BIOS_DEBUG, "NB HT speed = %x.\n", value);
- value = pci_read_config32(k8_f0, 0x88);
+ value = pci_read_config32(k8_f0, 0x88 + (sblk * 0x20));
printk(BIOS_DEBUG, "CPU HT speed = %x.\n", value);
vgainfo.ulHTLinkFreq = 100 * 100; /* set HT speed. */
--
Regards,
Liu Tao
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