[coreboot] AMD AP core startup problem

Marc Jones marcj303 at gmail.com
Tue Oct 12 16:47:32 CEST 2010

On Tue, Oct 12, 2010 at 1:54 AM, Arne Georg Gleditsch
<arne.gleditsch at numascale.com> wrote:
> "Scott Duplichan" <scott at notabs.org> writes:
>> I find with my RS780/SB700 board (ECS A780GM-M3), the initial
>> family 10h AP launch is not reliable. I often see a hang when
>> when all the cores are running in parallel. The parallel execution
>> is apparent if serial logging is enabled, because the characters
>> logged by each core are interleaved. I noticed the AP cores do a
>> few cf8/cfc pci config writes. Could simultaneous access to this
>> shared index/data pair be responsible for the hang? Concerns about
>> such conflicts is why the AMD agesa code does not run cores on the
>> same die in parallel.
> This is actually the main reason I fixed MMCONFIG for AMD boards, since
> that avoids the cf8/cfc race.  I would suggest enabling that, but you
> might have to change the default address range.  I believe there's a BAR
> that's assigned a temporary address by the RS780 code that would clash.


As Arne said, make sure you have MMCONFIG enabled. I think it should
be on by default for all fam10 now?



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