[coreboot] [PATCH] Convert all Intel i810 boards to CAR
uwe at hermann-uwe.de
Wed Oct 13 21:14:40 CEST 2010
On Wed, Oct 13, 2010 at 09:00:00PM +0200, Uwe Hermann wrote:
> But you're right, the CACHE_BASE variables differ, but I guess they both
> work (0xc0000 works, I can test the other later just to make sure).
Actually, scratch that. It seems intel/car/cache_as_ram.inc hardcodes
the base to:
#define CacheBase (0xd0000 - CacheSize)
I.e. the DCACHE_RAM_BASE option is never used for this CAR
implementation. We have multiple possibilities to fix this:
- Drop DCACHE_RAM_BASE for these CPUs/sockets, and leave in the
hardcoded CacheBase, which means all of them will use the same base.
- Or, actually use DCACHE_RAM_BASE in the cache_as_ram.inc file,
which allows us to use different bases per-CPU or per-socket.
No idea if it makes sense to be able to select the base for these CPUs
at all (?)
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