[coreboot] CarPC project, with MB899 MB

Corey Osgood corey.osgood at gmail.com
Thu Oct 14 00:43:21 CEST 2010

On Wed, Oct 13, 2010 at 6:15 PM, Nasa <nasa01 at comcast.net> wrote:
> ----- "Peter Stuge" <peter at stuge.se> wrote:
>> Nasa wrote:
>> > All that said, I was hoping to get pointed in the right direction
>> > to being able to install this in my motherboard. The specifics of
>> > the board (in case I misread the post) are(from manual):
>> >
>> > IBASE MB899
>> > Intel 945GM Chipset
>> > GMCH: 82945GM 1466-pin Micro-FCBGA
>> > ICH7M:82801GBM 652-pin MBGA.
>> Did you pick a particular CPU for the board, or did the CPU come
>> already installed when you bought the board?
>> In general you're in luck because as was noted the board is supported
>> by coreboot.
>> You will need a few things:
>> * Cross-over serial cable (AKA null modem)
>> * Spare boot flash chips
>> * Patience
>> You have to choose a payload for your coreboot build. coreboot does
>> hardware init but does not include any code to boot your operating
>> system. That second part is handled by a completely separate program,
>> which is stored together with coreboot in the boot flash.
>> An easy first step might be to use SeaBIOS as payload. SeaBIOS is an
>> open source legacy BIOS implementation, so your system should start
>> just like before. Once everything is running well with
>> coreboot+SeaBIOS you could move on and try to optimize the boot even
>> further, using other payloads.
>> > While I am very capable of building software out of SVN (been doing
>> > that for mythtv, openmobile, etc) and linux kernel,
>> Good. Note that coreboot and SeaBIOS both run before an operating
>> system environment is available, and the toolchains shipped with many
>> distributions have been patched so that they fail to correctly build
>> such software. You can try using your regular toolchain, but if you
>> have any trouble then it is recommended to build a reference
>> toolchain and use that to build coreboot. After svn checkout of the
>> coreboot tree, do:
>> cd util/crossgcc
>> ./buildgcc
>> cd ../..
>> rm -f .xcompile
>> The next time you run make in the coreboot directory it should pick
>> up the toolchain built by buildgcc automatically. Check the contents
>> of .xcompile to make sure.
>> > I have not played with pulling individual chips, like a BIOS.  So I
>> > don't know anything about acquiring and/or replacing one.
>> Note that BIOS is the software, not so much the flash chip it is
>> stored in.
>> You will need replacement flash chips. They shouldn't cost more than
>> a few USD and I recommend getting a few of them, so that you always
>> have at least one backup of the factory BIOS that you can use if
>> coreboot doesn't work straight away. (Sometimes it will, but better
>> safe than sorry, if there's a problem you can't start the system
>> anymore without a backup flash chip.)
>> Warren Turkal wrote:
>> > the bios chip might be the SST thing near the white connector in
>> > the bottom left quadrant of the board.
>> Yes, that's correct. This package is called PLCC32, but only
>> describes the physical format of the chip.
>> > I think it's an LPC style chip.
>> Well, almost. It is connected to a bus which is electrically and
>> protocol-wise compatible with LPC, but all Intel chipsets use their
>> own memory read and write commands which are different from the LPC
>> standard commands. The flash chip type is usually called FWH,
>> Firmware Hub, since that is the name of Intel's own boot flash chips.
>> Look for a couple of compatible flash chips. Some current part
>> numbers are:
>> 8Mbit = 1Mbyte
>> SST49LF008A-33-4C-NHE
>> http://parts.digikey.com/1/parts/1904170-ic-flash-fwh-8mbit-33mhz-32plcc-sst49lf008a-33-4c-nhe.html
>> 16Mbit = 2Mbyte
>> SST49LF016C-33-4C-NHE
>> SST49LF016C-66-4C-NHE
>> http://parts.digikey.com/1/parts/1904173-ic-flash-ser-lpc-16mbit-32plcc-sst49lf016c-33-4c-nhe.html
>> You can most likely use flashrom (flashrom.org, coreboot sibling
>> project) to read the factory BIOS from the chip in a running system.
>> You can then hotswap flash chips (prepare them with pushpin knobs
>> first) in the running system, put a blank chip in, and write your
>> first factory BIOS backup onto that. Then get the third flash chip,
>> repeat the hotswap, and write a coreboot image with SeaBIOS onto
>> that chip. Reboot and watch the seral port output on another
>> computer, via the null modem cable.
>> //Peter
> Wow,
> Thanks a lot Peter -- that was VERY informative.
> I choose the CPU (a number of years ago) which is an Intel Core 2 Duo Mobile 1.66GHz.
> I have read a little about payloads and noted that SeaBIOS would be the easiest way to go...
> However (this being important for the flash chip), I didn't see anything about the benefits of
> putting a linux kernel as a payload.  I did read from the FAQ that most chips aren't large
> enough to have the kernel added as a payload.  If my goal is the fastest boot time possible, while
> still supporting the basic system, would going to a Linux payload be the way to go?  If so, what
> size flash chip should I get?

Most likely, you won't be able to find a flash chip large enough to
support a full-fledged linux kernel for a payload. It's been done
(like here: http://youtu.be/nuzRsXKm_NQ ), and would probably be the
fastest way to go, but you would have to give up a lot of kernel
features in order to get the kernel down to small enough of a size. If
you're going with a linux payload though, I'd look at FILO rather then
SeaBIOS, just because you don't need the legacy BIOS features that
SeaBIOS implements.


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