[coreboot] non-posted/posted MMIO on MMCONFIG

Scott Duplichan scott at notabs.org
Sun Oct 17 22:31:02 CEST 2010


]Hi,
]
]I check AMD BKDG and MMCONFIG region should be marked non-posted (CPU waits for 
]transaction to complete). Also this suggest the PCI ENC. I think the early bar3 
]code sets non-posted in sb700/rs780 but in general we dont have any generic support.
]
]http://www.pcisig.com/specifications/pciexpress/PciEx_ECN_MMCONFIG_040217.pdf
]
]It looks we have no support for posted/non-posted MMIO resource type right?
]
]As the side note, the fam10h has MMIO MMCONFIG region too.
]
]Most likely we should for AMDadd the NON_POSTED resource and set the bit in 
]resourcemap (the MMIO routing registers)
]
]Thanks,
]Rudolf


Hello Rudolf,

You are right. AMD is recommended non-posted for more and more mmio lately.
For example, with SB800 AMD says to use non-posted for "TPM, HPET, BIOS RAM,
Watchdog Timer, I/O APIC and ACPI". This is needed to prevent a potential
deadlock situation.

The RS780 docs say to use non-posted for the uma frame buffer. I think this
is a cya statement, because it just kills non-hardware accelerated graphics
performance. After my desktop computer boots windows, I turn non-posted off
for the RS780 frame buffer because firefox has scrolling trouble when
hardware acceleration is used.

I wanted to implement your idea of individually selecting posted or non-posted,
but it looked like significant work is involved. At the moment, I just have all
mmio set to non-posted. Code for selecting non-posted mmio on a range by range
basis would be most welcome.

Thanks,
Scott






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