[coreboot] [PATCH] fix cpu ht speed display in rs780_gfx.c
Uwe Hermann
uwe at hermann-uwe.de
Sun Oct 17 23:39:46 CEST 2010
On Mon, Oct 11, 2010 at 09:17:06AM -0600, Myles Watson wrote:
> On Sun, Oct 10, 2010 at 9:48 PM, Liu Tao <liutao1980 at gmail.com> wrote:
> > Hello,
> >
> > the original code reads cpu ht speed from HT chain 0's register.
> > the patch fix it to read the register from the chain which SB chip is on.
> >
> > Signed-off-by: Liu Tao <liutao1980 at gmail.com>
> Acked-by: Myles Watson <mylesgw at gmail.com>
Thanks, committed as r5958 with small changes as suggested:
- Renamed sblk to sblink (the name of the register bits as per
BIOS + Kernel Developer's Guide for AMD Athlon 64 & AMD Opteron Processors,
chapter 3.3.8.
- Made sblink an u32 instead of int.
- Mention full name/description of sblink in a comment:
"HyperTransport I/O Hub Link ID"
Uwe.
--
http://hermann-uwe.de | http://sigrok.org
http://randomprojects.org | http://unmaintained-free-software.org
More information about the coreboot
mailing list