[coreboot] [PATCH] Add IOAPIC support for Intel 82371EB and fixup SMP on ASUS P2B-D

Peter Stuge peter at stuge.se
Thu Oct 28 08:58:45 CEST 2010


Uwe Hermann wrote:
> Add IOAPIC support for Intel 82371EB and fixup SMP on ASUS P2B-D.
> 
>  - Add enable_intel_82093aa_ioapic() which enables IOAPIC usage in the
>    Intel 82371EB southbridge (sets the proper chip-select) and sets an
>    IOAPIC ID.
> 
>  - We only call enable_intel_82093aa_ioapic() if a board does "select IOAPIC"
>    as on 82371EB-based boards the IOAPIC is an external chip (not integrated
>    in the southbridge) and it's only populated on multi-CPU boards.
>    That is, we cannot unconditionally enable it, only on SMP-capable boards.
> 
>  - Due to the reason explained above, remove "select IOAPIC" from
>    src/southbridge/intel/i82371eb/Kconfig, and add it to
>    src/mainboard/asus/p2b-d/Kconfig.
> 
>  - Also set CONFIG_MAX_PHYSICAL_CPUS to 2 on ASUS P2B-D. There are two
>    CPU sockets (Slot 1) and each CPU can only have one core, multi-core CPUs
>    didn't exist in that era (CONFIG_MAX_CPUS was set to 2 already).
> 
>  - Drop useless/duplicated enable_lapic() call from ASUS P2B-D's romstage.c,
>    that function is always called if either CONFIG_SMP and/or CONFIG_IOAPIC
>    are set.
> 
>  - Rework ASUS P2B-D mptable.c to fix a number of things:
> 
>    - Convert it to use mptable_write_buses() as all mptable.c files should do.
> 
>    - Fix incorrect IOAPICID (it's 0x11 for the external 82093AA IOAPIC).
> 
>    - Fix a bunch of hardcoded bus IDs, remove incorrect entries, etc.
> 
> This is build-tested on ASUS P2B-D, and also boot-tested successfully there.
> On Linux I now get two entries in /proc/cpuinfo (where only one appeared
> before this patch), i.e. both populated CPUs are found.
> 
> Signed-off-by: Uwe Hermann <uwe at hermann-uwe.de>

Acked-by: Peter Stuge <peter at stuge.se>




More information about the coreboot mailing list