[coreboot] AMD Tilapia / simnow: endless looping infunctionpci_scan_bus
Zheng.Bao at amd.com
Sun Sep 5 04:00:42 CEST 2010
Please see the log when the mahogany_fam10 was created. That is r5221.
That is the problem located in folder amdht, which is about HT
initialization of Family 10.
> -----Original Message-----
> From: coreboot-bounces at coreboot.org
[mailto:coreboot-bounces at coreboot.org]
> On Behalf Of Warren Turkal
> Sent: Saturday, September 04, 2010 11:12 AM
> To: Juhana Helovuo
> Cc: Scott; coreboot at coreboot.org
> Subject: Re: [coreboot] AMD Tilapia / simnow: endless looping
> Who's responsible for the tilapia port? I am trying to assign this to
> someone in the patchwork system, but I don't know who to assign it to.
> Also, is there a testbed that can run this change to make sure it
> doesn't break non-tilapia systems?
> On Thu, Sep 2, 2010 at 12:18 AM, Juhana Helovuo <juhe at iki.fi> wrote:
> > 1.9.2010 23:00, Scott kirjoitti:
> >> Thanks Myles. That problem description and work-around matches my
> >> situation exactly. Even if the bad value passed to pci_scan_bus is
> >> only a side-effect of another problem, special handling for it
> >> be considered in order to simplify debugging.
> >> The same thead covers another problem I encounter with Tilapia.
> >> I enable ACPI table generation, an overlap causes the seabios
> >> to overwrite the ACPI tables. I temporarily worked around this
> >> by deselecting GFXUMA. I am using PCI video so I can boot with no
> > Hello,
> > I had similar problems recently. I did a patch for Asus M4A785-M,
> > derived from the AMD Tilapia port.
> > The patch can be found at
> > http://www.coreboot.org/pipermail/coreboot/2010-August/059989.html
> > There is another patch that sets up UMA and coreboot/ACPI/etc.
> > reserved areas in the multiboot tables. Without this patch booting
> > to Linux suffers from the same problem of overwriting tables.
> > http://www.coreboot.org/pipermail/coreboot/2010-August/060014.html
> > I do not know if these are going to be integrated to the Coreboot
> > currently they are available as patch files.
> > How does SeaBIOS detect which RAM is usable and which is not? Maybe
> > memory conflict with UMA and ACPI tables could be avoided in a
> > manner?
> > Best regards,
> > Juhana Helovuo
> > --
> > coreboot mailing list: coreboot at coreboot.org
> > http://www.coreboot.org/mailman/listinfo/coreboot
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