[coreboot] AMD cache setup is broken (was: SuperMicro h8dmr-i2 slowness in v4)
stefan.reinauer at coresystems.de
Mon Sep 6 12:08:03 CEST 2010
On 9/6/10 10:12 AM, Arne Georg Gleditsch wrote:
> "Nick Lemberger" <Nick.Lemberger at lkfd.net> writes:
>> I'm having some trouble with current releases of coreboot on a
>> Supermicro H8DMR-i2.
>> The initial problem, it takes about 2 minutes to show the:
>> "coreboot-4.0-r5775 Fri Sep 3 14:55:01 CDT 2010 starting..."
>> and equally as long after the warm reset.
>> The second, the system freezes at "Clearning initial memory region:" for
>> about a half hour before proceeding. After that, everything works as
>> There has been some list chatter about a similar problem with the H8DME,
>> but that was based upon the H8DMR code so it's odd that it found it's
>> way here. I've attached the full serial output if that's at all useful.
> Can you see if the patches posted in
> http://article.gmane.org/gmane.linux.bios/57707 make any difference for
Did we ever figure out what is causing this?
The patch would require 4KB more stack on all supported systems, so if
we can we should do things differently.
Also, it's not really guaranteed that the code works from the new
location since we don't compile coreboot with -fPIC (and as far as I
understand the GCC guys, even that would not help), so I am a bit
hesitant to check this in.
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