[coreboot] MS-6147, SeaBIOS, and OpenBSD.

Mats Erik Andersson mats.andersson at gisladisker.se
Wed Sep 8 12:55:35 CEST 2010

I have worked on variations on the previous setup.

lördag den  4 september 2010 klockan 01:52 skrev Peter Stuge detta:
> Mats Erik Andersson wrote:
> >   2. In the overview of supported mainboards, there ought to
> >      be an entry "Y" for MSI MS-6147, stipulating that the
> >      DIL32-ROM is set in a socket.
> Done. Flashrom too?

Yes, and in fact the untested erasure of EON EN29F002NT can now
be marked as working for Flashrom, besides the already known read/write.

> >      fully functional OpenBSD
> Nice!

Now, when using the full 256kB capacity, some quirks surface in practice.

I have extracted the VGA-BIOS from the original Award-BIOS, and I have
incorporated it with Coreboot. The graphics chip is ATI 3D Rage Pro AGP,
with pci-id 1002:4742. Thus I do arrive at a serial console, as well as
the usual text console. This is a good thing, if not for other reasons
that I managed to amalgamate CBFS/VGA-BIOS/SeaBIOS!

When booting Debian GNU/Linux via Coreboot/SeaBIOS, the kernel complains

    [0.204012] weird, boot CPU(#0) not listed by BIOS.

Harmless, but annoying. Is CBFS saving somespace?

The booting from SeaBIOS is troublesome. Switching floppy and CD-ROM
booting off, did not help. I had to switch PNP, DMA and 32bit-PIO
off too, before I got bootable systems.

It is annoying that the OS commences only after

    "WARNING - Timeout at await_ide:39!".

This message originates in SeaBIOS, but would CBFS or SeaBIOS be
the one to blame the most for this lost time?

The uhci_hcd circuitry is detected, but it is not assigned an IRQ,
so Linux as well as OpenBSD considers it to be broken. SeaBIOS
reports an io-port 0x20c0, though. 

Neither Linux, nor OpenBSD, are able to accomplish a complete power down,
as power supply is still applied after shutdown.

Moving the single DIMM to another socket, makes the nortbridge
initialisation fail immediately after printing

    "Northbridge following SDRAM init".

I thought I had solved that issue two years ago. Did I not, or have
other mechanisms been implemented since then? This must be investigated
again.  In fact, booting is successful with only DIMM2 being populated,
not when DIMM1 is used in its stead.

Best regards for now,

Mats E A

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