[coreboot] [commit] r5787 - in trunk/src: cpu/x86 cpu/x86/tsc southbridge/amd/cs5536

[repository service]

Author: oxygene
Date: Wed Sep  8 12:58:02 2010
New Revision: 5787
URL: https://tracker.coreboot.org/trac/coreboot/changeset/5787

Log:
Make timer2 the default choice for TSC initialization.
For boards where timer2 is unusable, there's still the IO based
initialization available using the Kconfig option TSC_CALIBRATE_WITH_IO

Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>
Acked-by: Kevin O'Connor <kevin at koconnor.net>

Modified:
   trunk/src/cpu/x86/Kconfig
   trunk/src/cpu/x86/tsc/delay_tsc.c
   trunk/src/southbridge/amd/cs5536/Kconfig

Modified: trunk/src/cpu/x86/Kconfig
==============================================================================
--- trunk/src/cpu/x86/Kconfig	Wed Sep  8 12:53:44 2010	(r5786)
+++ trunk/src/cpu/x86/Kconfig	Wed Sep  8 12:58:02 2010	(r5787)
@@ -19,7 +19,7 @@
 	bool
 	default n
 
-config TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
+config TSC_CALIBRATE_WITH_IO
 	bool
 	default n
 

Modified: trunk/src/cpu/x86/tsc/delay_tsc.c
==============================================================================
--- trunk/src/cpu/x86/tsc/delay_tsc.c	Wed Sep  8 12:53:44 2010	(r5786)
+++ trunk/src/cpu/x86/tsc/delay_tsc.c	Wed Sep  8 12:58:02 2010	(r5787)
@@ -7,7 +7,7 @@
 
 static unsigned long clocks_per_usec;
 
-#if (CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 == 1)
+#if !CONFIG_TSC_CALIBRATE_WITH_IO
 #define CLOCK_TICK_RATE	1193180U /* Underlying HZ */
 
 /* ------ Calibrate the TSC -------
@@ -82,7 +82,7 @@
 	return 0;
 }
 
-#else /*  CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 */
+#else /*  CONFIG_TSC_CALIBRATE_WITH_IO */
 
 /*
  * this is the "no timer2" version.

Modified: trunk/src/southbridge/amd/cs5536/Kconfig
==============================================================================
--- trunk/src/southbridge/amd/cs5536/Kconfig	Wed Sep  8 12:53:44 2010	(r5786)
+++ trunk/src/southbridge/amd/cs5536/Kconfig	Wed Sep  8 12:58:02 2010	(r5787)
@@ -19,12 +19,5 @@
 
 config SOUTHBRIDGE_AMD_CS5536
 	bool
-	select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
-
-config UDELAY_TSC
-	bool
-	default y
-	depends on SOUTHBRIDGE_AMD_CS5536
-
-
+	select UDELAY_TSC