[coreboot] [PATCH] AMD MMCONF Support

[Myles Watson]

-
-	RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xC0FFFFFF, 0x19000000,
+	/* The following operation hangs when performed via MMCFG:
+	     pci_read_config32(romcc): 00010000:0078: 20040000
+	     setup_resource_map_x_offset: 10000, 78: 20040000
+	     pci_write_config32(romcc): 00010000:0078: 19040000
+	     (hang)
+	   Response missing? */
+	/* RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xC0FFFFFF, 0x19000000, */

I forgot to ask if you'd tried setting the SyncOnWdError bit (20) in
function 3, register 0x44.  That could help further debug this
problem.  For me it caused a reboot instead of a hang when there was a
response missing.  Bit 21 could also be helpful.

Since we don't have the chipset documentation, it makes me a little
worried to leave out one of the settings.  Maybe we could use non
MMCONF writes for that setting.

Thanks,
Myles