[coreboot] [help] A K8/RS780/SB710 board MCE error

Liu Tao liutao1980 at gmail.com
Tue Sep 14 04:49:19 CEST 2010


Hello everyone,

I'm porting coreboot v4 to a k8-rs780-sb710 based mainboard,  and use
amd/mahogany
and amd/tilapia_fam10 codes as the reference. Now coreboot boots the
board and filo loads linux,but the board crashes at a MCE error during
booting process. I'm not very know the detail about the MCE, so any
suggestions will be appreciated, thanks very much.

The mainboard architecture:
CPU: socket F Opteron 2210 EE get_cpu_rev EAX=0x40f13 (1 cpu, dual core)
DIMM: DDR2 333M (x1 / x2)
HT Link0: off
HT Link1: RS780->SB710
HT Link2: off
VGA off
GFX off
PCIE off

coreboot code  revision: modified on r5692

The MCE/panic message:

HARDWARE ERROR
CPU 0: Machine Check Exception:                4 Bank 0: f658a00000000833
TSC 572507f34 ADDR 6000
This is not a software problem!
Run through mcelog --ascii to decode and contact your hardware vendor
Kernel panic - not syncing: Machine check
------------[ cut here ]------------
WARNING: at kernel/smp.c:331 smp_call_function_mask+0x32/0x1ec()
Modules linked in:
Supported: Yes
Pid: 1, comm: swapper Tainted: G   M      2.6.27.19-5-default #1

Call Trace:
 [<ffffffff8020d9f9>] show_trace_log_lvl+0x41/0x58
 [<ffffffff80496a74>] dump_stack+0x69/0x6f
 [<ffffffff8023bfba>] warn_on_slowpath+0x51/0x77
 [<ffffffff8025b1c5>] smp_call_function_mask+0x32/0x1ec
 [<ffffffff8025b3a8>] smp_call_function+0x29/0x2e
 [<ffffffff8021a04a>] native_smp_send_stop+0x1a/0x26
 [<ffffffff80496b36>] panic+0xbc/0x169
 [<ffffffff80216366>] mce_log+0x0/0x7e
 [<ffffffff80216740>] do_machine_check+0x31e/0x3cd
 [<ffffffff8020d27f>] machine_check+0x7f/0x90
 [<ffffffff802126c8>] setup_trampoline+0x20/0x30
 [<ffffffff804919a5>] native_cpu_up+0x31e/0xc64
 [<ffffffff80493d17>] _cpu_up+0x9a/0x11c
 [<ffffffff80493df4>] cpu_up+0x5b/0x6f
 [<ffffffff8095b708>] kernel_init+0xe1/0x1eb
 [<ffffffff8020cf49>] child_rip+0xa/0x11

---[ end trace 4eaa2a86a8e2da22 ]---

mcelog --k8 --ascii

HARDWARE ERROR
CPU 0: Machine Check Exception:                4 Bank 0: f658a00000000833
TSC 572507f34 ADDR 6000
This is not a software problem!
Run through mcelog --ascii to decode and contact your hardware vendor
HARDWARE ERROR
CPU 0 0 data cache TSC 572507f34
  Data cache ECC error (syndrome b1)
       bit45 = uncorrected ecc error
       bit57 = processor context corrupt
       bit61 = error uncorrected
       bit62 = error overflow (multiple errors)
  bus error 'local node origin, request didn't time out
      data read mem transaction
      memory access, level generic'
STATUS f658a00000000833 MCGSTATUS 4
This is not a software problem!
Run through mcelog --ascii to decode and contact your hardware vendor

Attached is the detailed boot message.

-- 
Regards,
Liu Tao
-------------- next part --------------


coreboot-4.0-r Mon Sep 13 17:31:31 CST 2010 starting...

BSP Family_Model: 00040f13 
*sysinfo range: [000cf000,000cf730]
bsp_apicid = 00 
cpu_init_detectedx = 00000000 
Enabling routing table for node 00 done.
Enabling SMP settings
01 nodes initialized.
Enabling UP settings
coherent_ht_finalize
done
core0 started: 
start_other_cores()
* AP 01started
SBLink=01
NC node|link=01
rs780_early_setup()
get_cpu_rev EAX=0x40f13.
CPU Rev is K8_Fx.
k8_optimization()
rs780_por_init
sb700_early_setup()
sb700_devices_por_init()
sb700_devices_por_init(): SMBus Device, BDF:0-20-0
SMBus controller enabled, sb revision is A14
sb700_devices_por_init(): IDE Device, BDF:0-20-1
sb700_devices_por_init(): LPC Device, BDF:0-20-3
sb700_devices_por_init(): P2P Bridge, BDF:0-20-4
sb700_devices_por_init(): SATA Device, BDF:0-18-0
sb700_pmio_por_init()
begin msr fid, vid: hi=0xe1010, lo=0xe0a0202
Current fid_cur: 0x2, fid_max: 0xa
Requested fid_new: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
fid_new = 0xa, fid_cur = 0x2
set fid failed for apicid =00
end msr fid, vid: hi=0xe100e, lo=0xe0a0202
entering optimize_link_incoherent_ht
sysinfo->link_pair_num=0x1
entering ht_optimize_link
pos=0xaa, unfiltered freq_cap=0x8075
pos=0xaa, filtered freq_cap=0x75
pos=0xd2, unfiltered freq_cap=0x1c75
pos=0xd2, filtered freq_cap=0x1c75
freq_cap1=0x75, freq_cap2=0x1c75
dev1 old_freq=0x0, freq=0x6, needs_reset=0x1
dev2 old_freq=0x0, freq=0x6, needs_reset=0x1
width_cap1=0x11, width_cap2=0x11
dev1 input ln_width1=0x4, ln_width2=0x4
dev1 input width=0x1
dev1 output ln_width1=0x4, ln_width2=0x4
dev1 input|output width=0x11
old dev1 input|output width=0x11
dev2 input|output width=0x11
old dev2 input|output width=0x11
after ht_optimize_link for link pair 0, reset_needed=0x1
after optimize_link_read_pointers_chain, reset_needed=0x1
rs780_htinit cpu_ht_freq=0.
rs780_htinit: HT1 mode
ht reset -


coreboot-4.0-r Mon Sep 13 17:31:31 CST 2010 starting...

BSP Family_Model: 00040f13 
*sysinfo range: [000cf000,000cf730]
bsp_apicid = 00 
cpu_init_detectedx = 00000000 
Enabling routing table for node 00 done.
Enabling SMP settings
01 nodes initialized.
Enabling UP settings
coherent_ht_finalize
done
core0 started: 
start_other_cores()
* AP 01started
SBLink=01
NC node|link=01
rs780_early_setup()
get_cpu_rev EAX=0x40f13.
CPU Rev is K8_Fx.
k8_optimization()
rs780_por_init
sb700_early_setup()
sb700_devices_por_init()
sb700_devices_por_init(): SMBus Device, BDF:0-20-0
SMBus controller enabled, sb revision is A14
sb700_devices_por_init(): IDE Device, BDF:0-20-1
sb700_devices_por_init(): LPC Device, BDF:0-20-3
sb700_devices_por_init(): P2P Bridge, BDF:0-20-4
sb700_devices_por_init(): SATA Device, BDF:0-18-0
sb700_pmio_por_init()
begin msr fid, vid: hi=0xe100e, lo=0xe0a0202
Current fid_cur: 0x2, fid_max: 0xa
Requested fid_new: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
FidVid table step fidvid: 0xa
fid_new = 0xa, fid_cur = 0x2
set fid failed for apicid =00
end msr fid, vid: hi=0xe100e, lo=0xe0a0202
entering optimize_link_incoherent_ht
sysinfo->link_pair_num=0x1
entering ht_optimize_link
pos=0xaa, unfiltered freq_cap=0x8075
pos=0xaa, filtered freq_cap=0x75
pos=0xd2, unfiltered freq_cap=0x1c75
pos=0xd2, filtered freq_cap=0x1c75
freq_cap1=0x75, freq_cap2=0x1c75
dev1 old_freq=0x6, freq=0x6, needs_reset=0x0
dev2 old_freq=0x6, freq=0x6, needs_reset=0x0
width_cap1=0x11, width_cap2=0x11
dev1 input ln_width1=0x4, ln_width2=0x4
dev1 input width=0x1
dev1 output ln_width1=0x4, ln_width2=0x4
dev1 input|output width=0x11
old dev1 input|output width=0x11
dev2 input|output width=0x11
old dev2 input|output width=0x11
after ht_optimize_link for link pair 0, reset_needed=0x0
after optimize_link_read_pointers_chain, reset_needed=0x0
rs780_htinit cpu_ht_freq=0.
rs780_htinit: HT1 mode
fill_mem_ctrl()
Ram1.00
setting up CPU 00 northbridge registers
done.
Ram2.00
sdram_set_spd_registers: paramx :000cedb8
DIMM socket 0, channel 0 SPD device is 0x50
DIMM socket 0, channel 1 SPD device is 0x52
DIMM socket 1, channel 0 SPD device is 0x00
DIMM socket 1, channel 1 SPD device is 0x00
DIMM socket 2, channel 0 SPD device is 0x00
DIMM socket 2, channel 1 SPD device is 0x00
DIMM socket 3, channel 0 SPD device is 0x00
DIMM socket 3, channel 1 SPD device is 0x00
sdram_set_spd_registers: dimm_mask=0x1
spd_enable_2channels: dimm_mask=0x1
spd_set_ram_size: dimm_mask=0x1
Registered
spd_handle_unbuffered_dimms: dimm_mask=0x1
1 min_cycle_time: 00000250
1.1 dimm_mask: 00000001
i: 00000000
Channel 0 settings:
        latencies: 00000038
        index: 00000000
                latency: 00000003
                value1: 00000050
                value2: 00000500
                new_cycle_time: 00000500
                new_latency: 00000003
        index: 00000001
                latency: 00000004
                value1: 0000003d
                value2: 00000375
                new_cycle_time: 00000375
                new_latency: 00000004
        index: 00000002
                latency: 00000005
                value1: 00000030
                value2: 00000300
                new_cycle_time: 00000300
                new_latency: 00000005
2 min_cycle_time: 00000300
2 min_latency: 00000005
1.1 dimm_mask: 00000001
i: 00000001
1.1 dimm_mask: 00000001
i: 00000002
1.1 dimm_mask: 00000001
i: 00000003
3 min_cycle_time: 00000300
3 min_latency: 00000005
4 min_cycle_time: 00000300
333MHz
333MHz
spd_set_memclk: dimm_mask=0x1
spd_set_dram_timing dimm socket:  00000000
        trc
update_dimm_Trc: tRC (41) = 0000003c
update_dimm_Trc: tRC final value = 2400
update_dimm_Trc: clocks = 12
update_dimm_Trc: clocks after adjustment = 12
        trcd
        trrd
        tras
update_dimm_Tras: 0 value= 0000002d
update_dimm_Tras:  1 value= 00000708
update_dimm_Tras: divisor= 000000c8
update_dimm_Tras: clocks= 00000009
        trp
        trtp
        twr
        tref
        twtr
        trfc
spd_set_dram_timing: dimm_mask=0x1
Interleaved
RAM end at 0x00200000 kB
Lower RAM end at 0x00200000 kB
Ram3
sdram_enable: tsc0[8]: 000cee90ECC enabled
Initializing memory:  done
Handling memory hole at 0x00300000 (default)
Setting variable MTRR 2, base:    0MB, range: 2048MB, type WB
DQS Training:RcvrEn:Pass1: 00

train_DqsRcvrEn: begin ctrl 0

TrainRcvEn: 0 ctrl0
 CTLRMaxDelay=03

train_DqsRcvrEn: end ctrl 0
 done
DQS Training:DQSPos: 00

train_DqsPos: begin ctrl 0

TrainDQSRdWrPos: 0 ctrl 0
TrainDQSRdWrPos: buf_a:000ce950
TrainDQSPos: MutualCSPassW[48] :000ce828
TrainDQSPos: MutualCSPassW[48] :000ce828
TrainDQSPos: MutualCSPassW[48] :000ce828
TrainDQSPos: MutualCSPassW[48] :000ce828
TrainDQSRdWrPos: 5

train_DqsPos: end ctrl 0
 done
DQS Training:RcvrEn:Pass2: 00

train_DqsRcvrEn: begin ctrl 0

TrainRcvEn: 0 ctrl0
 CTLRMaxDelay=57

train_DqsRcvrEn: end ctrl 0
 done
DQS SAVE NVRAM: c2000
DQS Training:tsc[00]=000000002b63ab40
DQS Training:tsc[01]=000000002c70825b
DQS Training:tsc[02]=000000002c73e4c5
DQS Training:tsc[03]=0000000034cd025d
DQS Training:tsc[04]=00000000360a929b
Ram4

*** Yes, the copy/decompress is taking a while, FIXME!
v_esp=000cef58
testx = 5a5a5a5a
Copying data from cache to RAM -- switching to use RAM as stack... Done
testx = 5a5a5a5a
Disabling cache as ram now 
Clearing initial memory region: Done
Loading stage image.
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x200000 (1376256 bytes), entry @ 0x200000
Stage: done loading.
Jumping to image.
coreboot-4.0-r Mon Sep 13 17:31:31 CST 2010 booting...
Enumerating buses...
Show all devs...Before Device Enumeration.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 0
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 0
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 0
PCI: 00:0a.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 0
PCI: 00:12.1: enabled 0
PCI: 00:12.2: enabled 0
PCI: 00:13.0: enabled 0
PCI: 00:13.1: enabled 0
PCI: 00:13.2: enabled 0
PCI: 00:14.0: enabled 1
I2C: 00:50: enabled 1
I2C: 00:52: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 0
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 0
PNP: 002e.3: enabled 0
PNP: 002e.4: enabled 0
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PNP: 002e.7: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.a: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
Compare with tree...
Root Device: enabled 1
 APIC_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
 PCI_DOMAIN: 0000: enabled 1
  PCI: 00:18.0: enabled 1
   PCI: 00:00.0: enabled 1
   PCI: 00:01.0: enabled 0
   PCI: 00:02.0: enabled 0
   PCI: 00:03.0: enabled 0
   PCI: 00:04.0: enabled 0
   PCI: 00:05.0: enabled 0
   PCI: 00:06.0: enabled 0
   PCI: 00:07.0: enabled 0
   PCI: 00:08.0: enabled 0
   PCI: 00:09.0: enabled 0
   PCI: 00:0a.0: enabled 0
   PCI: 00:11.0: enabled 1
   PCI: 00:12.0: enabled 0
   PCI: 00:12.1: enabled 0
   PCI: 00:12.2: enabled 0
   PCI: 00:13.0: enabled 0
   PCI: 00:13.1: enabled 0
   PCI: 00:13.2: enabled 0
   PCI: 00:14.0: enabled 1
    I2C: 00:50: enabled 1
    I2C: 00:52: enabled 1
   PCI: 00:14.1: enabled 1
   PCI: 00:14.2: enabled 0
   PCI: 00:14.3: enabled 1
    PNP: 002e.0: enabled 0
    PNP: 002e.1: enabled 1
    PNP: 002e.2: enabled 0
    PNP: 002e.3: enabled 0
    PNP: 002e.4: enabled 0
    PNP: 002e.5: enabled 1
    PNP: 002e.6: enabled 1
    PNP: 002e.7: enabled 0
    PNP: 002e.8: enabled 0
    PNP: 002e.9: enabled 0
    PNP: 002e.a: enabled 0
   PCI: 00:14.4: enabled 1
   PCI: 00:14.5: enabled 0
  PCI: 00:18.1: enabled 1
  PCI: 00:18.2: enabled 1
  PCI: 00:18.3: enabled 1
Mainboard X6000 Enable. dev=0x0021b338
x6000_enable, TOP MEM: msr.lo = 0x80000000, msr.hi = 0x00000000
x6000_enable, TOP MEM2: msr2.lo = 0x00000000, msr2.hi = 0x00000000
x6000_enable: uma size 0x10000000, memory start 0x70000000
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
PCI_DOMAIN: 0000 enabled
APIC_CLUSTER: 0 scanning...
  PCI: 00:18.3 siblings=1
CPU: APIC: 00 enabled
malloc Enter, size 68, free_mem_ptr 00290000
malloc 00290000
CPU: APIC: 01 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:18.0 [1022/1100] bus ops
PCI: 00:18.0 [1022/1100] enabled
PCI: 00:18.1 [1022/1101] enabled
PCI: 00:18.2 [1022/1102] enabled
PCI: 00:18.3 [1022/1103] ops
PCI: 00:18.3 [1022/1103] enabled
PCI: Using configuration type 1
rs780_enable: dev=0021b824, VID_DID=0x96001022
nb_devfn = 0x0
sb_devfn = 0x40
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3() ...done
addr=e0000000,bus=0,devfn=40
gpp_sb_init nb_dev=0x0, dev=0x40, port=0x8
NB_PCI_REG04 = 6.
NB_PCI_REG84 = 3000095.
NB_PCI_REG4C = 52042.
PCI: 00:00.0 [1022/9600] ops
PCI: 00:00.0 [1022/9600] enabled
Capability: type 0x08 @ 0xc4
flags: 0x0180
PCI: 00:00.0 count: 000c static_count: 0015
PCI: 00:00.0 [1022/9600] enabled next_unitid: 0015
PCI: pci_scan_bus for bus 00
rs780_enable: dev=0021b824, VID_DID=0x96001022
nb_devfn = 0x0
sb_devfn = 0x40
Bus-0, Dev-0, Fun-0.
enable_pcie_bar3() ...done
gpp_sb_init nb_dev=0x0, dev=0x40, port=0x8
NB_PCI_REG04 = 6.
NB_PCI_REG84 = 3000095.
NB_PCI_REG4C = 52042.
PCI: 00:00.0 [1022/9600] enabled
rs780_enable: dev=0021b9bc, VID_DID=0x96021022
nb_devfn = 0x0
sb_devfn = 0x40
Bus-0, Dev-1, Fun-0.
GC is accessible from now on.
Capability: type 0x08 @ 0x44
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0x44
Capability: type 0x08 @ 0x44
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0x44
Capability: type 0x0d @ 0xb0
PCI: 00:01.0 [1022/9602] disabled
rs780_enable: dev=0021bb54, VID_DID=0x96031022
nb_devfn = 0x0
sb_devfn = 0x40
Bus-0, Dev-2,3, Fun-0. enable=0
rs780_enable: dev=0021bc64, VID_DID=0x960b1022
nb_devfn = 0x0
sb_devfn = 0x40
Bus-0, Dev-2,3, Fun-0. enable=0
rs780_enable: dev=0021bcec, VID_DID=0x96041022
nb_devfn = 0x0
sb_devfn = 0x40
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
rs780_enable: dev=0021bd74, VID_DID=0x96051022
nb_devfn = 0x0
sb_devfn = 0x40
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
rs780_enable: dev=0021bdfc, VID_DID=0x96061022
nb_devfn = 0x0
sb_devfn = 0x40
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
rs780_enable: dev=0021be84, VID_DID=0x96071022
nb_devfn = 0x0
sb_devfn = 0x40
Bus-0, Dev-4,5,6,7, Fun-0. enable=0
rs780_enable: dev=0021bf0c, VID_DID=0x960a1022
nb_devfn = 0x0
sb_devfn = 0x40
Bus-0, Dev-8, Fun-0. enable=0
disable_pcie_bar3() ...done
rs780_enable: dev=0021bf94, VID_DID=0x96081022
nb_devfn = 0x0
sb_devfn = 0x40
Bus-0, Dev-9, 10, Fun-0. enable=0
enable_pcie_bar3() ...done
rs780_enable: dev=0021c01c, VID_DID=0x96091022
nb_devfn = 0x0
sb_devfn = 0x40
Bus-0, Dev-9, 10, Fun-0. enable=0
enable_pcie_bar3() ...done
sb700_enable()
PCI: 00:11.0 [1002/4390] ops
PCI: 00:11.0 [1002/4390] enabled
sb700_enable()
sb700_enable()
sb700_enable()
sb700_enable()
sb700_enable()
sb700_enable()
sb700_enable()
PCI: 00:14.0 [1002/4385] bus ops
PCI: 00:14.0 [1002/4385] enabled
sb700_enable()
PCI: 00:14.1 [1002/439c] ops
PCI: 00:14.1 [1002/439c] enabled
sb700_enable()
sb700_enable()
PCI: 00:14.3 [1002/439d] bus ops
PCI: 00:14.3 [1002/439d] enabled
sb700_enable()
PCI: 00:14.4 [1002/4384] bus ops
PCI: 00:14.4 [1002/4384] enabled
sb700_enable()
scan_static_bus for PCI: 00:14.0
smbus: PCI: 00:14.0[0]->I2C: 01:50 enabled
smbus: PCI: 00:14.0[0]->I2C: 01:52 enabled
scan_static_bus for PCI: 00:14.0 done
scan_static_bus for PCI: 00:14.3
malloc Enter, size 2560, free_mem_ptr 00290044
malloc 00290044
PNP: 002e.0 disabled
PNP: 002e.1 enabled
PNP: 002e.2 disabled
PNP: 002e.3 disabled
PNP: 002e.4 disabled
PNP: 002e.5 enabled
PNP: 002e.6 enabled
PNP: 002e.7 disabled
PNP: 002e.8 disabled
PNP: 002e.9 disabled
PNP: 002e.a disabled
scan_static_bus for PCI: 00:14.3 done
do_pci_scan_bridge for PCI: 00:14.4
malloc Enter, size 24, free_mem_ptr 00290a44
malloc 00290a44
PCI: pci_scan_bus for bus 01
malloc Enter, size 68, free_mem_ptr 00290a5c
malloc 00290a5c
PCI: 01:04.0 [10ec/8169] enabled
PCI: pci_scan_bus returning with max=001
do_pci_scan_bridge returns max 1
PCI: pci_scan_bus returning with max=001
PCI: pci_scan_bus returning with max=001
PCI_DOMAIN: 0000 passpw: enabled
scan_static_bus for Root Device done
done
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
APIC_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC: 01 missing read_resources
APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1
PCI: 00:14.0 read_resources bus 1 link: 0
I2C: 01:50 missing read_resources
I2C: 01:52 missing read_resources
PCI: 00:14.0 read_resources bus 1 link: 0 done
PCI: 00:14.3 read_resources bus 0 link: 0
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 1 link: 0
PCI: 00:14.4 read_resources bus 1 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1 done
PCI: 00:18.0 read_resources bus 0 link: 2
PCI: 00:18.0 read_resources bus 0 link: 2 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 APIC_CLUSTER: 0
  APIC_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: 01
  PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0
  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:18.0
   PCI: 00:18.0 resource base c00003 size 0 align 0 gran 0 limit cfff10 flags 1 index 101b0
   PCI: 00:18.0 resource base e00003 size 0 align 0 gran 0 limit efff10 flags 1 index 101b8
   PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 10000
   PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 10002
   PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80200 index 10001
    PCI: 00:00.0
    PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 201 index 1c
    PCI: 00:01.0
    PCI: 00:02.0
    PCI: 00:03.0
    PCI: 00:04.0
    PCI: 00:05.0
    PCI: 00:06.0
    PCI: 00:07.0
    PCI: 00:08.0
    PCI: 00:09.0
    PCI: 00:0a.0
    PCI: 00:11.0
    PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
    PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
    PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
    PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
    PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
    PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24
    PCI: 00:12.0
    PCI: 00:12.1
    PCI: 00:12.2
    PCI: 00:13.0
    PCI: 00:13.1
    PCI: 00:13.2
    PCI: 00:14.0 child on link 0 I2C: 01:50
    PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags 80000200 index 74
    PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags 80000100 index 90
     I2C: 01:50
     I2C: 01:52
    PCI: 00:14.1
    PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
    PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
    PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
    PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
    PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
    PCI: 00:14.2
    PCI: 00:14.3 child on link 0 PNP: 002e.0
    PCI: 00:14.3 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 200 index a0
    PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
    PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
    PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
     PNP: 002e.0
     PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
     PNP: 002e.1
     PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.2
     PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.3
     PNP: 002e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
     PNP: 002e.4
     PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
     PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 62
     PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.5
     PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
     PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
     PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.6
     PNP: 002e.6 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.7
     PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 62
     PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 64
     PNP: 002e.8
     PNP: 002e.8 resource base 300 size 2 align 1 gran 1 limit 7ff flags c0000100 index 60
     PNP: 002e.8 resource base 9 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.9
     PNP: 002e.9 resource base 220 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
     PNP: 002e.a
    PCI: 00:14.4 child on link 0 PCI: 01:04.0
    PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
    PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
    PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
     PCI: 01:04.0
     PCI: 01:04.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
     PCI: 01:04.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 14
     PCI: 01:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffff flags 2200 index 30
    PCI: 00:14.5
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 01:04.0 10 *  [0x0 - 0xff] io
PCI: 00:14.4 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:14.4 1c *  [0x0 - 0xfff] io
PCI: 00:11.0 20 *  [0x1000 - 0x100f] io
PCI: 00:14.1 20 *  [0x1010 - 0x101f] io
PCI: 00:11.0 10 *  [0x1020 - 0x1027] io
PCI: 00:11.0 18 *  [0x1028 - 0x102f] io
PCI: 00:14.1 10 *  [0x1030 - 0x1037] io
PCI: 00:14.1 18 *  [0x1038 - 0x103f] io
PCI: 00:11.0 14 *  [0x1040 - 0x1043] io
PCI: 00:11.0 1c *  [0x1044 - 0x1047] io
PCI: 00:14.1 14 *  [0x1048 - 0x104b] io
PCI: 00:14.1 1c *  [0x104c - 0x104f] io
PCI: 00:18.0 compute_resources_io: base: 1050 size: 2000 align: 12 gran: 12 limit: ffff done
PCI: 00:18.0 10000 *  [0x0 - 0x1fff] io
PCI_DOMAIN: 0000 compute_resources_io: base: 2000 size: 2000 align: 12 gran: 0 limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff done
PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:04.0 30 *  [0x0 - 0x7fff] mem
PCI: 01:04.0 14 *  [0x8000 - 0x80ff] mem
PCI: 00:14.4 compute_resources_mem: base: 8100 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:00.0 1c *  [0x0 - 0xfffffff] mem
PCI: 00:14.4 20 *  [0x10000000 - 0x100fffff] mem
PCI: 00:11.0 24 *  [0x10100000 - 0x101003ff] mem
PCI: 00:14.3 a0 *  [0x10100400 - 0x10100400] mem
PCI: 00:18.0 compute_resources_mem: base: 10100401 size: 10200000 align: 28 gran: 20 limit: ffffffff done
PCI: 00:18.0 10001 *  [0x0 - 0x101fffff] mem
PCI: 00:18.3 94 *  [0x14000000 - 0x17ffffff] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 18000000 size: 18000000 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:18.0
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:11.0
constrain_resources: PCI: 00:14.0
constrain_resources: I2C: 01:50
constrain_resources: I2C: 01:52
constrain_resources: PCI: 00:14.1
constrain_resources: PCI: 00:14.3
constrain_resources: PNP: 002e.1
constrain_resources: PNP: 002e.5
constrain_resources: PNP: 002e.6
constrain_resources: PCI: 00:14.4
constrain_resources: PCI: 01:04.0
constrain_resources: PCI: 00:18.1
constrain_resources: PCI: 00:18.2
constrain_resources: PCI: 00:18.3
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000000 limit 0000ffff
        lim->base 00001000 lim->limit 0000ffff
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000100 limit ffffffff
        lim->base 00000000 lim->limit febfffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:2000 align:12 gran:0 limit:ffff
Assigned: PCI: 00:18.0 10000 *  [0x1000 - 0x2fff] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 3000 size: 2000 align: 12 gran: 0 done
PCI: 00:18.0 allocate_resources_io: base:1000 size:2000 align:12 gran:12 limit:ffff
Assigned: PCI: 00:14.4 1c *  [0x1000 - 0x1fff] io
Assigned: PCI: 00:11.0 20 *  [0x2000 - 0x200f] io
Assigned: PCI: 00:14.1 20 *  [0x2010 - 0x201f] io
Assigned: PCI: 00:11.0 10 *  [0x2020 - 0x2027] io
Assigned: PCI: 00:11.0 18 *  [0x2028 - 0x202f] io
Assigned: PCI: 00:14.1 10 *  [0x2030 - 0x2037] io
Assigned: PCI: 00:14.1 18 *  [0x2038 - 0x203f] io
Assigned: PCI: 00:11.0 14 *  [0x2040 - 0x2043] io
Assigned: PCI: 00:11.0 1c *  [0x2044 - 0x2047] io
Assigned: PCI: 00:14.1 14 *  [0x2048 - 0x204b] io
Assigned: PCI: 00:14.1 1c *  [0x204c - 0x204f] io
PCI: 00:18.0 allocate_resources_io: next_base: 2050 size: 2000 align: 12 gran: 12 done
PCI: 00:14.4 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
Assigned: PCI: 01:04.0 10 *  [0x1000 - 0x10ff] io
PCI: 00:14.4 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:18000000 align:28 gran:0 limit:febfffff
Assigned: PCI: 00:18.0 10001 *  [0xe0000000 - 0xf01fffff] mem
Assigned: PCI: 00:18.3 94 *  [0xf4000000 - 0xf7ffffff] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f8000000 size: 18000000 align: 28 gran: 0 done
PCI: 00:18.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:18.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:14.4 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:18.0 allocate_resources_mem: base:e0000000 size:10200000 align:28 gran:20 limit:febfffff
Assigned: PCI: 00:00.0 1c *  [0xe0000000 - 0xefffffff] mem
Assigned: PCI: 00:14.4 20 *  [0xf0000000 - 0xf00fffff] mem
Assigned: PCI: 00:11.0 24 *  [0xf0100000 - 0xf01003ff] mem
Assigned: PCI: 00:14.3 a0 *  [0xf0100400 - 0xf0100400] mem
PCI: 00:18.0 allocate_resources_mem: next_base: f0100401 size: 10200000 align: 28 gran: 20 done
PCI: 00:14.4 allocate_resources_mem: base:f0000000 size:100000 align:20 gran:20 limit:febfffff
Assigned: PCI: 01:04.0 30 *  [0xf0000000 - 0xf0007fff] mem
Assigned: PCI: 01:04.0 14 *  [0xf0008000 - 0xf00080ff] mem
PCI: 00:14.4 allocate_resources_mem: next_base: f0008100 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
node 0 : uma_memory_base/1024=0x001c0000, mmio_basek=0x00380000, basek=0x00000300, limitk=0x00200000
node 0: UMA memory starts below mmio_basek
0: mmio_basek=00380000, basek=00000300, limitk=00200000
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:18.0 101d8 <- [0x0000001000 - 0x0000002fff] size 0x00002000 gran 0x0c io <node 0 link 1>
PCI: 00:18.0 101b0 <- [0x00e0000000 - 0x00f01fffff] size 0x10200000 gran 0x14 mem <node 0 link 1>
PCI: 00:18.0 assign_resources, bus 0 link: 1
PCI: 00:00.0 1c <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c mem64
PCI: 00:11.0 10 <- [0x0000002020 - 0x0000002027] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000002040 - 0x0000002043] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000002028 - 0x000000202f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000002044 - 0x0000002047] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000002000 - 0x000000200f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f0100000 - 0x00f01003ff] size 0x00000400 gran 0x0a mem
ERROR: PCI: 00:14.0 74 mem size: 0x0000001000 not assigned
ERROR: PCI: 00:14.0 90 io size: 0x0000000010 not assigned
PCI: 00:14.0 assign_resources, bus 1 link: 0
PCI: 00:14.0 assign_resources, bus 1 link: 0
PCI: 00:14.1 10 <- [0x0000002030 - 0x0000002037] size 0x00000008 gran 0x03 io
PCI: 00:14.1 14 <- [0x0000002048 - 0x000000204b] size 0x00000004 gran 0x02 io
PCI: 00:14.1 18 <- [0x0000002038 - 0x000000203f] size 0x00000008 gran 0x03 io
PCI: 00:14.1 1c <- [0x000000204c - 0x000000204f] size 0x00000004 gran 0x02 io
PCI: 00:14.1 20 <- [0x0000002010 - 0x000000201f] size 0x00000010 gran 0x04 io
PCI: 00:14.3 a0 <- [0x00f0100400 - 0x00f0100400] size 0x00000001 gran 0x00 mem
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.6 70 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
PCI: 00:14.3 assign_resources, bus 0 link: 0
PCI: 00:14.4 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:14.4 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:14.4 20 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:14.4 assign_resources, bus 1 link: 0
PCI: 01:04.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 01:04.0 14 <- [0x00f0008000 - 0x00f00080ff] size 0x00000100 gran 0x08 mem
PCI: 01:04.0 30 <- [0x00f0000000 - 0x00f0007fff] size 0x00008000 gran 0x0f romem
PCI: 00:14.4 assign_resources, bus 1 link: 0
PCI: 00:18.0 assign_resources, bus 0 link: 1
PCI: 00:18.3 94 <- [0x00f4000000 - 0x00f7ffffff] size 0x04000000 gran 0x1a mem <gart>
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 APIC_CLUSTER: 0
  APIC_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: 01
  PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0
  PCI_DOMAIN: 0000 resource base 1000 size 2000 align 12 gran 0 limit ffff flags 40040100 index 10000000
  PCI_DOMAIN: 0000 resource base e0000000 size 18000000 align 28 gran 0 limit febfffff flags 40040200 index 10000100
  PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
  PCI_DOMAIN: 0000 resource base c0000 size 7ff40000 align 0 gran 0 limit 0 flags e0004200 index 20
   PCI: 00:18.0
   PCI: 00:18.0 resource base e00003 size 0 align 0 gran 0 limit efff10 flags 1 index 101b8
   PCI: 00:18.0 resource base 1000 size 2000 align 12 gran 12 limit ffff flags 60080100 index 101d8
   PCI: 00:18.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 40081200 index 10002
   PCI: 00:18.0 resource base e0000000 size 10200000 align 28 gran 20 limit febfffff flags 60080200 index 101b0
    PCI: 00:00.0
    PCI: 00:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit febfffff flags 60000201 index 1c
    PCI: 00:01.0
    PCI: 00:02.0
    PCI: 00:03.0
    PCI: 00:04.0
    PCI: 00:05.0
    PCI: 00:06.0
    PCI: 00:07.0
    PCI: 00:08.0
    PCI: 00:09.0
    PCI: 00:0a.0
    PCI: 00:11.0
    PCI: 00:11.0 resource base 2020 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
    PCI: 00:11.0 resource base 2040 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
    PCI: 00:11.0 resource base 2028 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
    PCI: 00:11.0 resource base 2044 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
    PCI: 00:11.0 resource base 2000 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
    PCI: 00:11.0 resource base f0100000 size 400 align 10 gran 10 limit febfffff flags 60000200 index 24
    PCI: 00:12.0
    PCI: 00:12.1
    PCI: 00:12.2
    PCI: 00:13.0
    PCI: 00:13.1
    PCI: 00:13.2
    PCI: 00:14.0 child on link 0 I2C: 01:50
    PCI: 00:14.0 resource base fec00000 size 1000 align 8 gran 8 limit ffffffff flags 80000200 index 74
    PCI: 00:14.0 resource base b00 size 10 align 8 gran 8 limit ffff flags 80000100 index 90
     I2C: 01:50
     I2C: 01:52
    PCI: 00:14.1
    PCI: 00:14.1 resource base 2030 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
    PCI: 00:14.1 resource base 2048 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
    PCI: 00:14.1 resource base 2038 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
    PCI: 00:14.1 resource base 204c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
    PCI: 00:14.1 resource base 2010 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
    PCI: 00:14.2
    PCI: 00:14.3 child on link 0 PNP: 002e.0
    PCI: 00:14.3 resource base f0100400 size 1 align 0 gran 0 limit febfffff flags 60000200 index a0
    PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
    PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
    PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
     PNP: 002e.0
     PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
     PNP: 002e.1
     PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
     PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.2
     PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.3
     PNP: 002e.3 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
     PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
     PNP: 002e.4
     PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
     PNP: 002e.4 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 62
     PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
     PNP: 002e.5
     PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
     PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
     PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.6
     PNP: 002e.6 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 70
     PNP: 002e.7
     PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 62
     PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 64
     PNP: 002e.8
     PNP: 002e.8 resource base 300 size 2 align 1 gran 1 limit 7ff flags c0000100 index 60
     PNP: 002e.8 resource base 9 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
     PNP: 002e.9
     PNP: 002e.9 resource base 220 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
     PNP: 002e.a
    PCI: 00:14.4 child on link 0 PCI: 01:04.0
    PCI: 00:14.4 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
    PCI: 00:14.4 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
    PCI: 00:14.4 resource base f0000000 size 100000 align 20 gran 20 limit febfffff flags 60080202 index 20
     PCI: 01:04.0
     PCI: 01:04.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
     PCI: 01:04.0 resource base f0008000 size 100 align 8 gran 8 limit febfffff flags 60000200 index 14
     PCI: 01:04.0 resource base f0000000 size 8000 align 15 gran 15 limit febfffff flags 60002200 index 30
    PCI: 00:14.5
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.3 resource base f4000000 size 4000000 align 26 gran 26 limit febfffff flags 60000200 index 94
Done allocating resources.
Enabling resources...
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 4e43/6000
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 4e43/6000
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 cmd <- 00
PCI: 00:00.0 subsystem <- 4e43/6000
PCI: 00:00.0 cmd <- 06
PCI: 00:11.0 cmd <- 03
PCI: 00:14.0 subsystem <- 4e43/6000
PCI: 00:14.0 cmd <- 403
PCI: 00:14.1 subsystem <- 4e43/6000
PCI: 00:14.1 cmd <- 01
PCI: 00:14.3 subsystem <- 4e43/6000
PCI: 00:14.3 cmd <- 0f
sb700 lpc decode:PNP: 002e.1, base=0x000003f8, end=0x000003ff
sb700 lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060
sb700 lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 cmd <- 07
PCI: 01:04.0 cmd <- 03
done.
Initializing devices...
APIC_CLUSTER: 0 init
start_eip=0x00001000, offset=0x00210000, code_size=0x0000005b
Initializing CPU #0
CPU: vendor AMD device 40f13
CPU: family 0f, model 41, stepping 03
Enabling cache

Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base:    0MB, range: 2048MB, type WB
ADDRESS_MASK_HIGH=0xff
Setting variable MTRR 1, base: 2048MB, range:  256MB, type WB
ADDRESS_MASK_HIGH=0xff
Setting variable MTRR 2, base: 1792MB, range:  256MB, type UC
ADDRESS_MASK_HIGH=0xff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

CPU model Dual-Core AMD Opteron(tm) Processor 2210 EE
Setting up local apic... apic_id: 0x00 done.
Clearing memory 32768K - 2097152K: ------------------------------- done
CPU #0 initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor AMD device 40f13
CPU: family 0f, model 41, stepping 03
Enabling cache

Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base:    0MB, range: 2048MB, type WB
ADDRESS_MASK_HIGH=0xff
Setting variable MTRR 1, base: 2048MB, range:  256MB, type WB
ADDRESS_MASK_HIGH=0xff
Setting variable MTRR 2, base: 1792MB, range:  256MB, type UC
ADDRESS_MASK_HIGH=0xff
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

CPU model Dual-Core AMD Opteron(tm) Processor 2210 EE
Setting up local apic... apic_id: 0x01 done.
CPU #1 initialized
All AP CPUs stopped
PCI: 00:18.0 init
PCI: 00:18.1 init
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + e2fc + align -> fff8e340
Check fallback/payload
CBFS: follow chain: fff8e340 + 38 + 7e83 + align -> fff96200
Check 
CBFS: follow chain: fff96200 + 28 + 59db8 + align -> ffff0000
CBFS:  Could not find file pci1022,1101.rom
PCI: 00:18.2 init
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + e2fc + align -> fff8e340
Check fallback/payload
CBFS: follow chain: fff8e340 + 38 + 7e83 + align -> fff96200
Check 
CBFS: follow chain: fff96200 + 28 + 59db8 + align -> ffff0000
CBFS:  Could not find file pci1022,1102.rom
PCI: 00:18.3 init
NB: Function 3 Misc Control.. done.
PCI: 00:00.0 init
pcie_init in rs780_ht.c
PCI: 00:11.0 init
sata_bar0=2020
sata_bar1=2040
sata_bar2=2028
sata_bar3=2044
sata_bar4=2000
sata_bar5=f0100000
SATA port 0 status = 23
drive detection done after 0 ms
Primary Master device is ready after 1 tries
SATA port 1 status = 0
No Primary Slave SATA drive on Slot1
SATA port 2 status = 0
No Secondary Master SATA drive on Slot2
SATA port 3 status = 0
No Secondary Slave SATA drive on Slot3
PCI: 00:14.0 init
sm_init().
IOAPIC: Clearing IOAPIC at 0xfec00000
IOAPIC: 23 interrupts
IOAPIC: reg 0x00000000 value 0x00000000 0x00010000
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
set power on after power fail
++++++++++no set NMI+++++
RTC Init
sm_init() end
PCI: 00:14.1 init
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + e2fc + align -> fff8e340
Check fallback/payload
CBFS: follow chain: fff8e340 + 38 + 7e83 + align -> fff96200
Check 
CBFS: follow chain: fff96200 + 28 + 59db8 + align -> ffff0000
CBFS:  Could not find file pci1002,439c.rom
PCI: 00:14.3 init
PCI: 00:14.4 init
PNP: 002e.1 init
PNP: 002e.5 init
Keyboard init...
No PS/2 keyboard detected.
PNP: 002e.6 init
PCI: 01:04.0 init
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + e2fc + align -> fff8e340
Check fallback/payload
CBFS: follow chain: fff8e340 + 38 + 7e83 + align -> fff96200
Check 
CBFS: follow chain: fff96200 + 28 + 59db8 + align -> ffff0000
CBFS:  Could not find file pci10ec,8169.rom
On card, rom address for PCI: 01:04.0 = f0000000
PCI Expansion ROM, signature 0xfff0, INIT size 0x1fe00, data ptr 0xfff0
Incorrect Expansion ROM Header Signature fff0
Devices initialized
Show all devs...After init.
Root Device: enabled 1
APIC_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 0
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 0
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:09.0: enabled 0
PCI: 00:0a.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 0
PCI: 00:12.1: enabled 0
PCI: 00:12.2: enabled 0
PCI: 00:13.0: enabled 0
PCI: 00:13.1: enabled 0
PCI: 00:13.2: enabled 0
PCI: 00:14.0: enabled 1
I2C: 01:50: enabled 1
I2C: 01:52: enabled 1
PCI: 00:14.1: enabled 1
PCI: 00:14.2: enabled 0
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 0
PNP: 002e.3: enabled 0
PNP: 002e.4: enabled 0
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 1
PNP: 002e.7: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.9: enabled 0
PNP: 002e.a: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
APIC: 01: enabled 1
PCI: 01:04.0: enabled 1
Initializing CBMEM area to 0x6fff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 6fff0200...ok
High Tables Base is 6fff0000.
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Adding CBMEM entry as no. 2
Writing IRQ routing tables to 0x6fff0400...write_pirq_routing_table done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 000f0410 - 000f054c
Adding CBMEM entry as no. 3
Wrote the mp table end at: 6fff1410 - 6fff154c
MP table: 332 bytes.
Adding CBMEM entry as no. 4
ACPI: Writing ACPI tables at 6fff2400...
ACPI:    * HPET
ACPI: added table 1/32 Length now 40
ACPI:    * MADT
ACPI: added table 2/32 Length now 44
ACPI:    * SSDT
processor_brand=Dual-Core AMD Opteron(tm) Processor 2210 EE
Pstates Algorithm ...
No intermediate P-states are supported
ACPI: added table 3/32 Length now 48
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * DSDT @ 6fff27c2 Length 298c
ACPI:    * FADT
pm_base: 0x0800
ACPI: added table 4/32 Length now 52
ACPI: done.
ACPI tables: 11842 bytes.
Multiboot Information structure has been written.
Adding CBMEM entry as no. 5
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518  checksum afde
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x6fffe000
rom_table_end = 0x6fffe000
Adjust low_table_end from 0x00000518 to 0x00001000 
Adjust rom_table_end from 0x6fffe000 to 0x70000000 
Adding high table area
uma_memory_start=0x70000000, uma_memory_size=0x10000000 
coreboot memory table:
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-000000006ffeffff: RAM
 3. 000000006fff0000-000000006fffffff: CONFIGURATION TABLES
 4. 0000000070000000-000000007fffffff: RESERVED
Wrote coreboot table at: 6fffe000 - 6fffe1b4  checksum 268e
coreboot table: 436 bytes.
 0. FREE SPACE 70000000 00000000
 1. GDT        6fff0200 00000200
 2. IRQ TABLE  6fff0400 00001000
 3. SMP TABLE  6fff1400 00001000
 4. ACPI       6fff2400 0000bc00
 5. COREBOOT   6fffe000 00002000
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + e2fc + align -> fff8e340
Check fallback/payload
Got a payload
Loading segment from rom address 0xfff8e378
  parameter section (skipped)
Loading segment from rom address 0xfff8e394
  data (compression=1)
malloc Enter, size 36, free_mem_ptr 00290aa0
malloc 00290aa0
  New segment dstaddr 0x100000 memsize 0x133b40 srcaddr 0xfff8e416 filesize 0x7db8
  (cleaned up) New segment addr 0x100000 size 0x133b40 offset 0xfff8e416 filesize 0x7db8
Loading segment from rom address 0xfff8e3b0
  data (compression=1)
malloc Enter, size 36, free_mem_ptr 00290ac4
malloc 00290ac4
  New segment dstaddr 0x233b40 memsize 0x48 srcaddr 0xfff961ce filesize 0x2d
  (cleaned up) New segment addr 0x233b40 size 0x48 offset 0xfff961ce filesize 0x2d
Loading segment from rom address 0xfff8e3cc
  Entry Point 0x00100000
Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000133b40 filesz: 0x0000000000007db8
lb: [0x0000000000200000, 0x0000000000350000)
segment: [0x0000000000100000, 0x0000000000107db8, 0x0000000000233b40)
 bounce: [0x000000006fc50000, 0x000000006fc57db8, 0x000000006fd83b40)
Post relocation: addr: 0x000000006fc50000 memsz: 0x0000000000133b40 filesz: 0x0000000000007db8
using LZMA
[ 0x6fc50000, 6fc61b24, 0x6fd83b40) <- fff8e416
Clearing Segment: addr: 0x000000006fc61b24 memsz: 0x000000000012201c
dest 6fc50000, end 6fd83b40, bouncebuffer 6fd50000
move prefix around: from 6fc50000, to 00100000, amount: 100000
Loading Segment: addr: 0x0000000000233b40 memsz: 0x0000000000000048 filesz: 0x000000000000002d
lb: [0x0000000000200000, 0x0000000000350000)
segment: [0x0000000000233b40, 0x0000000000233b6d, 0x0000000000233b88)
 bounce: [0x000000006fd83b40, 0x000000006fd83b6d, 0x000000006fd83b88)
Post relocation: addr: 0x000000006fd83b40 memsz: 0x0000000000000048 filesz: 0x000000000000002d
using LZMA
[ 0x6fd83b40, 6fd83b88, 0x6fd83b88) <- fff961ce
dest 6fd83b40, end 6fd83b88, bouncebuffer 6fd50000
Loaded segments
Jumping to boot code at 100000
entry    = 0x00100000
lb_start = 0x00200000
lb_size  = 0x00150000
adjust   = 0x6fca0000
buffer   = 0x6fd50000
     elf_boot_notes = 0x0021b298
adjusted_boot_notes = 0x6febb298
FILO version 0.6.0 (liutao at eda7) Tue Sep  7 16:14:09 CST 2010
boot EAX = 0x2badb002
boot EBX = 0xf0830
boot arg = 0xf0830
Press <Enter> for default boot, or <Esc> for boot prompt... timed out
boot: hda2:/vmlinuz initrd=hda2:/initrd console=ttyS0,115200
IDE time out
reset failed, but slave may exist
hda: LBA48 320GB: Hitachi HTS543232L9A300                 
Not a bootable ELF image: hda2:/vmlinuz
Found Linux version 2.6.27.19-5-default (geeko at buildhost) #1 SMP Wed Sep 8 11:36:24 EDT 2010 (protocol 0x209) (loadflags 0x1) bzImage.
Setting up paramters at 0x90000
%016Lx - %016Lx (0)
%016Lx - %016Lx (4096)
%016Lx - %016Lx (786432)
%016Lx - %016Lx (1878982656)
%016Lx - %016Lx (1879048192)
ramtop=0x80000000
ext_mem_k=64512, alt_mem_k=2096128
original command line: "initrd=hda2:/initrd console=ttyS0,115200"
kernel command line at 0x91000
debug, name = initrd, len = 6
initrd=hda2:/initrd
debug, name = console, len = 7
kernel command line (20 bytes): "console=ttyS0,115200"
offset=0x3200 addr=0x100000 size=0x262be0
Loading kernel... ok
debug, initrd_file set to: hda2:/initrdstart=0x6f8e8000 end=0x6febbaf5
Loading initrd... ok
EIP=0x100000
Jumping to entry point...
Initializing cgroup subsys cpuset
Initializing cgroup subsys cpu
Linux version 2.6.27.19-5-default (geeko at buildhost) (gcc version 4.3.2 [gcc-4_3-branch revision 141291] (SUSE Linux) ) #1 SMP Wed Sep 8 11:36:24 EDT 2010
Command line: console=ttyS0,115200
KERNEL supported cpus:
  Intel GenuineIntel
  AMD AuthenticAMD
  Centaur CentaurHauls
BIOS-provided physical RAM map:
 BIOS-e820: 0000000000000000 - 0000000000001000 type 16
 BIOS-e820: 0000000000001000 - 00000000000a0000 (usable)
 BIOS-e820: 00000000000c0000 - 000000006fff0000 (usable)
 BIOS-e820: 000000006fff0000 - 0000000070000000 type 16
 BIOS-e820: 0000000070000000 - 0000000080000000 (reserved)
DMI not present or invalid.
last_pfn = 0x6fff0 max_arch_pfn = 0x3ffffffff
x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106
init_memory_mapping
last_map_addr: 6fff0000 end: 6fff0000
RAMDISK: 6f8e8000 - 6febbaf5
ACPI: RSDP 000F0800, 0014 (r0 CORE  )
ACPI: RSDT 6FFF2424, 0034 (r1 CORE   COREBOOT        0 CORE        0)
ACPI: HPET 6FFF24C8, 0038 (r1 CORE   COREBOOT        0 CORE        0)
ACPI: APIC 6FFF2500, 005C (r1 CORE   COREBOOT        0 CORE        0)
ACPI: SSDT 6FFF255C, 0226 (r2 CORE   DYNADATA       2A CORE       2A)
ACPI: FACP 6FFF514E, 00F4 (r1 CORE   COREBOOT        0 CORE        0)
ACPI: DSDT 6FFF27C2, 298C (r2 NCIC   X6000       10001 INTL 20090123)
ACPI: FACS 6FFF2782, 0040
Scanning NUMA topology in Northbridge 24
No NUMA configuration found
Faking a node at 0000000000000000-000000006fff0000
Bootmem setup node 0 0000000000000000-000000006fff0000
  NODE_DATA [000000000000a000 - 0000000000021fff]
  bootmap [0000000000022000 -  000000000002ffff] pages e
(6 early reservations) ==> bootmem [0000000000 - 006fff0000]
  #0 [0000000000 - 0000001000]   BIOS data page ==> [0000000000 - 0000001000]
  #1 [0000006000 - 0000008000]       TRAMPOLINE ==> [0000006000 - 0000008000]
  #2 [0000200000 - 0000bb78b8]    TEXT DATA BSS ==> [0000200000 - 0000bb78b8]
  #3 [006f8e8000 - 006febbaf5]          RAMDISK ==> [006f8e8000 - 006febbaf5]
  #4 [000009f000 - 0000100000]    BIOS reserved ==> [000009f000 - 0000100000]
  #5 [0000008000 - 000000a000]          PGTABLE ==> [0000008000 - 000000a000]
found SMP MP-table at [ffff8800000f0400] 000f0400
Zone PFN ranges:
  DMA      0x00000001 -> 0x00001000
  DMA32    0x00001000 -> 0x00100000
  Normal   0x00100000 -> 0x00100000
Movable zone start PFN for each node
early_node_map[2] active PFN ranges
    0: 0x00000001 -> 0x000000a0
    0: 0x000000c0 -> 0x0006fff0
ACPI: PM-Timer IO Port: 0x818
ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled)
ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled)
ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
IOAPIC[0]: apic_id 2, version 0, address 0xfec00000, GSI 0-23
ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
ACPI: HPET id: 0x102282a0 base: 0xfed00000
Using ACPI (MADT) for SMP configuration information
SMP: Allowing 2 CPUs, 0 hotplug CPUs
PM: Registered nosave memory: 00000000000a0000 - 00000000000c0000
Allocating PCI resources starting at 88000000 (gap: 80000000:80000000)
PERCPU: Allocating 61344 bytes of per cpu data
Built 1 zonelists in Node order, mobility grouping on.  Total pages: 448944
Policy zone: DMA32
Kernel command line: console=ttyS0,115200
Initializing CPU#0
PID hash table entries: 4096 (order: 12, 32768 bytes)
TSC: PIT calibration confirmed by PMTIMER.
TSC: using PIT calibration value
Detected 1002.539 MHz processor.
Console: colour dummy device 80x25
console [ttyS0] enabled
Checking aperture...
No AGP bridge found
Node 0: aperture @ f4000000 size 64 MB
Memory: 1789456k/1834944k available (2686k kernel code, 45356k reserved, 3105k data, 788k init)
HPET config register value = 0xFFFFFFFF. Disabling HPET
Calibrating delay loop (skipped), value calculated using timer frequency.. 2005.07 BogoMIPS (lpj=4010156)
kdb version 4.4 by Keith Owens, Scott Lurndal. Copyright SGI, All Rights Reserved
kdb_cmd[0]: defcmd archkdb "" "First line arch debugging"
kdb_cmd[7]: defcmd archkdbcpu "" "archkdb with only tasks on cpus"
kdb_cmd[14]: defcmd archkdbshort "" "archkdb with less detailed backtrace"
kdb_cmd[21]: defcmd archkdbcommon "" "Common arch debugging"
Security Framework initialized
AppArmor: AppArmor initialized
Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)
Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)
Mount-cache hash table entries: 256
Initializing cgroup subsys ns
Initializing cgroup subsys cpuacct
Initializing cgroup subsys memory
Initializing cgroup subsys devices
Initializing cgroup subsys freezer
CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
CPU: L2 Cache: 1024K (64 bytes/line)
CPU 0/0 -> Node 0
CPU: Physical Processor ID: 0
CPU: Processor Core ID: 0
using C1E aware idle routine
ACPI: Core revision 20080609
ACPI: Checking initramfs for custom DSDT
Parsing all Control Methods:
Table [DSDT](id 0001) - 540 Objects with 51 Devices 123 Methods 14 Regions
ACPI Error (dswload-0334): [\_PR_.CPU0] Namespace lookup failure, AE_ALREADY_EXISTS
ACPI Exception (psloop-0226): AE_ALREADY_EXISTS, During name lookup/catalog [20080609]
 tbxface-0596 [00] tb_load_namespace     : ACPI Tables successfully acquired
evxfevnt-0079 [00] enable                : System is already in ACPI mode
Setting APIC routing to flat
..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
CPU0: Dual-Core AMD Opteron(tm) Processor 2210 EE stepping 03
Using local APIC timer interrupts.
Detected 12.531 MHz APIC timer.

HARDWARE ERROR
CPU 0: Machine Check Exception:                4 Bank 0: f647200000000833
TSC 56a8442e5 ADDR 6000 
This is not a software problem!
Run through mcelog --ascii to decode and contact your hardware vendor
Kernel panic - not syncing: Machine check
------------[ cut here ]------------
WARNING: at kernel/smp.c:331 smp_call_function_mask+0x32/0x1ec()
Modules linked in:
Supported: Yes
Pid: 1, comm: swapper Tainted: G   M      2.6.27.19-5-default #1

Call Trace:
 [<ffffffff8020d9f9>] show_trace_log_lvl+0x41/0x58
 [<ffffffff80496a74>] dump_stack+0x69/0x6f
 [<ffffffff8023bfba>] warn_on_slowpath+0x51/0x77
 [<ffffffff8025b1c5>] smp_call_function_mask+0x32/0x1ec
 [<ffffffff8025b3a8>] smp_call_function+0x29/0x2e
 [<ffffffff8021a04a>] native_smp_send_stop+0x1a/0x26
 [<ffffffff80496b36>] panic+0xbc/0x169
 [<ffffffff80216366>] mce_log+0x0/0x7e
 [<ffffffff80216740>] do_machine_check+0x31e/0x3cd
 [<ffffffff8020d27f>] machine_check+0x7f/0x90
 [<ffffffff802126c8>] setup_trampoline+0x20/0x30
 [<ffffffff804919a5>] native_cpu_up+0x31e/0xc64
 [<ffffffff80493d17>] _cpu_up+0x9a/0x11c
 [<ffffffff80493df4>] cpu_up+0x5b/0x6f
 [<ffffffff8095b708>] kernel_init+0xe1/0x1eb
 [<ffffffff8020cf49>] child_rip+0xa/0x11

---[ end trace 4eaa2a86a8e2da22 ]---


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