[coreboot] I865 memory controller status

[James Wall]

On Tue, Apr 5, 2011 at 11:38 AM, Joseph Smith <joe at settoplinux.org> wrote:

> On 04/05/2011 12:25 PM, Corey Osgood wrote:
>
>> On Tue, Apr 5, 2011 at 10:38 AM, James Wall<scouter389 at gmail.com>  wrote:
>>
>>>
>>> On Apr 5, 2011 9:02 AM, "Idwer Vollering"<vidwer at gmail.com>  wrote:
>>>
>>>>
>>>> 2011/4/5 James Wall<scouter389 at gmail.com>:
>>>>
>>>>> Hello all,
>>>>> What is the status of the i865 memory controller?
>>>>>
>>>>
>>>> That chipset as a whole is (currently) unsupported, however plans to
>>>> support it are there.
>>>> RAM init is work in progress, another developer and I have a total of
>>>> three i865 boards. Since RAM init is the hardest part, and we don't
>>>> work on it full time, support can be expected anything but soon.
>>>>
>>>> All I have at this moment is nonworking code, it dies/stops in the
>>>> beginning of RAM init. I expect to be working on this somewhat more
>>>> frequent/intensive in two or three weeks.
>>>>
>>>> Idwer
>>>>
>>>
>>> I am willing to test but I have very little coding knowledge, mostly bash
>>> scripts and hello world c programming skills.
>>>
>>
>> Well most of coreboot coding is pci_write_configX(whatever the
>> datasheet tells you). The hard part is figuring out all the stuff the
>> datasheet doesn't tell you :(
>>
>>  Yeah and Intel is great at only giving you half the picture ;-)
>
> --
> Thanks,
> Joseph Smith
> Set-Top-Linux
> www.settoplinux.org
>
I will look at the source code then for more ideas and to help understand
the code then. thanks for the information.
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