[coreboot] VIA EPIA V5000 Problems

[Andreas Franz]

Hello,

I am trying to use Coreboot + Filo + Debian Linux on the VIA EPIA V5000 board.

I had no problems compiling and flashing coreboot, but running into
trouble when booting.
The serial console states the following and than simply stops:

vt8601 init starting
00000000 is the north
1106 0601
0120d4 is the computed timing
NOP
PRECHARGE
DUMMY READS
CBR
MRS
NORMAL
set ref. rate
enable multi-page open
Slot 00 is SDRAM 08000000 bytes x2
000c is the MA type
Slot 01 is empty
Slot 02 is empty
Slot 03 is empty
vt8601 done
Loading image.
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check cmos_layout.bin
CBFS: follow chain: fffc0000 + 28 + 487 + align -> fffc04c0
Check pci1106,3230.rom
CBFS: follow chain: fffc04c0 + 38 + 10000 + align -> fffd0500
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x100000 (114688 bytes), entry @ 0x100000


I guess ist has something to do with RAM-init?

Any help/hint is appreciated.

Thanks

Andreas Franz