[coreboot] Modifying Coreboot to support a new processor
corey.osgood at gmail.com
Thu Aug 11 04:13:33 CEST 2011
On Wed, Aug 10, 2011 at 6:51 PM, Stefan Reinauer <
stefan.reinauer at coreboot.org> wrote:
> * Dsouza, Malcolm <malcolm.dsouza at igatepatni.com> [110809 14:40]:
> > Thanks Corey,
> > 1. I agree that before reading through the code, it is better to first
> > if the BIOS guides are available. However I would still like the
> answer to
> > my question if I wish to carry on with the investigation for now.
> > 2. I am trying to work out an overview of the changes required for a
> start; a
> > bird’s eye view of what the changes could turn out to be. What is the
> > approach for this?
> You will have to write "drivers" for all your components.
> * Northbridge (integrated into CPU these days)
> * Southbridge
> * CPU
> * Super I/O / Embedded Controllers / Management Engine
> * ...
> Starting a new chipset port for a chipset of that complexity is probably
> going to be 6 months to a year of work
I also seem to remember something about the iX CPUs having a different bus
setup for the multiple northbridges, but I don't remember the specifics, and
never looked into what changes might be needed to coreboot.
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