[coreboot] New patch to review: 5c1e354 AMD SB800 southbridge update

perh52 at runbox.com perh52 at runbox.com
Thu Aug 18 14:02:39 CEST 2011

Kerry, thank you for picking up my patch. I will not be contributing
via gerrit for a number of reasons.

> commit 5c1e35472b33b04ff018f500fd719d4b2474be5d
> Author: Kerry She <shekairui at gmail.com>
> Date:   Thu Aug 18 18:44:00 2011 +0800
>     AMD SB800 southbridge update

It would help a lot if the short commit message were more descriptive
of the particular patch. Also I would like see coreboot adopt the widespread
Linux-style format "subsection: description".

How about this:
"sb800: Enable superio hardware monitor access in LPC device"

>     This patch enables access to the registers of the hardware monitor
>     logical device in the superio via isa ports 0x295/0x296.
>     Previously this was not enabled in the SB8xx LPC device.
>     This is required for initialisation in init_hwm() in
>     src/superio/winbond/w83627hf/superio.c and also by OS-level
>     sensor monitoring such as lm-sensors to access temperature,
>     fan monitoring and control and voltage registers.
>    asrock/e350m1 and advansus/a785e-i mainboard changes are included herein.
>     Change-Id: I2176885549277b335c0c41b48457d09b9b76b703
>     Signed-off-by: Per Hansen <perh52 at runbox.com>
>     Signed-off-by: Kerry She <shekairui at gmail.com>


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