[coreboot] SPI flashing

Andrew Goodbody andrew.goodbody at tadpole.com
Thu Jul 7 11:35:53 CEST 2011


Andrew Morgan wrote:
> On 06/07/11 12:23, Andreas Galauner wrote:
>> Also the pinout is kind of "weird":
>> 1    #CS
>> 2    #CS
>> 3    SI
>> 4    NC
>> 5    SO
>> 6    VCC
>> 7    SCK
>> 8    GND
>>
>> Why is CS# connected to two pins? The resistance between those two pins
>> is 1 Ohm, so they are connected directly. Interestingly the are
>> connected through a 0 Ohm resistor. Any ideas on that?
> 
> I don't know the answer, I'm just having a guess here.
> It could be that one of the #CS pins is connected to the flash chip, and 
> the other is connected to the SPI controller (or whatever you call the 
> thing an SPI flash chip is connected to on a computer motherboard). If 
> that were the case then if the 0Ω link wasn't there you would be able to 
> connect an SPI chip and a switch to that port. The switch would either 
> short pins 1 and 2, to select the internal flash chip, or would connect 
> whichever #CS pin is connected to the SPI controller to the #CS pin on 
> the external SPI flash chip in order to select that chip instead.
> 
> Does that sound like a possibility?

Very likely. Also I would expect that #4 NC is not NC at all, it just 
does not go to the SPI device. It could very well be some way to allow 
safe programming of the onboard SPI device such as by putting the board 
into reset.

Andrew




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