[coreboot] [RFC] Universal panic-room serial console, for x86 BIOS bootblock

[Tadas Slotkus]

> But part of the reason I posted is also to find out what the current 
> coreboot plans with regards to the panic-room implementation are, 
> especially as there is a GSoC project for it. Has the set of feature, 
> and how they should be implemented, already been agreed on, or is it 
> still open for discussion?

Hi Pete,

currently my plan is to run flashrom out of cache (in romstage),
transfer rom image over console (serial, maybe later ne2k) in small
chunks like ~256 bytes so that cache_as_ram.inc would require less
changes. Haven't thought about usb debugport, since even this is quite
hard task for me.

Thanks,
Tadas