[coreboot] ASRock e350m1 problems

[Tadas Slotkus]

> It seems like it might not be able to read SPD at all. It is possible
> your DIMM has SMBus signaling difficulty when run at 400 KHz. You could
> try running the SMBus at the default frequency (93750 KHz) by removing
> the last statement in function setupFch in file dimmSpd.c:
> 
> static void setupFch (int ioBase)
>    {
>    writePmReg (0x2D, ioBase >> 8);
>    writePmReg (0x2C, ioBase | 1);
>    writePmReg (0x29, 0x80);
>    writePmReg (0x28, 0x61);
>    __outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to
> 400 KHz
>    }
> 
> If that doesn't solve the problem, I would add some code to log each SPD
> byte as it is read.
> 
> Thanks,
> Scott

Hi, nope, still the same errors in output log. I will try logging SPD
byte reads when I have more time.

Thanks,
Tadas