[coreboot] Patch set updated for coreboot: 222716b compile code for CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
Florian Zumbiehl
gerrit at coreboot.org
Wed Nov 2 09:58:32 CET 2011
Florian Zumbiehl just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/374
-gerrit
commit 222716b03e7f0eb2f09929c5860e7d45e749f73c
Author: Florian Zumbiehl <florz at florz.de>
Date: Tue Nov 1 20:17:41 2011 +0100
compile code for CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
make code dependent on CONFIG_SOUTHBRIDGE_VIA_K8T800 also be included
for CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
Change-Id: I9f4624d08de2790fb513a88ed6207e28e7fbc733
Signed-off-by: Florian Zumbiehl <florz at florz.de>
---
src/southbridge/via/k8t890/romstrap.inc | 2 +-
src/southbridge/via/vt8237r/lpc.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/southbridge/via/k8t890/romstrap.inc b/src/southbridge/via/k8t890/romstrap.inc
index 5b24948..a3814b0 100644
--- a/src/southbridge/via/k8t890/romstrap.inc
+++ b/src/southbridge/via/k8t890/romstrap.inc
@@ -33,7 +33,7 @@ __romstrap_start:
* Below are some Dev0 Func2 HT control registers values,
* depending on strap pin, one of below lines is used.
*/
-#if CONFIG_SOUTHBRIDGE_VIA_K8M800 || CONFIG_SOUTHBRIDGE_VIA_K8T800
+#if CONFIG_SOUTHBRIDGE_VIA_K8M800 || CONFIG_SOUTHBRIDGE_VIA_K8T800 || CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
tblpointer:
.long 0x50220000, 0X619707C2
diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c
index e599517..b1e1afe 100644
--- a/src/southbridge/via/vt8237r/lpc.c
+++ b/src/southbridge/via/vt8237r/lpc.c
@@ -298,7 +298,7 @@ static void vt8237r_init(struct device *dev)
pci_write_config8(dev, 0x48, 0x0c);
#else
- #if CONFIG_SOUTHBRIDGE_VIA_K8T800
+ #if CONFIG_SOUTHBRIDGE_VIA_K8T800 || CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD
/* It seems that when we pair with the K8T800, we need to disable
* the A2 mask
*/
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