[coreboot] New patch to review for coreboot: bf75f52 Add code to set the clock speed for Winbond W83627THF/THG.

[Idwer Vollering (vidwer@gmail.com)]

Idwer Vollering (vidwer at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/412

-gerrit

commit bf75f52a17bb63332f115dd1abd2db8925535975
Author: Idwer Vollering <vidwer at gmail.com>
Date:   Sat Nov 5 19:24:09 2011 +0100

    Add code to set the clock speed for Winbond W83627THF/THG.
    
    Change-Id: I984404dd1df50b3ba423ac610283b9bf8bca5a31
    Signed-off-by: Idwer Vollering <vidwer at gmail.com>
---
 src/superio/winbond/w83627thg/early_serial.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/src/superio/winbond/w83627thg/early_serial.c b/src/superio/winbond/w83627thg/early_serial.c
index 559e982..95d362e 100644
--- a/src/superio/winbond/w83627thg/early_serial.c
+++ b/src/superio/winbond/w83627thg/early_serial.c
@@ -45,3 +45,13 @@ static void inline w83627thg_enable_serial(device_t dev, u16 iobase)
 	pnp_set_enable(dev, 1);
 	pnp_exit_ext_func_mode(dev);
 }
+
+static void w83627thg_set_clksel_48(device_t dev)
+{
+	u8 reg8;
+	pnp_enter_ext_func_mode(dev);
+	reg8 = pnp_read_config(dev, 0x24);
+	reg8 |= (1 << 6); /* Set CLKSEL (clock input on pin 1) to 48MHz. */
+	pnp_write_config(dev, 0x24, reg8);
+	pnp_exit_ext_func_mode(dev);
+}